DE69535661D1 - Verfahren zur Herstellung eines Films für eine Halbleiteranordnung bei niedriger Temperatur - Google Patents

Verfahren zur Herstellung eines Films für eine Halbleiteranordnung bei niedriger Temperatur

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Publication number
DE69535661D1
DE69535661D1 DE69535661T DE69535661T DE69535661D1 DE 69535661 D1 DE69535661 D1 DE 69535661D1 DE 69535661 T DE69535661 T DE 69535661T DE 69535661 T DE69535661 T DE 69535661T DE 69535661 D1 DE69535661 D1 DE 69535661D1
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Germany
Prior art keywords
producing
film
semiconductor device
low temperature
semiconductor
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Expired - Lifetime
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DE69535661T
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English (en)
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DE69535661T2 (de
Inventor
Bunji Mizuno
Kenji Okada
Ichirou Nakayama
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Panasonic Corp
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Matsushita Electric Industrial Co Ltd
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Publication of DE69535661D1 publication Critical patent/DE69535661D1/de
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Publication of DE69535661T2 publication Critical patent/DE69535661T2/de
Anticipated expiration legal-status Critical
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    • H01L21/02236Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer group IV semiconductor
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    • H01L21/28506Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
    • H01L21/28512Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table
    • H01L21/28556Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table by chemical means, e.g. CVD, LPCVD, PECVD, laser CVD
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/314Inorganic layers
    • H01L21/316Inorganic layers composed of oxides or glassy oxides or oxide based glass
    • H01L21/31604Deposition from a gas or vapour
    • H01L21/31608Deposition of SiO2

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  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Materials Engineering (AREA)
  • General Chemical & Material Sciences (AREA)
  • Metallurgy (AREA)
  • Toxicology (AREA)
  • Health & Medical Sciences (AREA)
  • Organic Chemistry (AREA)
  • Mechanical Engineering (AREA)
  • Plasma & Fusion (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Drying Of Semiconductors (AREA)
  • Physical Deposition Of Substances That Are Components Of Semiconductor Devices (AREA)
  • Thin Film Transistor (AREA)
DE69535661T 1994-05-16 1995-05-16 Verfahren zur Herstellung eines Films für eine Halbleiteranordnung bei niedriger Temperatur Expired - Lifetime DE69535661T2 (de)

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JP3599290B2 (ja) 1994-09-19 2004-12-08 株式会社ルネサステクノロジ 半導体装置
KR100368318B1 (ko) * 2000-12-29 2003-01-24 주식회사 하이닉스반도체 반도체 소자의 선택적 에피택셜 성장법
US8563410B2 (en) * 2009-11-25 2013-10-22 Taiwan Semiconductor Manufacturing Company, Ltd. End-cut first approach for critical dimension control
CN102651312B (zh) * 2011-02-24 2014-12-24 中芯国际集成电路制造(上海)有限公司 栅极的形成方法
US10755913B2 (en) 2017-07-18 2020-08-25 Duke University Package comprising an ion-trap and method of fabrication

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US6169004B1 (en) 2001-01-02
US5817559A (en) 1998-10-06
CN1121260A (zh) 1996-04-24
EP0684632A3 (de) 1998-04-15
EP0684632B1 (de) 2007-12-12
JPH0837159A (ja) 1996-02-06
KR0175430B1 (ko) 1999-04-01
JP2771472B2 (ja) 1998-07-02
CN1088911C (zh) 2002-08-07
EP0684632A2 (de) 1995-11-29
KR950034591A (ko) 1995-12-28
DE69535661T2 (de) 2008-05-21

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