DE69321544D1 - Halbleiterspeicheranordnung - Google Patents

Halbleiterspeicheranordnung

Info

Publication number
DE69321544D1
DE69321544D1 DE69321544T DE69321544T DE69321544D1 DE 69321544 D1 DE69321544 D1 DE 69321544D1 DE 69321544 T DE69321544 T DE 69321544T DE 69321544 T DE69321544 T DE 69321544T DE 69321544 D1 DE69321544 D1 DE 69321544D1
Authority
DE
Germany
Prior art keywords
memory device
semiconductor memory
semiconductor
memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69321544T
Other languages
English (en)
Other versions
DE69321544T2 (de
Inventor
Haruki Toda
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Application granted granted Critical
Publication of DE69321544D1 publication Critical patent/DE69321544D1/de
Publication of DE69321544T2 publication Critical patent/DE69321544T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1051—Data output circuits, e.g. read-out amplifiers, data output buffers, data output registers, data output level conversion circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1006—Data managing, e.g. manipulating data before writing or reading out, data bus switches or control circuits therefor
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1015—Read-write modes for single port memories, i.e. having either a random port or a serial port
    • G11C7/103—Read-write modes for single port memories, i.e. having either a random port or a serial port using serially addressed read-write data registers
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1072—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers for memories with random access ports synchronised on clock signal pulse trains, e.g. synchronous memories, self timed memories
DE69321544T 1992-08-28 1993-08-27 Halbleiterspeicheranordnung Expired - Lifetime DE69321544T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4230583A JP2825401B2 (ja) 1992-08-28 1992-08-28 半導体記憶装置

Publications (2)

Publication Number Publication Date
DE69321544D1 true DE69321544D1 (de) 1998-11-19
DE69321544T2 DE69321544T2 (de) 1999-04-01

Family

ID=16910019

Family Applications (3)

Application Number Title Priority Date Filing Date
DE69332420T Expired - Lifetime DE69332420T2 (de) 1992-08-28 1993-08-27 Halbleiterspeicheranordnung
DE69333792T Expired - Lifetime DE69333792T2 (de) 1992-08-28 1993-08-27 Halbleiteranordnung
DE69321544T Expired - Lifetime DE69321544T2 (de) 1992-08-28 1993-08-27 Halbleiterspeicheranordnung

Family Applications Before (2)

Application Number Title Priority Date Filing Date
DE69332420T Expired - Lifetime DE69332420T2 (de) 1992-08-28 1993-08-27 Halbleiterspeicheranordnung
DE69333792T Expired - Lifetime DE69333792T2 (de) 1992-08-28 1993-08-27 Halbleiteranordnung

Country Status (5)

Country Link
US (2) US5392254A (de)
EP (3) EP1231606B1 (de)
JP (1) JP2825401B2 (de)
KR (1) KR0136747B1 (de)
DE (3) DE69332420T2 (de)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6085283A (en) * 1993-11-19 2000-07-04 Kabushiki Kaisha Toshiba Data selecting memory device and selected data transfer device
JP2982618B2 (ja) * 1994-06-28 1999-11-29 日本電気株式会社 メモリ選択回路
JP3351692B2 (ja) * 1995-09-12 2002-12-03 株式会社東芝 シンクロナス半導体メモリ装置
JP3406790B2 (ja) 1996-11-25 2003-05-12 株式会社東芝 データ転送システム及びデータ転送方法
JPH10188556A (ja) * 1996-12-20 1998-07-21 Fujitsu Ltd 半導体記憶装置
US6925086B2 (en) * 2000-12-12 2005-08-02 International Business Machines Corporation Packet memory system
JP6239078B1 (ja) * 2016-11-04 2017-11-29 ウィンボンド エレクトロニクス コーポレーション 半導体記憶装置および読出し方法

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59180871A (ja) * 1983-03-31 1984-10-15 Fujitsu Ltd 半導体メモリ装置
JPH0787037B2 (ja) * 1984-03-02 1995-09-20 沖電気工業株式会社 半導体メモリ回路のデータ書込方法
JPS6240693A (ja) * 1985-08-16 1987-02-21 Fujitsu Ltd ニブル・モ−ド機能を有する半導体記憶装置
JPH0740430B2 (ja) * 1986-07-04 1995-05-01 日本電気株式会社 メモリ装置
JPS63239675A (ja) * 1986-11-27 1988-10-05 Toshiba Corp 半導体記憶装置
JPH03205689A (ja) * 1990-01-08 1991-09-09 Hitachi Ltd 半導体記憶装置
US5289413A (en) * 1990-06-08 1994-02-22 Kabushiki Kaisha Toshiba Dynamic semiconductor memory device with high-speed serial-accessing column decoder
JP2799042B2 (ja) * 1990-06-08 1998-09-17 株式会社東芝 半導体記憶装置
JPH0831271B2 (ja) * 1990-09-20 1996-03-27 松下電器産業株式会社 メモリ
JP2740063B2 (ja) * 1990-10-15 1998-04-15 株式会社東芝 半導体記憶装置

Also Published As

Publication number Publication date
EP1231606B1 (de) 2005-04-13
KR940004639A (ko) 1994-03-15
DE69321544T2 (de) 1999-04-01
EP0844616B1 (de) 2002-10-16
DE69332420D1 (de) 2002-11-21
EP0588129A2 (de) 1994-03-23
DE69332420T2 (de) 2003-06-18
JP2825401B2 (ja) 1998-11-18
US5392254A (en) 1995-02-21
JPH0676563A (ja) 1994-03-18
DE69333792D1 (de) 2005-05-19
EP1231606A1 (de) 2002-08-14
KR0136747B1 (ko) 1998-04-29
US5508970A (en) 1996-04-16
EP0844616A3 (de) 1999-05-26
DE69333792T2 (de) 2006-03-09
EP0588129A3 (de) 1994-12-21
EP0844616A2 (de) 1998-05-27
EP0588129B1 (de) 1998-10-14

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition