DE69319372D1 - Halbleiterspeichervorrichtung mit Selbstauffrischungsfunktion - Google Patents

Halbleiterspeichervorrichtung mit Selbstauffrischungsfunktion

Info

Publication number
DE69319372D1
DE69319372D1 DE69319372T DE69319372T DE69319372D1 DE 69319372 D1 DE69319372 D1 DE 69319372D1 DE 69319372 T DE69319372 T DE 69319372T DE 69319372 T DE69319372 T DE 69319372T DE 69319372 D1 DE69319372 D1 DE 69319372D1
Authority
DE
Germany
Prior art keywords
refresh address
sub
path
self
memory device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69319372T
Other languages
English (en)
Other versions
DE69319372T2 (de
Inventor
Kyung-Woo Kang
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Samsung Electronics Co Ltd
Original Assignee
Samsung Electronics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Samsung Electronics Co Ltd filed Critical Samsung Electronics Co Ltd
Publication of DE69319372D1 publication Critical patent/DE69319372D1/de
Application granted granted Critical
Publication of DE69319372T2 publication Critical patent/DE69319372T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C29/00Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/02Detection or location of defective auxiliary circuits, e.g. defective refresh counters
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/406Management or control of the refreshing or charge-regeneration cycles

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Dram (AREA)
  • For Increasing The Reliability Of Semiconductor Memories (AREA)
DE69319372T 1992-04-22 1993-04-21 Halbleiterspeichervorrichtung mit Selbstauffrischungsfunktion Expired - Lifetime DE69319372T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019920006728A KR950009390B1 (ko) 1992-04-22 1992-04-22 반도체 메모리장치의 리프레시 어드레스 테스트회로

Publications (2)

Publication Number Publication Date
DE69319372D1 true DE69319372D1 (de) 1998-08-06
DE69319372T2 DE69319372T2 (de) 1998-10-29

Family

ID=19332103

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69319372T Expired - Lifetime DE69319372T2 (de) 1992-04-22 1993-04-21 Halbleiterspeichervorrichtung mit Selbstauffrischungsfunktion

Country Status (7)

Country Link
US (1) US5299168A (de)
EP (1) EP0567104B1 (de)
JP (1) JP2843481B2 (de)
KR (1) KR950009390B1 (de)
CN (1) CN1032337C (de)
DE (1) DE69319372T2 (de)
TW (1) TW212251B (de)

Families Citing this family (26)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06150646A (ja) * 1992-11-13 1994-05-31 Nec Corp 半導体メモリ
JP3001342B2 (ja) * 1993-02-10 2000-01-24 日本電気株式会社 記憶装置
JP3244340B2 (ja) * 1993-05-24 2002-01-07 三菱電機株式会社 同期型半導体記憶装置
US5450364A (en) * 1994-01-31 1995-09-12 Texas Instruments Incorporated Method and apparatus for production testing of self-refresh operations and a particular application to synchronous memory devices
JP3426693B2 (ja) * 1994-03-07 2003-07-14 株式会社日立製作所 半導体記憶装置
KR100372245B1 (ko) * 1995-08-24 2004-02-25 삼성전자주식회사 워드라인순차제어반도체메모리장치
JPH09161478A (ja) * 1995-12-12 1997-06-20 Mitsubishi Electric Corp 半導体記憶装置
US6392948B1 (en) * 1996-08-29 2002-05-21 Micron Technology, Inc. Semiconductor device with self refresh test mode
KR100363108B1 (ko) * 1998-12-30 2003-02-20 주식회사 하이닉스반도체 반도체 메모리장치와 그 장치의 리프레쉬주기 조절방법
JPH11345486A (ja) * 1998-06-01 1999-12-14 Mitsubishi Electric Corp セルフ・リフレッシュ制御回路を備えたdramおよびシステムlsi
KR100363103B1 (ko) * 1998-10-20 2003-02-19 주식회사 하이닉스반도체 셀프 리프레쉬 발진기
KR100364128B1 (ko) * 1999-04-08 2002-12-11 주식회사 하이닉스반도체 셀프리프레쉬 발진주기 측정장치
US6330203B1 (en) 2000-12-26 2001-12-11 Vanguard International Semiconductor Corporation Test mode for verification of on-chip generated row addresses
JP2002214296A (ja) * 2001-01-16 2002-07-31 Toshiba Corp 半導体装置
US7184728B2 (en) * 2002-02-25 2007-02-27 Adc Telecommunications, Inc. Distributed automatic gain control system
DE10228527B3 (de) * 2002-06-26 2004-03-04 Infineon Technologies Ag Verfahren zum Überprüfen der Refresh-Funktion eines Informationsspeichers
KR101130378B1 (ko) 2004-09-09 2012-03-27 엘지전자 주식회사 식기세척기 및 그 제어방법
US7599711B2 (en) 2006-04-12 2009-10-06 Adc Telecommunications, Inc. Systems and methods for analog transport of RF voice/data communications
DE102006020098A1 (de) * 2006-04-29 2007-10-31 Infineon Technologies Ag Speicherschaltung und Verfahren zum Auffrischen von dynamischen Speicherzellen
KR20100128045A (ko) 2009-05-27 2010-12-07 삼성전자주식회사 반도체 메모리 장치의 셀프 리프레시 주기 측정 방법
KR101752154B1 (ko) * 2010-11-02 2017-06-30 삼성전자주식회사 로우 어드레스 제어 회로, 이를 포함하는 반도체 메모리 장치 및 로우 어드레스 제어 방법
KR101974108B1 (ko) * 2012-07-30 2019-08-23 삼성전자주식회사 리프레쉬 어드레스 생성기, 이를 포함하는 휘발성 메모리 장치 및 휘발성 메모리 장치의 리프레쉬 방법
KR102194791B1 (ko) * 2013-08-09 2020-12-28 에스케이하이닉스 주식회사 메모리, 이를 포함하는 메모리 시스템 및 메모리의 동작방법
EP3108627A4 (de) 2014-02-18 2017-10-11 CommScope Technologies LLC Selektive kombination von uplink-signalen in verteilten antennensystemen
CN105338131B (zh) * 2015-11-30 2019-05-31 上海斐讯数据通信技术有限公司 一种dhcp服务器地址池容量的测试方法及系统
CN114121074B (zh) * 2020-08-31 2023-09-01 长鑫存储技术有限公司 存储阵列自刷新频率测试方法与存储阵列测试设备

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4672583A (en) * 1983-06-15 1987-06-09 Nec Corporation Dynamic random access memory device provided with test circuit for internal refresh circuit
JPS6035398A (ja) * 1983-08-05 1985-02-23 Nec Corp ダイナミック型半導体記憶装置
JPS6083294A (ja) * 1983-10-13 1985-05-11 Nec Corp 自動リフレツシユ回路
JPH087995B2 (ja) * 1985-08-16 1996-01-29 富士通株式会社 ダイナミツク半導体記憶装置のリフレツシユ方法および装置
US4807196A (en) * 1986-03-24 1989-02-21 Nec Corporation Refresh address counter test control circuit for dynamic random access memory system
US4933908A (en) * 1988-10-28 1990-06-12 Unisys Corporation Fault detection in memory refreshing system

Also Published As

Publication number Publication date
EP0567104A3 (en) 1996-04-17
TW212251B (en) 1993-09-01
US5299168A (en) 1994-03-29
KR950009390B1 (ko) 1995-08-21
KR930022383A (ko) 1993-11-24
CN1032337C (zh) 1996-07-17
JPH06103757A (ja) 1994-04-15
EP0567104B1 (de) 1998-07-01
CN1078820A (zh) 1993-11-24
JP2843481B2 (ja) 1999-01-06
DE69319372T2 (de) 1998-10-29
EP0567104A2 (de) 1993-10-27

Similar Documents

Publication Publication Date Title
DE69319372T2 (de) Halbleiterspeichervorrichtung mit Selbstauffrischungsfunktion
KR870002582A (ko) 테스트 패턴 발생회로를 갖는 반도체 기억장치
DE69628196D1 (de) Einrichtung und verfahren zum einschalten einer funktion in einem vielspeichermodul
DE69209404D1 (de) Selbsttest integrierter Schaltungen mit hybriden Mustern
KR920008768A (ko) 반도체기억장치
DE69133572D1 (de) Halbleiterbauelement mit dynamischem Arbeitsspeicher (DRAM)
DE69729771D1 (de) Integrierte Schaltung mit einer eingebauten Selbsttestanordnung
TW262557B (en) Semiconductor memory device
DE69624791D1 (de) Zweiwegsignalübertragungsanordnung
DE68919570T2 (de) Dynamische Speicheranordnung mit wahlfreiem Zugriff vom Metall-Isolator-Halbleiter-Typ.
KR970023464A (ko) 테스트 회로가 설치된 반도체 메모리
DE69124888D1 (de) Halbleiter-Speicher mit automatischem Testmodus-Ausgang auf Chip-Enable
DE69936277D1 (de) Synchron-Halbleiterspeichervorrichtung
KR870010549A (ko) 반도체 기억장치
DE69228522D1 (de) Lese-Schreibspeicher mit Prüfmodusdatenvergleich
KR970029834A (ko) 어드레스 신호 변화에 대한 안정한 응답특성을 갖는 어드레스 천이 검출회로를 구비한 반도체 기억장치
DE3789125D1 (de) Mehrfachport-Speichernetzwerk.
DE69426087T2 (de) Halbleiterspeichervorrichtung mit Testschaltung
KR970017693A (ko) 테스트 회로
KR970049243A (ko) 반도체 메모리 디바이스의 구분방법
ATE86407T1 (de) Halbleiterspeicher mit einer signalwechselerkennungsschaltung.
KR930702763A (ko) 반도체 기억장치
DK0443117T3 (da) Analog ledningstilslutning
ITMI912229A1 (it) Dispositivo di memoria a semiconduttore con ridondanza
US6292008B1 (en) Circuit configuration for burn-in systems for testing modules by using a board

Legal Events

Date Code Title Description
8364 No opposition during term of opposition