DE69729771D1 - Integrierte Schaltung mit einer eingebauten Selbsttestanordnung - Google Patents

Integrierte Schaltung mit einer eingebauten Selbsttestanordnung

Info

Publication number
DE69729771D1
DE69729771D1 DE69729771T DE69729771T DE69729771D1 DE 69729771 D1 DE69729771 D1 DE 69729771D1 DE 69729771 T DE69729771 T DE 69729771T DE 69729771 T DE69729771 T DE 69729771T DE 69729771 D1 DE69729771 D1 DE 69729771D1
Authority
DE
Germany
Prior art keywords
self
built
integrated circuit
test
test arrangement
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69729771T
Other languages
English (en)
Other versions
DE69729771T2 (de
Inventor
Kuong Hua Hii
Theo J Powell
Danny R Cline
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Texas Instruments Inc
Original Assignee
Texas Instruments Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Texas Instruments Inc filed Critical Texas Instruments Inc
Application granted granted Critical
Publication of DE69729771D1 publication Critical patent/DE69729771D1/de
Publication of DE69729771T2 publication Critical patent/DE69729771T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/30—Marginal testing, e.g. by varying supply voltage
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/04—Generating or distributing clock signals or signals derived directly therefrom
    • G06F1/08—Clock generators with changeable or programmable clock frequency
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
    • G06F11/26—Functional testing
    • G06F11/27—Built-in tests
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
    • G11C29/12—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
    • G11C29/12015—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details comprising clock generation or timing circuitry
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
    • G11C29/12—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
    • G11C29/14—Implementation of control logic, e.g. test mode decoders
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
    • G11C29/12—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
    • G11C29/14—Implementation of control logic, e.g. test mode decoders
    • G11C29/16—Implementation of control logic, e.g. test mode decoders using microprogrammed units, e.g. state machines
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
    • G11C29/12—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
    • G11C29/36—Data generation devices, e.g. data inverters
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
    • G11C29/12—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
    • G11C29/38—Response verification devices
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/50—Marginal testing, e.g. race, voltage or current testing
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/56—External testing equipment for static stores, e.g. automatic test equipment [ATE]; Interfaces therefor
    • G11C29/56012—Timing aspects, clock generation, synchronisation
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2201/00—Indexing scheme relating to error detection, to error correction, and to monitoring
    • G06F2201/88—Monitoring involving counting
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Quality & Reliability (AREA)
  • For Increasing The Reliability Of Semiconductor Memories (AREA)
  • Tests Of Electronic Circuits (AREA)
  • Test And Diagnosis Of Digital Computers (AREA)
  • Semiconductor Integrated Circuits (AREA)
DE69729771T 1996-04-30 1997-04-30 Integrierte Schaltung mit einer eingebauten Selbsttestanordnung Expired - Lifetime DE69729771T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US1651696P 1996-04-30 1996-04-30
US16516 1996-04-30

Publications (2)

Publication Number Publication Date
DE69729771D1 true DE69729771D1 (de) 2004-08-12
DE69729771T2 DE69729771T2 (de) 2004-12-02

Family

ID=21777529

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69729771T Expired - Lifetime DE69729771T2 (de) 1996-04-30 1997-04-30 Integrierte Schaltung mit einer eingebauten Selbsttestanordnung

Country Status (5)

Country Link
US (1) US5883843A (de)
EP (1) EP0805460B1 (de)
JP (1) JPH1069799A (de)
KR (1) KR100492205B1 (de)
DE (1) DE69729771T2 (de)

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* Cited by examiner, † Cited by third party
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US20020071325A1 (en) * 1996-04-30 2002-06-13 Hii Kuong Hua Built-in self-test arrangement for integrated circuit memory devices
US6353563B1 (en) * 1996-04-30 2002-03-05 Texas Instruments Incorporated Built-in self-test arrangement for integrated circuit memory devices
US6014336A (en) * 1997-04-30 2000-01-11 Texas Instruments Incorporated Test enable control for built-in self-test
JPH1186596A (ja) * 1997-09-08 1999-03-30 Mitsubishi Electric Corp 半導体記憶装置
US6061811A (en) * 1997-10-31 2000-05-09 Texas Instruments Incorporated Circuits, systems, and methods for external evaluation of microprocessor built-in self-test
KR100267781B1 (ko) * 1998-03-04 2000-10-16 김영환 테스트 모드를 셋업하기 위한 반도체 소자
JP3298621B2 (ja) 1998-09-02 2002-07-02 日本電気株式会社 組込み自己テスト回路
EP1031994B1 (de) * 1999-02-23 2002-07-24 Taiwan Semiconductor Manufacturing Co., Ltd. Speicherschaltungen mit eingebautem Selbsttest
US6928593B1 (en) * 2000-09-18 2005-08-09 Intel Corporation Memory module and memory component built-in self test
US6629281B1 (en) * 2000-09-26 2003-09-30 International Business Machines Corporation Method and system for at speed diagnostics and bit fail mapping
US6622269B1 (en) * 2000-11-27 2003-09-16 Intel Corporation Memory fault isolation apparatus and methods
US6704894B1 (en) 2000-12-21 2004-03-09 Lockheed Martin Corporation Fault insertion using on-card reprogrammable devices
EP1231608A1 (de) * 2001-02-07 2002-08-14 STMicroelectronics Limited Eingebaute Testschaltung und -verfahren in einer integrierten Schaltung
US20020133769A1 (en) * 2001-03-15 2002-09-19 Cowles Timothy B. Circuit and method for test and repair
US6904552B2 (en) 2001-03-15 2005-06-07 Micron Technolgy, Inc. Circuit and method for test and repair
JP2004520673A (ja) * 2001-04-25 2004-07-08 コーニンクレッカ　フィリップス　エレクトロニクス　エヌ　ヴィ 埋設不揮発性メモリの自己診断装置を備える集積回路及び関連する診断方法
DE10125022A1 (de) * 2001-05-22 2002-12-12 Infineon Technologies Ag Dynamischer Speicher und Verfahren zum Testen eines dynamischen Speichers
US7418642B2 (en) * 2001-07-30 2008-08-26 Marvell International Technology Ltd. Built-in-self-test using embedded memory and processor in an application specific integrated circuit
JP2003228997A (ja) * 2002-02-05 2003-08-15 Mitsubishi Electric Corp 半導体記憶装置
JP2003281899A (ja) * 2002-03-22 2003-10-03 Sony Corp 半導体記憶装置とその試験方法
US20040193976A1 (en) * 2003-03-31 2004-09-30 Slaight Thomas M. Method and apparatus for interconnect built-in self test based system management failure monitoring
ITRM20030198A1 (it) * 2003-04-28 2004-10-29 Micron Technology Inc Monitor ad unita' di controllo basata su rom in un
US7509543B2 (en) * 2003-06-17 2009-03-24 Micron Technology, Inc. Circuit and method for error test, recordation, and repair
US7275188B1 (en) 2003-10-10 2007-09-25 Integrated Device Technology, Inc. Method and apparatus for burn-in of semiconductor devices
KR100558492B1 (ko) * 2003-11-14 2006-03-07 삼성전자주식회사 반도체 메모리 장치 및 이 장치의 테스트 패턴 데이터발생방법
CN100369159C (zh) * 2004-07-20 2008-02-13 中兴通讯股份有限公司 一种闪存存储器的检测方法
JP2007064648A (ja) * 2005-08-29 2007-03-15 Nec Electronics Corp 半導体集積回路及びテスト方法
KR100927409B1 (ko) * 2008-04-30 2009-11-19 주식회사 하이닉스반도체 반도체 소자와 그의 구동 방법
US8358548B2 (en) * 2009-10-19 2013-01-22 Avago Technologies Enterprise IP (Singapore) Pte. Ltd. Methods for efficiently repairing embedded dynamic random-access memory having marginally failing cells
KR20130134610A (ko) * 2012-05-31 2013-12-10 에스케이하이닉스 주식회사 반도체 메모리 장치 및 그것의 테스트 방법
US9256505B2 (en) 2014-03-17 2016-02-09 Avago Technologies General Ip (Singapore) Pte. Ltd. Data transformations to improve ROM yield and programming time
KR102179829B1 (ko) * 2014-07-10 2020-11-18 삼성전자주식회사 런 타임 배드 셀을 관리하는 스토리지 시스템
US10163470B2 (en) * 2015-09-18 2018-12-25 Taiwan Semiconductor Manufacturing Company Ltd. Dual rail memory, memory macro and associated hybrid power supply method
US10600495B2 (en) 2017-06-23 2020-03-24 Texas Instruments Incorporated Parallel memory self-testing
US10656205B2 (en) * 2018-02-01 2020-05-19 Oracle International Corporation Narrow-parallel scan-based device testing
CN117110845B (zh) * 2023-10-23 2024-01-05 上海泰矽微电子有限公司 一种测试模式控制电路、方法及芯片
CN117521588B (zh) * 2024-01-08 2024-05-10 深圳中安辰鸿技术有限公司 预防集成电路的非均匀老化的控制方法及装置和处理芯片

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JP3072531B2 (ja) * 1991-03-25 2000-07-31 安藤電気株式会社 集積回路試験装置のパターンメモリ回路
JP3474214B2 (ja) * 1992-10-22 2003-12-08 株式会社東芝 論理回路及びこの論理回路を備えたテスト容易化回路
US5617531A (en) * 1993-11-02 1997-04-01 Motorola, Inc. Data Processor having a built-in internal self test controller for testing a plurality of memories internal to the data processor
US5870617A (en) * 1994-12-22 1999-02-09 Texas Instruments Incorporated Systems, circuits and methods for mixed voltages and programmable voltage rails on integrated circuits
US5689466A (en) * 1995-04-07 1997-11-18 National Semiconductor Corporation Built in self test (BIST) for multiple RAMs
KR0152914B1 (ko) * 1995-04-21 1998-12-01 문정환 반도체 메모리장치
US5661729A (en) * 1995-04-28 1997-08-26 Song Corporation Semiconductor memory having built-in self-test circuit
US5661732A (en) * 1995-05-31 1997-08-26 International Business Machines Corporation Programmable ABIST microprocessor for testing arrays with two logical views
US5568437A (en) * 1995-06-20 1996-10-22 Vlsi Technology, Inc. Built-in self test for integrated circuits having read/write memory
US5640509A (en) * 1995-10-03 1997-06-17 Intel Corporation Programmable built-in self-test function for an integrated circuit
US5640404A (en) * 1996-08-05 1997-06-17 Vlsi Technology, Inc. Limited probes device testing for high pin count digital devices

Also Published As

Publication number Publication date
DE69729771T2 (de) 2004-12-02
KR100492205B1 (ko) 2005-09-14
KR970071846A (ko) 1997-11-07
US5883843A (en) 1999-03-16
JPH1069799A (ja) 1998-03-10
EP0805460A1 (de) 1997-11-05
EP0805460B1 (de) 2004-07-07

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Legal Events

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8364 No opposition during term of opposition