DE69332070D1 - Steuerschaltung für Galois-Feld - Google Patents
Steuerschaltung für Galois-FeldInfo
- Publication number
- DE69332070D1 DE69332070D1 DE69332070T DE69332070T DE69332070D1 DE 69332070 D1 DE69332070 D1 DE 69332070D1 DE 69332070 T DE69332070 T DE 69332070T DE 69332070 T DE69332070 T DE 69332070T DE 69332070 D1 DE69332070 D1 DE 69332070D1
- Authority
- DE
- Germany
- Prior art keywords
- operational result
- galois field
- result
- outputting
- operational
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/60—Methods or arrangements for performing computations using a digital non-denominational number representation, i.e. number representation without radix; Computing devices using combinations of denominational and non-denominational quantity representations, e.g. using difunction pulse trains, STEELE computers, phase computers
- G06F7/72—Methods or arrangements for performing computations using a digital non-denominational number representation, i.e. number representation without radix; Computing devices using combinations of denominational and non-denominational quantity representations, e.g. using difunction pulse trains, STEELE computers, phase computers using residue arithmetic
- G06F7/724—Finite field arithmetic
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
- G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/01—Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/13—Linear codes
- H03M13/15—Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes
- H03M13/151—Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes using error location or error correction polynomials
Landscapes
- Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Pure & Applied Mathematics (AREA)
- Probability & Statistics with Applications (AREA)
- Mathematical Physics (AREA)
- General Engineering & Computer Science (AREA)
- Computational Mathematics (AREA)
- Mathematical Analysis (AREA)
- Mathematical Optimization (AREA)
- Algebra (AREA)
- Quality & Reliability (AREA)
- Computing Systems (AREA)
- Error Detection And Correction (AREA)
Applications Claiming Priority (6)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP4107015A JP2934351B2 (ja) | 1992-04-24 | 1992-04-24 | ガロア体演算回路 |
JP4112596A JPH05308293A (ja) | 1992-05-01 | 1992-05-01 | 誤り訂正回路 |
JP11892092A JPH05315973A (ja) | 1992-05-12 | 1992-05-12 | 誤り訂正回路 |
JP11891992A JP2945539B2 (ja) | 1992-05-12 | 1992-05-12 | 誤り訂正結果の検算回路 |
JP11891892A JP2999881B2 (ja) | 1992-05-12 | 1992-05-12 | リードソロモン符号の復号装置 |
JP19724492A JP2948026B2 (ja) | 1992-07-23 | 1992-07-23 | リードソロモン符号の復号方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
DE69332070D1 true DE69332070D1 (de) | 2002-08-08 |
DE69332070T2 DE69332070T2 (de) | 2003-05-08 |
Family
ID=27552260
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE69332070T Expired - Fee Related DE69332070T2 (de) | 1992-04-24 | 1993-04-23 | Steuerschaltung für Galois-Feld |
Country Status (3)
Country | Link |
---|---|
US (1) | US5414719A (de) |
EP (1) | EP0567148B1 (de) |
DE (1) | DE69332070T2 (de) |
Families Citing this family (41)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH09507117A (ja) * | 1993-11-04 | 1997-07-15 | シーラス ロジック,インコーポレイテッド | リードソロモン復号化器 |
KR970004515B1 (ko) * | 1993-12-29 | 1997-03-28 | 삼성전자 주식회사 | 리드-솔로몬 복호기의 오류위치다항식 연산방법 및 장치 |
US5812438A (en) * | 1995-10-12 | 1998-09-22 | Adaptec, Inc. | Arithmetic logic unit and method for numerical computations in galois fields |
FR2743912B1 (fr) * | 1996-01-24 | 1998-04-10 | Matra Communication | Circuit de resolution d'equation-cle et decodeur reed-solomon incorporant un tel circuit |
US5768168A (en) * | 1996-05-30 | 1998-06-16 | Lg Semicon Co., Ltd. | Universal galois field multiplier |
US6038581A (en) * | 1997-01-29 | 2000-03-14 | Nippon Telegraph And Telephone Corporation | Scheme for arithmetic operations in finite field and group operations over elliptic curves realizing improved computational speed |
JP3850511B2 (ja) * | 1997-05-07 | 2006-11-29 | 日本テキサス・インスツルメンツ株式会社 | リードソロモン復号装置 |
US6510228B2 (en) * | 1997-09-22 | 2003-01-21 | Qualcomm, Incorporated | Method and apparatus for generating encryption stream ciphers |
US6252958B1 (en) * | 1997-09-22 | 2001-06-26 | Qualcomm Incorporated | Method and apparatus for generating encryption stream ciphers |
JPH11196006A (ja) * | 1997-12-26 | 1999-07-21 | Nec Corp | 並列処理シンドロ−ム計算回路及びリ−ド・ソロモン複合化回路 |
US6389442B1 (en) | 1997-12-30 | 2002-05-14 | Rsa Security Inc. | Efficient finite field multiplication in normal basis |
US6047395A (en) * | 1998-01-30 | 2000-04-04 | Cirrus Logic, Inc. | Error correction processor for correcting a multi-dimensional code by generating an erasure polynomial over one dimension for correcting multiple codewords in another dimension |
US6209114B1 (en) * | 1998-05-29 | 2001-03-27 | Texas Instruments Incorporated | Efficient hardware implementation of chien search polynomial reduction in reed-solomon decoding |
US6412090B1 (en) * | 1998-06-18 | 2002-06-25 | Globespanvirata, Inc. | Galois field computation system and method |
US6192497B1 (en) * | 1998-08-27 | 2001-02-20 | Adaptec, Inc. | Parallel Chien search circuit |
US6490357B1 (en) * | 1998-08-28 | 2002-12-03 | Qualcomm Incorporated | Method and apparatus for generating encryption stream ciphers |
US6560338B1 (en) | 1998-08-28 | 2003-05-06 | Qualcomm Incorporated | Limiting delays associated with the generation of encryption stream ciphers |
US6553537B1 (en) | 1998-12-11 | 2003-04-22 | Matsushita Electric Industrial Co., Ltd. | Reed-Solomon decoding apparatus and control method therefor |
TW441195B (en) * | 1999-07-16 | 2001-06-16 | Via Tech Inc | Signal decoding method |
US20080282128A1 (en) * | 1999-08-04 | 2008-11-13 | Super Talent Electronics, Inc. | Method of Error Correction Code on Solid State Disk to Gain Data Security and Higher Performance |
US6691042B2 (en) * | 2001-07-02 | 2004-02-10 | Rosetta Inpharmatics Llc | Methods for generating differential profiles by combining data obtained in separate measurements |
US6920600B2 (en) * | 2002-01-23 | 2005-07-19 | Thomson Licensing S.A. | Dual chien search blocks in an error-correcting decoder |
GB2399896A (en) * | 2002-07-31 | 2004-09-29 | Hewlett Packard Co | Identifying uncorrectable codewords in a reed-solomon decoder handling errors and erasures |
US7103830B1 (en) | 2002-12-18 | 2006-09-05 | Applied Micro Circuits Corporation | DC balanced error correction coding |
FR2853424B1 (fr) * | 2003-04-04 | 2005-10-21 | Atmel Corp | Architecture de multiplicateurs polynomial et naturel combines |
JP4237757B2 (ja) * | 2003-08-29 | 2009-03-11 | パナソニック株式会社 | 誤り検出装置、及び誤り検出方法 |
US8645803B2 (en) | 2010-05-10 | 2014-02-04 | Ternarylogic Llc | Methods and systems for rapid error correction by forward and reverse determination of coding states |
JP2005151056A (ja) * | 2003-11-13 | 2005-06-09 | Oki Electric Ind Co Ltd | デスクランブル回路 |
CN1987975A (zh) * | 2005-12-22 | 2007-06-27 | 群康科技(深圳)有限公司 | 液晶显示面板电压调整电路 |
US9203436B2 (en) * | 2006-07-12 | 2015-12-01 | Ternarylogic Llc | Error correction in multi-valued (p,k) codes |
US8103943B2 (en) * | 2006-08-10 | 2012-01-24 | Ternarylogic Llc | Symbol reconstruction in Reed-Solomon codes |
US9203438B2 (en) * | 2006-07-12 | 2015-12-01 | Ternarylogic Llc | Error correction by symbol reconstruction in binary and multi-valued cyclic codes |
US8201060B2 (en) * | 2007-07-11 | 2012-06-12 | Ternarylocig LLC | Methods and systems for rapid error correction of Reed-Solomon codes |
US9152493B2 (en) * | 2012-09-12 | 2015-10-06 | Samsung Electronics Co., Ltd. | Error check and correction circuit and semiconductor memory |
US9384083B2 (en) * | 2012-09-24 | 2016-07-05 | Samsung Electronics Co., Ltd. | Error location search circuit, and error check and correction circuit and memory device including the same |
US9396116B2 (en) * | 2013-11-26 | 2016-07-19 | Globalfoundries Inc. | Write and read collision avoidance in single port memory devices |
US9413391B2 (en) * | 2014-04-18 | 2016-08-09 | Kabushiki Kaisha Toshiba | Chien search device, storage device, and chien search method |
US9379739B2 (en) * | 2014-08-11 | 2016-06-28 | Qualcomm Incorporated | Devices and methods for data recovery of control channels in wireless communications |
KR102149674B1 (ko) * | 2014-10-13 | 2020-09-01 | 삼성전자주식회사 | 에러 정정 디코더 및 에러 정정 디코더의 동작 방법 |
KR102324769B1 (ko) * | 2015-06-29 | 2021-11-10 | 삼성전자주식회사 | 반도체 메모리 장치의 에러 정정 회로, 반도체 메모리 장치 및 이를 포함하는 메모리 시스템 |
US11962327B2 (en) * | 2022-01-13 | 2024-04-16 | Micron Technology, Inc. | Iterative decoding technique for correcting DRAM device failures |
Family Cites Families (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2533091A1 (fr) * | 1982-09-13 | 1984-03-16 | Cii Honeywell Bull | Systeme de detection et de correction d'erreurs de transmission d'un message binaire utilisant un code cyclique detecteur et correcteur d'erreurs de type reed-solomon entrelace |
JPS60206390A (ja) * | 1984-03-30 | 1985-10-17 | Pioneer Electronic Corp | デイジタルデ−タエラ−ブロツク検出表示装置 |
US4597083A (en) * | 1984-04-06 | 1986-06-24 | Ampex Corporation | Error detection and correction in digital communication systems |
US4797848A (en) * | 1986-04-18 | 1989-01-10 | Hughes Aircraft Company | Pipelined bit-serial Galois Field multiplier |
JP2751201B2 (ja) * | 1988-04-19 | 1998-05-18 | ソニー株式会社 | データ伝送装置及び受信装置 |
US4845713A (en) * | 1987-06-08 | 1989-07-04 | Exabyte Corporation | Method and apparatus for determining the coefficients of a locator polynomial |
WO1989002123A1 (en) * | 1987-08-24 | 1989-03-09 | Digital Equipment Corporation | High bandwidth reed-solomon encoding, decoding and error correcting circuit |
FR2628862B1 (fr) * | 1988-03-17 | 1993-03-12 | Thomson Csf | Multiplieur-additionneur parametrable dans les corps de galois, et son utilisation dans un processeur de traitement de signal numerique |
EP0341862B1 (de) * | 1988-05-12 | 1996-01-10 | Quantum Corporation | Fehlerortungssystem |
US4958349A (en) * | 1988-11-01 | 1990-09-18 | Ford Aerospace Corporation | High data rate BCH decoder |
-
1993
- 1993-04-15 US US08/046,853 patent/US5414719A/en not_active Expired - Lifetime
- 1993-04-23 DE DE69332070T patent/DE69332070T2/de not_active Expired - Fee Related
- 1993-04-23 EP EP93106652A patent/EP0567148B1/de not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
EP0567148B1 (de) | 2002-07-03 |
EP0567148A2 (de) | 1993-10-27 |
US5414719A (en) | 1995-05-09 |
EP0567148A3 (en) | 1995-10-18 |
DE69332070T2 (de) | 2003-05-08 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8332 | No legal effect for de | ||
8370 | Indication of lapse of patent is to be deleted | ||
8364 | No opposition during term of opposition | ||
8339 | Ceased/non-payment of the annual fee |