DE69219073D1 - Dünnfilm-Transistor mit einer Schutzschicht und Verfahren zur Herstellung - Google Patents
Dünnfilm-Transistor mit einer Schutzschicht und Verfahren zur HerstellungInfo
- Publication number
- DE69219073D1 DE69219073D1 DE69219073T DE69219073T DE69219073D1 DE 69219073 D1 DE69219073 D1 DE 69219073D1 DE 69219073 T DE69219073 T DE 69219073T DE 69219073 T DE69219073 T DE 69219073T DE 69219073 D1 DE69219073 D1 DE 69219073D1
- Authority
- DE
- Germany
- Prior art keywords
- manufacture
- thin film
- protective layer
- film transistor
- transistor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 238000004519 manufacturing process Methods 0.000 title 1
- 238000000034 method Methods 0.000 title 1
- 239000011241 protective layer Substances 0.000 title 1
- 239000010409 thin film Substances 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66742—Thin film unipolar transistors
- H01L29/6675—Amorphous silicon or polysilicon transistors
- H01L29/66765—Lateral single gate single channel transistors with inverted structure, i.e. the channel layer is formed after the gate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/78651—Silicon transistors
- H01L29/7866—Non-monocrystalline silicon transistors
- H01L29/78663—Amorphous silicon transistors
- H01L29/78669—Amorphous silicon transistors with inverted-type structure, e.g. with bottom gate
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S438/00—Semiconductor device manufacturing: process
- Y10S438/911—Differential oxidation and etching
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
- Thin Film Transistor (AREA)
Applications Claiming Priority (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP32677691A JPH05136166A (ja) | 1991-11-15 | 1991-11-15 | 薄膜トランジスタの製造方法 |
JP18280692A JP3131853B2 (ja) | 1992-06-18 | 1992-06-18 | 薄膜トランジスタの製造方法 |
JP18280892A JPH065625A (ja) | 1992-06-18 | 1992-06-18 | 薄膜トランジスタの製造方法 |
JP18280792A JPH065624A (ja) | 1992-06-18 | 1992-06-18 | 薄膜トランジスタの製造方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
DE69219073D1 true DE69219073D1 (de) | 1997-05-22 |
DE69219073T2 DE69219073T2 (de) | 1997-07-24 |
Family
ID=27475074
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE69219073T Expired - Fee Related DE69219073T2 (de) | 1991-11-15 | 1992-11-12 | Dünnfilm-Transistor mit einer Schutzschicht und Verfahren zur Herstellung |
Country Status (3)
Country | Link |
---|---|
US (1) | US5427962A (de) |
EP (1) | EP0542279B1 (de) |
DE (1) | DE69219073T2 (de) |
Families Citing this family (23)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH08172202A (ja) * | 1994-12-20 | 1996-07-02 | Sharp Corp | 薄膜トランジスタおよびその製造方法 |
KR0145900B1 (ko) * | 1995-02-11 | 1998-09-15 | 김광호 | 박막 트랜지스터 액정디스플레이 소자 및 그 제조방법 |
JP3444053B2 (ja) * | 1995-10-13 | 2003-09-08 | ソニー株式会社 | 薄膜半導体装置 |
US5612235A (en) * | 1995-11-01 | 1997-03-18 | Industrial Technology Research Institute | Method of making thin film transistor with light-absorbing layer |
KR100232677B1 (ko) * | 1996-04-09 | 1999-12-01 | 구본준 | 박막 트랜지스터의 제조방법 및 그 방법에 의해 제조되는 박막 트랜지스터의 구조 |
JP3082671B2 (ja) | 1996-06-26 | 2000-08-28 | 日本電気株式会社 | トランジスタ素子及びその製造方法 |
KR100196336B1 (en) * | 1996-07-27 | 1999-06-15 | Lg Electronics Inc | Method of manufacturing thin film transistor |
JP3883641B2 (ja) * | 1997-03-27 | 2007-02-21 | 株式会社半導体エネルギー研究所 | コンタクト構造およびアクティブマトリクス型表示装置 |
JP4663038B2 (ja) * | 1997-05-28 | 2011-03-30 | 三菱電機株式会社 | コンタクトホールの形成方法 |
US5943559A (en) * | 1997-06-23 | 1999-08-24 | Nec Corporation | Method for manufacturing liquid crystal display apparatus with drain/source silicide electrodes made by sputtering process |
JP4363684B2 (ja) * | 1998-09-02 | 2009-11-11 | エルジー ディスプレイ カンパニー リミテッド | 薄膜トランジスタ基板およびこれを用いた液晶表示装置 |
US6355580B1 (en) | 1998-09-03 | 2002-03-12 | Micron Technology, Inc. | Ion-assisted oxidation methods and the resulting structures |
KR100333274B1 (ko) * | 1998-11-24 | 2002-04-24 | 구본준, 론 위라하디락사 | 액정표시장치 및 그 제조방법 |
KR100413668B1 (ko) * | 2001-03-29 | 2003-12-31 | 엘지.필립스 엘시디 주식회사 | 액정표시장치용 어레이기판 제조방법 |
US20060003485A1 (en) * | 2004-06-30 | 2006-01-05 | Hoffman Randy L | Devices and methods of making the same |
US7390754B2 (en) * | 2006-07-20 | 2008-06-24 | United Microelectronics Corp. | Method of forming a silicide |
JP5245287B2 (ja) * | 2007-05-18 | 2013-07-24 | ソニー株式会社 | 半導体装置の製造方法、薄膜トランジスタ基板の製造方法および表示装置の製造方法 |
SG165252A1 (en) * | 2009-03-25 | 2010-10-28 | Unisantis Electronics Jp Ltd | Semiconductor device and production method therefor |
JP5032532B2 (ja) * | 2009-06-05 | 2012-09-26 | ユニサンティス エレクトロニクス シンガポール プライベート リミテッド | 半導体装置及びその製造方法 |
JP5006378B2 (ja) * | 2009-08-11 | 2012-08-22 | ユニサンティス エレクトロニクス シンガポール プライベート リミテッド | 半導体装置及びその製造方法 |
JP5006379B2 (ja) * | 2009-09-16 | 2012-08-22 | ユニサンティス エレクトロニクス シンガポール プライベート リミテッド | 半導体装置 |
TWI562384B (en) * | 2015-05-25 | 2016-12-11 | Hon Hai Prec Ind Co Ltd | Thin film transistor and method of manufacturing the same |
KR102660292B1 (ko) | 2016-06-23 | 2024-04-24 | 삼성디스플레이 주식회사 | 박막 트랜지스터 패널 및 그 제조 방법 |
Family Cites Families (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4459739A (en) * | 1981-05-26 | 1984-07-17 | Northern Telecom Limited | Thin film transistors |
JPS62213278A (ja) * | 1986-03-14 | 1987-09-19 | Oki Electric Ind Co Ltd | 薄膜トランジスタの製造方法 |
JPH07105502B2 (ja) * | 1987-07-21 | 1995-11-13 | 松下電器産業株式会社 | 薄膜トランジスタ−の製造方法 |
JPH01173650A (ja) * | 1987-12-26 | 1989-07-10 | Seikosha Co Ltd | 非晶質シリコン薄膜トランジスタの製造方法 |
US5053354A (en) * | 1988-05-30 | 1991-10-01 | Seikosha Co., Ltd. | Method of fabricating a reverse staggered type silicon thin film transistor |
JPH01302865A (ja) * | 1988-05-31 | 1989-12-06 | Matsushita Electric Ind Co Ltd | 薄膜トランジスターおよびその製造方法 |
JPH02199842A (ja) * | 1989-01-27 | 1990-08-08 | Nec Corp | 薄膜電界効果型トランジスタ素子の製造方法 |
JPH02297969A (ja) * | 1989-05-11 | 1990-12-10 | Fujitsu Ltd | 薄膜トランジスタとその製造方法 |
-
1992
- 1992-11-10 US US07/974,183 patent/US5427962A/en not_active Expired - Fee Related
- 1992-11-12 DE DE69219073T patent/DE69219073T2/de not_active Expired - Fee Related
- 1992-11-12 EP EP92119386A patent/EP0542279B1/de not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
EP0542279A1 (de) | 1993-05-19 |
EP0542279B1 (de) | 1997-04-16 |
US5427962A (en) | 1995-06-27 |
DE69219073T2 (de) | 1997-07-24 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8339 | Ceased/non-payment of the annual fee |