DE69217738T2 - Permanenter Halbleiterspeicher und seine Arbeitsweise - Google Patents

Permanenter Halbleiterspeicher und seine Arbeitsweise

Info

Publication number
DE69217738T2
DE69217738T2 DE69217738T DE69217738T DE69217738T2 DE 69217738 T2 DE69217738 T2 DE 69217738T2 DE 69217738 T DE69217738 T DE 69217738T DE 69217738 T DE69217738 T DE 69217738T DE 69217738 T2 DE69217738 T2 DE 69217738T2
Authority
DE
Germany
Prior art keywords
hot
electrons
potential
region
avalanche
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69217738T
Other languages
German (de)
English (en)
Other versions
DE69217738D1 (de
Inventor
Kiyomi Naruke
Etsushi Obi
Masamitsu Oshikiri
Tomoko Suzuki
Seiji Yamada
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Toshiba Electronic Device Solutions Corp
Original Assignee
Toshiba Corp
Toshiba Microelectronics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Toshiba Microelectronics Corp filed Critical Toshiba Corp
Application granted granted Critical
Publication of DE69217738D1 publication Critical patent/DE69217738D1/de
Publication of DE69217738T2 publication Critical patent/DE69217738T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
    • G11C16/3404—Convergence or correction of memory cell threshold voltages; Repair or recovery of overerased or overprogrammed cells
    • G11C16/3409—Circuits or methods to recover overerased nonvolatile memory cells detected during erase verification, usually by means of a "soft" programming step
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/30—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/10—Programming or data input circuits
    • G11C16/14—Circuits for erasing electrically, e.g. erase voltage switching circuits
    • G11C16/16—Circuits for erasing electrically, e.g. erase voltage switching circuits for erasing blocks, e.g. arrays, words, groups
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
    • G11C16/3404—Convergence or correction of memory cell threshold voltages; Repair or recovery of overerased or overprogrammed cells
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/10—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the top-view layout
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/20—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by three-dimensional arrangements, e.g. with cells on different height levels
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/40—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the peripheral circuit region
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B69/00—Erasable-and-programmable ROM [EPROM] devices not provided for in groups H10B41/00 - H10B63/00, e.g. ultraviolet erasable-and-programmable ROM [UVEPROM] devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/68—Floating-gate IGFETs
    • H10D30/681—Floating-gate IGFETs having only two programming levels
    • H10D30/684—Floating-gate IGFETs having only two programming levels programmed by hot carrier injection
    • H10D30/685—Floating-gate IGFETs having only two programming levels programmed by hot carrier injection from the channel

Landscapes

  • Non-Volatile Memory (AREA)
  • Semiconductor Memories (AREA)
  • Read Only Memory (AREA)
DE69217738T 1991-06-27 1992-06-26 Permanenter Halbleiterspeicher und seine Arbeitsweise Expired - Fee Related DE69217738T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15706391 1991-06-27

Publications (2)

Publication Number Publication Date
DE69217738D1 DE69217738D1 (de) 1997-04-10
DE69217738T2 true DE69217738T2 (de) 1997-07-24

Family

ID=15641406

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69217738T Expired - Fee Related DE69217738T2 (de) 1991-06-27 1992-06-26 Permanenter Halbleiterspeicher und seine Arbeitsweise

Country Status (4)

Country Link
US (3) US5452248A (enExample)
EP (1) EP0520505B1 (enExample)
KR (1) KR960011188B1 (enExample)
DE (1) DE69217738T2 (enExample)

Families Citing this family (26)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5452251A (en) 1992-12-03 1995-09-19 Fujitsu Limited Semiconductor memory device for selecting and deselecting blocks of word lines
JP3342730B2 (ja) * 1993-03-17 2002-11-11 富士通株式会社 不揮発性半導体記憶装置
EP0621604A1 (en) * 1993-04-23 1994-10-26 STMicroelectronics S.r.l. Method for recovering floating-gate memory cells with low threshold voltage in flash-EEPROM memory devices
JP3462894B2 (ja) * 1993-08-27 2003-11-05 株式会社東芝 不揮発性半導体メモリ及びそのデータプログラム方法
US6091639A (en) 1993-08-27 2000-07-18 Kabushiki Kaisha Toshiba Non-volatile semiconductor memory device and data programming method
US5576991A (en) * 1994-07-01 1996-11-19 Advanced Micro Devices, Inc. Multistepped threshold convergence for a flash memory array
US5680350A (en) * 1994-12-14 1997-10-21 Micron Technology, Inc. Method for narrowing threshold voltage distribution in a block erased flash memory array
US5650964A (en) * 1995-06-07 1997-07-22 Advanced Micro Devices, Inc. Method of inhibiting degradation of ultra short channel charge-carrying devices during discharge
DE69521203T2 (de) * 1995-07-31 2006-01-12 Stmicroelectronics S.R.L., Agrate Brianza Flash-EEPROM mit gesteuerter Entladungszeit der Wortleitungs- und Sourcespannungen nach der Löschung
EP0793238A1 (en) * 1996-02-29 1997-09-03 STMicroelectronics S.r.l. Electrically programmable non-volatile memory cells device for a reduced number of programming cycles
JPH09320287A (ja) * 1996-05-24 1997-12-12 Nec Corp 不揮発性半導体記憶装置
JP3450625B2 (ja) * 1997-02-10 2003-09-29 東芝マイクロエレクトロニクス株式会社 不揮発性半導体記憶装置とその動作方法
KR100323970B1 (ko) * 1997-02-12 2002-03-08 박세광 비휘발성메모리구조
JPH10261292A (ja) * 1997-03-18 1998-09-29 Nec Corp 不揮発性半導体記憶装置の消去方法
KR20000043884A (ko) * 1998-12-29 2000-07-15 김영환 스플리트 게이트형 플래쉬 메모리 셀의 소거 방법
KR100357644B1 (ko) * 1999-02-19 2002-10-25 미쓰비시덴키 가부시키가이샤 비휘발성 반도체 기억장치 및 그 구동방법, 동작방법 및제조방법
US6456537B1 (en) * 2000-06-27 2002-09-24 Alliance Semiconductor Techniques for erasing an erasable programmable read only memory (EPROM) cell
JP4083975B2 (ja) * 2000-12-11 2008-04-30 株式会社ルネサステクノロジ 半導体装置
KR100395769B1 (ko) * 2001-06-21 2003-08-21 삼성전자주식회사 비휘발성 메모리 장치의 소거 방법
US6784483B2 (en) * 2002-09-04 2004-08-31 Macronix International Co., Ltd. Method for preventing hole and electron movement in NROM devices
US7759719B2 (en) * 2004-07-01 2010-07-20 Chih-Hsin Wang Electrically alterable memory cell
KR100558004B1 (ko) * 2003-10-22 2006-03-06 삼성전자주식회사 게이트 전극과 반도체 기판 사이에 전하저장층을 갖는비휘발성 메모리 소자의 프로그램 방법
US7079424B1 (en) * 2004-09-22 2006-07-18 Spansion L.L.C. Methods and systems for reducing erase times in flash memory devices
DE102005023460A1 (de) * 2005-05-20 2006-11-30 Infineon Technologies Ag Verfahren zum Betreiben eines MOSFET als Antifuse
EP1909290B1 (en) * 2006-08-24 2009-10-07 STMicroelectronics S.r.l. Method for compacting the erased threshold voltage distribution of flash memory devices during writing operations
US10303998B2 (en) * 2017-09-28 2019-05-28 International Business Machines Corporation Floating gate for neural network inference

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4173791A (en) * 1977-09-16 1979-11-06 Fairchild Camera And Instrument Corporation Insulated gate field-effect transistor read-only memory array
JPS5571072A (en) * 1978-11-24 1980-05-28 Hitachi Ltd Semiconductor nonvolatile memory
JPS57157573A (en) * 1981-03-25 1982-09-29 Fujitsu Ltd Semiconductor non-volatile memory cell
US4742491A (en) * 1985-09-26 1988-05-03 Advanced Micro Devices, Inc. Memory cell having hot-hole injection erase mode
IT1191566B (it) * 1986-06-27 1988-03-23 Sgs Microelettronica Spa Dispositivo di memoria non labile a semiconduttore del tipo a porta non connessa (floating gate) alterabile elettricamente con area di tunnel ridotta e procedimento di fabbricazione
JPS63249375A (ja) * 1987-04-06 1988-10-17 Oki Electric Ind Co Ltd 半導体記憶装置のデ−タ消去方法
DE3884820T2 (de) * 1987-07-29 1994-01-27 Toshiba Kawasaki Kk Nichtflüchtige Halbleiterspeichereinrichtung.
EP0369676B1 (en) * 1988-11-17 1995-11-08 Seiko Instr Inc Non-volatile semiconductor memory.
JP2638654B2 (ja) * 1990-02-06 1997-08-06 三菱電機株式会社 半導体不揮発性記憶装置
JPH0453096A (ja) * 1990-06-19 1992-02-20 Toshiba Corp アナログ記憶装置
US5280446A (en) * 1990-09-20 1994-01-18 Bright Microelectronics, Inc. Flash eprom memory circuit having source side programming
KR960002004B1 (ko) * 1991-02-19 1996-02-09 가부시키가이샤 도시바 기록검증 제어회로를 갖춘 전기적으로 소거 및 프로그램가능한 독출전용 기억장치
US5272669A (en) * 1991-02-20 1993-12-21 Sundisk Corporation Method and structure for programming floating gate memory cells

Also Published As

Publication number Publication date
KR960011188B1 (ko) 1996-08-21
KR930001234A (ko) 1993-01-16
EP0520505B1 (en) 1997-03-05
US5452248A (en) 1995-09-19
US5751636A (en) 1998-05-12
DE69217738D1 (de) 1997-04-10
EP0520505A3 (enExample) 1995-02-15
EP0520505A2 (en) 1992-12-30
US5623445A (en) 1997-04-22

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee