DE69121483D1 - Dynamische Halbleiterspeicherzelle - Google Patents

Dynamische Halbleiterspeicherzelle

Info

Publication number
DE69121483D1
DE69121483D1 DE69121483T DE69121483T DE69121483D1 DE 69121483 D1 DE69121483 D1 DE 69121483D1 DE 69121483 T DE69121483 T DE 69121483T DE 69121483 T DE69121483 T DE 69121483T DE 69121483 D1 DE69121483 D1 DE 69121483D1
Authority
DE
Germany
Prior art keywords
memory cell
semiconductor memory
dynamic semiconductor
dynamic
cell
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69121483T
Other languages
English (en)
Other versions
DE69121483T2 (de
Inventor
Takanori Saeki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Electronics Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Publication of DE69121483D1 publication Critical patent/DE69121483D1/de
Application granted granted Critical
Publication of DE69121483T2 publication Critical patent/DE69121483T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/30—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
    • H10B12/31—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells having a storage electrode stacked over the transistor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
    • H01L27/10—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration
    • H01L27/105—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration including field-effect components
DE69121483T 1990-07-06 1991-06-27 Dynamische Halbleiterspeicherzelle Expired - Lifetime DE69121483T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2178850A JP2792211B2 (ja) 1990-07-06 1990-07-06 半導体記憶装置

Publications (2)

Publication Number Publication Date
DE69121483D1 true DE69121483D1 (de) 1996-09-26
DE69121483T2 DE69121483T2 (de) 1997-03-27

Family

ID=16055768

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69121483T Expired - Lifetime DE69121483T2 (de) 1990-07-06 1991-06-27 Dynamische Halbleiterspeicherzelle

Country Status (5)

Country Link
US (1) US5305252A (de)
EP (1) EP0464686B1 (de)
JP (1) JP2792211B2 (de)
KR (1) KR960003659B1 (de)
DE (1) DE69121483T2 (de)

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* Cited by examiner, † Cited by third party
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KR970001894B1 (en) * 1991-09-13 1997-02-18 Nippon Electric Kk Semiconductor memory device
KR950011636B1 (ko) * 1992-03-04 1995-10-07 금성일렉트론주식회사 개선된 레이아웃을 갖는 다이내믹 랜덤 액세스 메모리와 그것의 메모리셀 배치방법
JP2585183B2 (ja) * 1992-10-21 1997-02-26 三菱電機株式会社 半導体記憶装置
JPH07147095A (ja) * 1993-03-31 1995-06-06 Sony Corp 半導体不揮発性記憶装置およびデコーダ回路
TW318281B (de) * 1994-08-30 1997-10-21 Mitsubishi Electric Corp
JP2783271B2 (ja) * 1995-01-30 1998-08-06 日本電気株式会社 半導体記憶装置
US6016390A (en) * 1998-01-29 2000-01-18 Artisan Components, Inc. Method and apparatus for eliminating bitline voltage offsets in memory devices
KR100278656B1 (ko) * 1998-05-12 2001-02-01 윤종용 트위스트된비트라인구조를갖는반도체메모리장치
TW417290B (en) * 1998-06-26 2001-01-01 Texas Instruments Inc Relaxed layout for storage nodes for dynamic random access memories
US6381166B1 (en) * 1998-09-28 2002-04-30 Texas Instruments Incorporated Semiconductor memory device having variable pitch array
JP3580719B2 (ja) 1999-03-03 2004-10-27 株式会社東芝 半導体記憶装置及びその製造方法
KR20010060046A (ko) * 1999-12-31 2001-07-06 박종섭 반도체 메모리 소자
US6339239B1 (en) * 2000-06-23 2002-01-15 International Business Machines Corporation DRAM cell layout for node capacitance enhancement
US7019353B2 (en) * 2002-07-26 2006-03-28 Micron Technology, Inc. Three dimensional flash cell
TWI265600B (en) * 2002-11-18 2006-11-01 Hynix Semiconductor Inc Semiconductor device and method for fabricating the same
KR100564578B1 (ko) * 2003-09-29 2006-03-28 삼성전자주식회사 비직교형 반도체 메모리 소자의 자기 정렬 콘택 패드형성방법
US7371627B1 (en) 2005-05-13 2008-05-13 Micron Technology, Inc. Memory array with ultra-thin etched pillar surround gate access transistors and buried data/bit lines
US7120046B1 (en) 2005-05-13 2006-10-10 Micron Technology, Inc. Memory array with surrounding gate access transistors and capacitors with global and staggered local bit lines
US7888721B2 (en) 2005-07-06 2011-02-15 Micron Technology, Inc. Surround gate access transistors with grown ultra-thin bodies
US7768051B2 (en) 2005-07-25 2010-08-03 Micron Technology, Inc. DRAM including a vertical surround gate transistor
US7696567B2 (en) 2005-08-31 2010-04-13 Micron Technology, Inc Semiconductor memory device
US7557032B2 (en) * 2005-09-01 2009-07-07 Micron Technology, Inc. Silicided recessed silicon
US7687342B2 (en) * 2005-09-01 2010-03-30 Micron Technology, Inc. Method of manufacturing a memory device
US7416943B2 (en) * 2005-09-01 2008-08-26 Micron Technology, Inc. Peripheral gate stacks and recessed array gates
JP5694625B2 (ja) * 2006-04-13 2015-04-01 ピーエスフォー ルクスコ エスエイアールエルＰＳ４ Ｌｕｘｃｏ Ｓ．ａ．ｒ．ｌ． 半導体記憶装置
FR2915316A1 (fr) * 2007-04-20 2008-10-24 St Microelectronics Sa Procede de fabrication d'une couche d'un circuit integre a l'aide d'un masque
US7923373B2 (en) 2007-06-04 2011-04-12 Micron Technology, Inc. Pitch multiplication using self-assembling materials
KR101087830B1 (ko) * 2009-01-05 2011-11-30 주식회사 하이닉스반도체 반도체 소자의 레이아웃
JP2010186833A (ja) * 2009-02-10 2010-08-26 Toshiba Corp 半導体記憶装置
TWI447742B (zh) * 2010-07-16 2014-08-01 Inotera Memories Inc 記憶體佈局結構及記憶體結構
US8760952B2 (en) * 2010-12-17 2014-06-24 Stmicroelectronics, Inc. Overlapping interconnect signal lines for reducing capacitive coupling effects
TWI506766B (zh) * 2013-03-27 2015-11-01 Inotera Memories Inc 半導體電子元件結構及其製造方法
US9299409B2 (en) * 2013-09-11 2016-03-29 Tadashi Miyakawa Semiconductor storage device
US10622066B2 (en) * 2017-09-21 2020-04-14 Samsung Electronics Co., Ltd. Resistive memory device including reference cell and operating method thereof
US10818729B2 (en) * 2018-05-17 2020-10-27 Macronix International Co., Ltd. Bit cost scalable 3D phase change cross-point memory

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57111061A (en) * 1980-12-26 1982-07-10 Fujitsu Ltd Semiconductor memory unit
JPS57208691A (en) * 1981-06-15 1982-12-21 Mitsubishi Electric Corp Semiconductor memory
JPS59113659A (ja) * 1982-12-20 1984-06-30 Toshiba Corp Ｍｏｓダイナミツクメモリ
US4651183A (en) * 1984-06-28 1987-03-17 International Business Machines Corporation High density one device memory cell arrays
JP2590171B2 (ja) * 1988-01-08 1997-03-12 株式会社日立製作所 半導体記憶装置
JP2777896B2 (ja) * 1989-01-20 1998-07-23 富士通株式会社 半導体記憶装置
KR930002289B1 (ko) * 1989-05-23 1993-03-29 가부시키가이샤 도시바 반도체 기억장치
JP2974252B2 (ja) * 1989-08-19 1999-11-10 富士通株式会社 半導体記憶装置
JP2508288B2 (ja) * 1989-08-30 1996-06-19 三菱電機株式会社 半導体記憶装置
JP2528719B2 (ja) * 1989-12-01 1996-08-28 三菱電機株式会社 半導体記憶装置

Also Published As

Publication number Publication date
US5305252A (en) 1994-04-19
KR920003517A (ko) 1992-02-29
JPH0465872A (ja) 1992-03-02
JP2792211B2 (ja) 1998-09-03
DE69121483T2 (de) 1997-03-27
EP0464686A1 (de) 1992-01-08
KR960003659B1 (ko) 1996-03-21
EP0464686B1 (de) 1996-08-21

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8327 Change in the person/name/address of the patent owner

Owner name: NEC ELECTRONICS CORP., KAWASAKI, KANAGAWA, JP