DE69114027D1 - Ausgangspufferschaltung mit Messung der Ausgangsspannung zur Reduzierung des Schaltrauschens. - Google Patents

Ausgangspufferschaltung mit Messung der Ausgangsspannung zur Reduzierung des Schaltrauschens.

Info

Publication number
DE69114027D1
DE69114027D1 DE69114027T DE69114027T DE69114027D1 DE 69114027 D1 DE69114027 D1 DE 69114027D1 DE 69114027 T DE69114027 T DE 69114027T DE 69114027 T DE69114027 T DE 69114027T DE 69114027 D1 DE69114027 D1 DE 69114027D1
Authority
DE
Germany
Prior art keywords
measurement
buffer circuit
switching noise
reduce switching
output voltage
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69114027T
Other languages
English (en)
Other versions
DE69114027T2 (de
Inventor
Jeffrey B Davis
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
National Semiconductor Corp
Original Assignee
National Semiconductor Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by National Semiconductor Corp filed Critical National Semiconductor Corp
Application granted granted Critical
Publication of DE69114027D1 publication Critical patent/DE69114027D1/de
Publication of DE69114027T2 publication Critical patent/DE69114027T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/26—Modifications for temporary blocking after receipt of control pulses
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/01—Modifications for accelerating switching
    • H03K19/017—Modifications for accelerating switching in field-effect transistor circuits
    • H03K19/01707—Modifications for accelerating switching in field-effect transistor circuits in asynchronous circuits
    • H03K19/01721—Modifications for accelerating switching in field-effect transistor circuits in asynchronous circuits by means of a pull-up or down element
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/003—Modifications for increasing the reliability for protection
    • H03K19/00346—Modifications for eliminating interference or parasitic voltages or currents
    • H03K19/00361—Modifications for eliminating interference or parasitic voltages or currents in field effect transistor circuits

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Logic Circuits (AREA)
  • Electronic Switches (AREA)
DE69114027T 1990-02-22 1991-02-14 Ausgangspufferschaltung mit Messung der Ausgangsspannung zur Reduzierung des Schaltrauschens. Expired - Fee Related DE69114027T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US07/483,931 US5036222A (en) 1990-02-22 1990-02-22 Output buffer circuit with output voltage sensing for reducing switching induced noise

Publications (2)

Publication Number Publication Date
DE69114027D1 true DE69114027D1 (de) 1995-11-30
DE69114027T2 DE69114027T2 (de) 1996-06-05

Family

ID=23922077

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69114027T Expired - Fee Related DE69114027T2 (de) 1990-02-22 1991-02-14 Ausgangspufferschaltung mit Messung der Ausgangsspannung zur Reduzierung des Schaltrauschens.

Country Status (5)

Country Link
US (1) US5036222A (de)
EP (1) EP0443435B1 (de)
JP (1) JPH04227321A (de)
KR (1) KR920000176A (de)
DE (1) DE69114027T2 (de)

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JP3024774B2 (ja) * 1990-03-16 2000-03-21 沖電気工業株式会社 回路素子
JP2583684B2 (ja) * 1990-11-06 1997-02-19 三菱電機株式会社 プルダウン抵抗コントロール入力回路及び出力回路
JP2628942B2 (ja) * 1990-11-06 1997-07-09 三菱電機株式会社 プルアップ抵抗コントロール入力回路及び出力回路
US5128563A (en) * 1990-11-28 1992-07-07 Micron Technology, Inc. CMOS bootstrapped output driver method and circuit
EP0496277B1 (de) * 1991-01-23 1997-12-29 Texas Instruments Deutschland Gmbh Ausgangstufe für eine digitale Schaltung
JP2930440B2 (ja) * 1991-04-15 1999-08-03 沖電気工業株式会社 半導体集積回路
US5184032A (en) * 1991-04-25 1993-02-02 Texas Instruments Incorporated Glitch reduction in integrated circuits, systems and methods
JP3014164B2 (ja) * 1991-05-15 2000-02-28 沖電気工業株式会社 出力バッファ回路
US5319260A (en) * 1991-07-23 1994-06-07 Standard Microsystems Corporation Apparatus and method to prevent the disturbance of a quiescent output buffer caused by ground bounce or by power bounce induced by neighboring active output buffers
US5218239A (en) * 1991-10-03 1993-06-08 National Semiconductor Corporation Selectable edge rate cmos output buffer circuit
US5256914A (en) * 1991-10-03 1993-10-26 National Semiconductor Corporation Short circuit protection circuit and method for output buffers
US5233237A (en) * 1991-12-06 1993-08-03 National Semiconductor Corporation Bicmos output buffer noise reduction circuit
US5248907A (en) * 1992-02-18 1993-09-28 Samsung Semiconductor, Inc. Output buffer with controlled output level
JPH05243940A (ja) * 1992-02-27 1993-09-21 Mitsubishi Electric Corp 出力バッファ装置
US5315172A (en) * 1992-04-14 1994-05-24 Altera Corporation Reduced noise output buffer
US5315174A (en) * 1992-08-13 1994-05-24 Advanced Micro Devices, Inc. Programmable output slew rate control
KR940017190A (ko) * 1992-12-30 1994-07-26 김광호 입력버퍼
US5338978A (en) * 1993-02-10 1994-08-16 National Semiconductor Corporation Full swing power down buffer circuit with multiple power supply isolation
US5387826A (en) * 1993-02-10 1995-02-07 National Semiconductor Corporation Overvoltage protection against charge leakage in an output driver
US5604453A (en) * 1993-04-23 1997-02-18 Altera Corporation Circuit for reducing ground bounce
US5406140A (en) * 1993-06-07 1995-04-11 National Semiconductor Corporation Voltage translation and overvoltage protection
JP3500149B2 (ja) * 1993-06-07 2004-02-23 ナショナル・セミコンダクター・コーポレイション 過電圧保護
US5418474A (en) * 1993-09-24 1995-05-23 National Semiconductor Corporation Circuit for reducing transient simultaneous conduction
US5424653A (en) * 1993-10-06 1995-06-13 Advanced Micro Devices, Inc. Gradual on output buffer circuit including a reverse turn-off apparatus
US5500610A (en) * 1993-10-08 1996-03-19 Standard Microsystems Corp. Very high current integrated circuit output buffer with short circuit protection and reduced power bus spikes
US5428303A (en) * 1994-05-20 1995-06-27 National Semiconductor Corporation Bias generator for low ground bounce output driver
US5517130A (en) * 1994-12-20 1996-05-14 Sun Microsystems, Inc. Method and structure for reducing noise in output buffer circuits
US5568062A (en) * 1995-07-14 1996-10-22 Kaplinsky; Cecil H. Low noise tri-state output buffer
GB9518143D0 (en) * 1995-09-06 1995-11-08 Harvey Geoffrey P Low power self -adjusting logic output driver suitable for driving unterminated transmission lines and inductive-capacitive loads
US5880606A (en) * 1995-12-01 1999-03-09 Lucent Technologies Inc. Programmable driver circuit for multi-source buses
US5734277A (en) * 1996-02-05 1998-03-31 Motorola, Inc. Output circuit and method for suppressing switching noise therein
US5898315A (en) * 1996-05-17 1999-04-27 Cypress Semiconductor Corp. Output buffer circuit and method having improved access
US5656947A (en) * 1996-07-16 1997-08-12 National Semiconductor Corporation Low noise digital output buffer
US6194923B1 (en) * 1996-10-08 2001-02-27 Nvidia Corporation Five volt tolerant output driver
US6243779B1 (en) 1996-11-21 2001-06-05 Integrated Device Technology, Inc. Noise reduction system and method for reducing switching noise in an interface to a large width bus
KR100246336B1 (ko) * 1997-03-22 2000-03-15 김영환 메모리의 출력회로
US5917335A (en) * 1997-04-22 1999-06-29 Cypress Semiconductor Corp. Output voltage controlled impedance output buffer
KR100422815B1 (ko) * 1997-06-30 2004-05-24 주식회사 하이닉스반도체 출력 버퍼 장치
EP0926829A1 (de) 1997-12-22 1999-06-30 Alcatel Ausgangsschaltung für digitale integrierte Schaltungen
KR100475046B1 (ko) 1998-07-20 2005-05-27 삼성전자주식회사 출력버퍼 및 그의 버퍼링 방법
US6188623B1 (en) 1999-01-28 2001-02-13 Micron Technology, Inc. Voltage differential sensing circuit and methods of using same
US6222413B1 (en) 1999-03-16 2001-04-24 International Business Machines Corporation Receiver assisted net driver circuit
US6501293B2 (en) * 1999-11-12 2002-12-31 International Business Machines Corporation Method and apparatus for programmable active termination of input/output devices
US6873196B2 (en) * 2001-08-02 2005-03-29 Agilent Technologies, Inc. Slew rate control of output drivers using FETs with different threshold voltages
US6359478B1 (en) 2001-08-31 2002-03-19 Pericom Semiconductor Corp. Reduced-undershoot CMOS output buffer with delayed VOL-driver transistor
US7126389B1 (en) 2004-01-27 2006-10-24 Integrated Device Technology, Inc. Method and apparatus for an output buffer with dynamic impedance control
US7888962B1 (en) 2004-07-07 2011-02-15 Cypress Semiconductor Corporation Impedance matching circuit
US7193450B1 (en) 2004-12-02 2007-03-20 National Semiconductor Corporation Load sensing buffer circuit with controlled switching current noise (di/dt)
US8036846B1 (en) 2005-10-20 2011-10-11 Cypress Semiconductor Corporation Variable impedance sense architecture and method
KR100859832B1 (ko) * 2006-09-21 2008-09-23 주식회사 하이닉스반도체 반도체 메모리 장치의 내부전위 모니터 장치 및 모니터방법
JP2008263446A (ja) * 2007-04-12 2008-10-30 Matsushita Electric Ind Co Ltd 出力回路
KR100888203B1 (ko) * 2007-07-26 2009-03-12 주식회사 하이닉스반도체 버퍼 회로
TWI388120B (zh) * 2009-12-17 2013-03-01 Phison Electronics Corp 輸入／輸出介面的驅動電路
JP6346207B2 (ja) * 2016-01-28 2018-06-20 国立大学法人 東京大学 ゲート駆動装置
DE102017115511A1 (de) * 2017-07-11 2019-01-17 Knorr-Bremse Systeme für Nutzfahrzeuge GmbH Pegelwandler und ein Verfahren zum Wandeln von Pegelwerten in Fahrzeugsteuergeräten

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63234622A (ja) * 1987-03-23 1988-09-29 Toshiba Corp デ−タ出力回路
US4777389A (en) * 1987-08-13 1988-10-11 Advanced Micro Devices, Inc. Output buffer circuits for reducing ground bounce noise
JPH073945B2 (ja) * 1988-06-27 1995-01-18 日本電気株式会社 Ｃｍｏｓ出力回路
US4961010A (en) * 1989-05-19 1990-10-02 National Semiconductor Corporation Output buffer for reducing switching induced noise

Also Published As

Publication number Publication date
EP0443435A1 (de) 1991-08-28
JPH04227321A (ja) 1992-08-17
DE69114027T2 (de) 1996-06-05
EP0443435B1 (de) 1995-10-25
US5036222A (en) 1991-07-30
KR920000176A (ko) 1992-01-10

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee