DE69111252D1 - Halbleiter-Speichereinrichtung mit Monitor-Funktion. - Google Patents

Halbleiter-Speichereinrichtung mit Monitor-Funktion.

Info

Publication number
DE69111252D1
DE69111252D1 DE69111252T DE69111252T DE69111252D1 DE 69111252 D1 DE69111252 D1 DE 69111252D1 DE 69111252 T DE69111252 T DE 69111252T DE 69111252 T DE69111252 T DE 69111252T DE 69111252 D1 DE69111252 D1 DE 69111252D1
Authority
DE
Germany
Prior art keywords
memory device
semiconductor memory
monitor function
monitor
function
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69111252T
Other languages
English (en)
Other versions
DE69111252T2 (de
Inventor
Osamu Matsumoto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Application granted granted Critical
Publication of DE69111252D1 publication Critical patent/DE69111252D1/de
Publication of DE69111252T2 publication Critical patent/DE69111252T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/24—Bit-line control circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
DE69111252T 1990-01-19 1991-01-18 Halbleiter-Speichereinrichtung mit Monitor-Funktion. Expired - Fee Related DE69111252T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP957490A JP2558904B2 (ja) 1990-01-19 1990-01-19 半導体集積回路

Publications (2)

Publication Number Publication Date
DE69111252D1 true DE69111252D1 (de) 1995-08-24
DE69111252T2 DE69111252T2 (de) 1996-01-25

Family

ID=11724082

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69111252T Expired - Fee Related DE69111252T2 (de) 1990-01-19 1991-01-18 Halbleiter-Speichereinrichtung mit Monitor-Funktion.

Country Status (5)

Country Link
US (1) US5179537A (de)
EP (1) EP0438172B1 (de)
JP (1) JP2558904B2 (de)
KR (1) KR950007420B1 (de)
DE (1) DE69111252T2 (de)

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0453096A (ja) * 1990-06-19 1992-02-20 Toshiba Corp アナログ記憶装置
US5224070A (en) * 1991-12-11 1993-06-29 Intel Corporation Apparatus for determining the conditions of programming circuitry used with flash EEPROM memory
JP2859483B2 (ja) 1992-02-14 1999-02-17 シャープ株式会社 ｐｎ接合リーク電流の評価装置及び評価方法
DE69232168T2 (de) * 1992-05-27 2002-07-18 Co.Ri.M.Me. Consorzio Per La Ricerca Sulla Microelettronica Nel Mezzogiorno, Catania CMOS-Logikschaltung
KR0145382B1 (ko) * 1995-03-21 1998-08-17 김주용 플래쉬 이이피롬셀의 문턱전압 자동 검증회로
GB2337619B (en) * 1995-03-21 2000-03-01 Hyundai Electronics Ind Threshold voltage verification circuit of a non-volatile memory cell and program and erasure verification method using the same
KR100512159B1 (ko) * 1997-11-25 2006-05-16 삼성전자주식회사 반도체 메모리 장치의 패드 레이 아웃
US6295618B1 (en) 1998-08-25 2001-09-25 Micron Technology, Inc. Method and apparatus for data compression in memory devices
US6584589B1 (en) * 2000-02-04 2003-06-24 Hewlett-Packard Development Company, L.P. Self-testing of magneto-resistive memory arrays
JP2002237191A (ja) * 2001-02-13 2002-08-23 Seiko Instruments Inc 相補型不揮発性記憶回路
JP2008234780A (ja) * 2007-03-22 2008-10-02 Toshiba Microelectronics Corp 半導体記憶装置
JP5166894B2 (ja) * 2008-01-30 2013-03-21 セイコーインスツル株式会社 半導体記憶装置

Family Cites Families (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
BE790527A (fr) * 1971-10-25 1973-04-25 Siemens Ag Memoire d'informations a fonctionnement controle, et notamment memoire integree a semi-conducteurs
US4253059A (en) * 1979-05-14 1981-02-24 Fairchild Camera & Instrument Corp. EPROM Reliability test circuit
GB2070372B (en) * 1980-01-31 1983-09-28 Tokyo Shibaura Electric Co Semiconductor memory device
US4393475A (en) * 1981-01-27 1983-07-12 Texas Instruments Incorporated Non-volatile semiconductor memory and the testing method for the same
DE3215671C2 (de) * 1982-04-27 1984-05-03 Siemens AG, 1000 Berlin und 8000 München Programmierbare Logikanordnung
JPS59107493A (ja) * 1982-12-09 1984-06-21 Ricoh Co Ltd テスト回路付きｅｐｒｏｍメモリ装置
JPS61172300A (ja) * 1985-01-26 1986-08-02 Toshiba Corp 半導体記憶装置
JPS62114200A (ja) * 1985-11-13 1987-05-25 Mitsubishi Electric Corp 半導体メモリ装置
JPS62231500A (ja) * 1986-03-31 1987-10-12 Toshiba Corp 半導体記憶装置
US4819212A (en) * 1986-05-31 1989-04-04 Kabushiki Kaisha Toshiba Nonvolatile semiconductor memory device with readout test circuitry
US4943948A (en) * 1986-06-05 1990-07-24 Motorola, Inc. Program check for a non-volatile memory
JPS63244400A (ja) * 1987-03-16 1988-10-11 シーメンス・アクチエンゲゼルシヤフト メモリセルの検査回路装置および方法
JPS6478500A (en) * 1987-05-08 1989-03-23 Mitsubishi Electric Corp Test circuit for nonvolatile semiconductor memory element
JPH0642318B2 (ja) * 1988-01-18 1994-06-01 株式会社東芝 半導体メモリ
IT1221780B (it) * 1988-01-29 1990-07-12 Sgs Thomson Microelectronics Circuito di rilevamento dello stato di celle di matrice in memorie eprom in tecnologia mos
JPH03241594A (ja) * 1990-02-19 1991-10-28 Fujitsu Ltd 半導体メモリのセンス回路

Also Published As

Publication number Publication date
KR910015057A (ko) 1991-08-31
EP0438172A1 (de) 1991-07-24
DE69111252T2 (de) 1996-01-25
US5179537A (en) 1993-01-12
KR950007420B1 (ko) 1995-07-10
EP0438172B1 (de) 1995-07-19
JPH03214497A (ja) 1991-09-19
JP2558904B2 (ja) 1996-11-27

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee