DE68912458T2 - Speicherprüfgerät. - Google Patents

Speicherprüfgerät.

Info

Publication number
DE68912458T2
DE68912458T2 DE68912458T DE68912458T DE68912458T2 DE 68912458 T2 DE68912458 T2 DE 68912458T2 DE 68912458 T DE68912458 T DE 68912458T DE 68912458 T DE68912458 T DE 68912458T DE 68912458 T2 DE68912458 T2 DE 68912458T2
Authority
DE
Germany
Prior art keywords
memory tester
tester
memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE68912458T
Other languages
English (en)
Other versions
DE68912458D1 (de
Inventor
Hiromi Oshima
Junji Nishiura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Advantest Corp
Original Assignee
Advantest Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from JP63220831A external-priority patent/JP2766901B2/ja
Priority claimed from JP63220830A external-priority patent/JPH0267976A/ja
Application filed by Advantest Corp filed Critical Advantest Corp
Publication of DE68912458D1 publication Critical patent/DE68912458D1/de
Application granted granted Critical
Publication of DE68912458T2 publication Critical patent/DE68912458T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/3181—Functional testing
    • G01R31/319—Tester hardware, i.e. output processing circuits
    • G01R31/3193—Tester hardware, i.e. output processing circuits with comparison between actual response and known fault free response
    • G01R31/31935—Storing data, e.g. failure memory
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/56—External testing equipment for static stores, e.g. automatic test equipment [ATE]; Interfaces therefor

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Tests Of Electronic Circuits (AREA)
  • For Increasing The Reliability Of Semiconductor Memories (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
DE68912458T 1988-09-02 1989-08-29 Speicherprüfgerät. Expired - Lifetime DE68912458T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP63220831A JP2766901B2 (ja) 1988-09-02 1988-09-02 メモリ試験装置
JP63220830A JPH0267976A (ja) 1988-09-02 1988-09-02 メモリ試験装置

Publications (2)

Publication Number Publication Date
DE68912458D1 DE68912458D1 (de) 1994-03-03
DE68912458T2 true DE68912458T2 (de) 1994-07-21

Family

ID=26523933

Family Applications (1)

Application Number Title Priority Date Filing Date
DE68912458T Expired - Lifetime DE68912458T2 (de) 1988-09-02 1989-08-29 Speicherprüfgerät.

Country Status (3)

Country Link
US (1) US5062109A (de)
EP (1) EP0356999B1 (de)
DE (1) DE68912458T2 (de)

Families Citing this family (29)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5357521A (en) * 1990-02-14 1994-10-18 International Business Machines Corporation Address sensitive memory testing
US5392294A (en) * 1991-03-08 1995-02-21 International Business Machines Corporation Diagnostic tool and method for locating the origin of parasitic bit faults in a memory array
JP2765771B2 (ja) * 1991-08-07 1998-06-18 ローム株式会社 半導体記憶装置の試験方法
FR2682522B1 (fr) * 1991-10-11 1997-01-10 Sgs Thomson Microelectronics Procede pour verifier le contenu apres effacement d'une memoire permanente effacable, notamment de type eprom, dispositif pour sa mise en óoeuvre et memoire integrant ce dispositif.
JP3049343B2 (ja) * 1991-11-25 2000-06-05 安藤電気株式会社 メモリ試験装置
US5481671A (en) * 1992-02-03 1996-01-02 Advantest Corporation Memory testing device for multiported DRAMs
JP2577120Y2 (ja) * 1993-04-15 1998-07-23 株式会社アドバンテスト 過剰パルス印加の禁止回路
JP3186359B2 (ja) * 1993-07-28 2001-07-11 安藤電気株式会社 物理アドレス変換回路
JPH0778499A (ja) * 1993-09-10 1995-03-20 Advantest Corp フラッシュメモリ試験装置
US5815512A (en) * 1994-05-26 1998-09-29 Mitsubishi Denki Kabushiki Kaisha Semiconductor memory testing device
JPH0862302A (ja) * 1994-08-19 1996-03-08 Advantest Corp サイクル遅延用パターン発生器
US5568437A (en) * 1995-06-20 1996-10-22 Vlsi Technology, Inc. Built-in self test for integrated circuits having read/write memory
US5732047A (en) * 1995-12-12 1998-03-24 Advantest Corporation Timing comparator circuit for use in device testing apparatus
JP3547064B2 (ja) * 1996-10-23 2004-07-28 株式会社アドバンテスト メモリ試験装置
US6061815A (en) * 1996-12-09 2000-05-09 Schlumberger Technologies, Inc. Programming utility register to generate addresses in algorithmic pattern generator
JPH1194920A (ja) * 1997-09-17 1999-04-09 Ando Electric Co Ltd 半導体試験装置用パターン発生装置
JP3820006B2 (ja) * 1997-09-19 2006-09-13 株式会社ルネサステクノロジ 半導体装置
JP3727778B2 (ja) * 1998-05-07 2005-12-14 株式会社東芝 データ高速転送同期システム及びデータ高速転送同期方法
DE19921756A1 (de) * 1998-05-13 1999-11-25 Advantest Corp Speichertestvorrichtung und Datenselektionsschaltkreis
US6324657B1 (en) * 1998-06-11 2001-11-27 Micron Technology, Inc. On-clip testing circuit and method for improving testing of integrated circuits
JP4156726B2 (ja) * 1998-10-16 2008-09-24 株式会社アドバンテスト 高速パターン生成方法及び装置並びにメモリ試験装置
JP3710639B2 (ja) * 1999-02-24 2005-10-26 株式会社東芝 半導体装置
US6543016B1 (en) * 1999-11-04 2003-04-01 Agere Systems Inc. Testing content-addressable memories
JP4612150B2 (ja) * 2000-05-24 2011-01-12 株式会社アドバンテスト 半導体デバイス試験装置
US6574764B2 (en) * 2001-04-25 2003-06-03 Agilent Technologies, Inc. Algorithmically programmable memory tester with history FIFO's that aid in error analysis and recovery
DE10134654A1 (de) * 2001-07-20 2003-02-13 Infineon Technologies Ag Verfahren zur Fehleranalyse von Speichermodulen
KR100462877B1 (ko) * 2002-02-04 2004-12-17 삼성전자주식회사 반도체 메모리 장치, 및 이 장치의 불량 셀 어드레스프로그램 회로 및 방법
US7313739B2 (en) * 2002-12-31 2007-12-25 Analog Devices, Inc. Method and apparatus for testing embedded cores
KR100736673B1 (ko) * 2006-08-01 2007-07-06 주식회사 유니테스트 반도체 소자 테스트 장치

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4414665A (en) * 1979-11-21 1983-11-08 Nippon Telegraph & Telephone Public Corp. Semiconductor memory device test apparatus
US4672583A (en) * 1983-06-15 1987-06-09 Nec Corporation Dynamic random access memory device provided with test circuit for internal refresh circuit
DE3685078D1 (de) * 1985-09-09 1992-06-04 Hitachi Ltd Speicherpruefgeraet.
JPH0760400B2 (ja) * 1986-01-07 1995-06-28 株式会社日立製作所 論理回路の診断方法
JP2527935B2 (ja) * 1986-05-19 1996-08-28 株式会社 アドバンテスト 半導体メモリ試験装置

Also Published As

Publication number Publication date
EP0356999B1 (de) 1994-01-19
DE68912458D1 (de) 1994-03-03
EP0356999A2 (de) 1990-03-07
US5062109A (en) 1991-10-29
EP0356999A3 (de) 1991-08-28

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8328 Change in the person/name/address of the agent

Free format text: HOFFMANN, E., DIPL.-ING., PAT.-ANW., 82166 GRAEFELFING

8339 Ceased/non-payment of the annual fee