DE60305409D1 - Synchroner Halbleiterspeicher mit dynamischen Speicherzellen und Refresh-Verfahren - Google Patents

Synchroner Halbleiterspeicher mit dynamischen Speicherzellen und Refresh-Verfahren

Info

Publication number
DE60305409D1
DE60305409D1 DE60305409T DE60305409T DE60305409D1 DE 60305409 D1 DE60305409 D1 DE 60305409D1 DE 60305409 T DE60305409 T DE 60305409T DE 60305409 T DE60305409 T DE 60305409T DE 60305409 D1 DE60305409 D1 DE 60305409D1
Authority
DE
Germany
Prior art keywords
synchronous semiconductor
refresh method
memory cells
semiconductor memory
dynamic memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE60305409T
Other languages
English (en)
Other versions
DE60305409T2 (de
Inventor
Keiji Maruyama
Shigeo Ohshima
Kazuaki Kawaguchi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Publication of DE60305409D1 publication Critical patent/DE60305409D1/de
Application granted granted Critical
Publication of DE60305409T2 publication Critical patent/DE60305409T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/406—Management or control of the refreshing or charge-regeneration cycles
    • G11C11/40603—Arbitration, priority and concurrent access to memory cells for read/write or refresh operations
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/406—Management or control of the refreshing or charge-regeneration cycles
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/406—Management or control of the refreshing or charge-regeneration cycles
    • G11C11/40611—External triggering or timing of internal or partially internal refresh operations, e.g. auto-refresh or CAS-before-RAS triggered refresh
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C2211/00—Indexing scheme relating to digital stores characterized by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C2211/401—Indexing scheme relating to cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C2211/406—Refreshing of dynamic cells
    • G11C2211/4061—Calibration or ate or cycle tuning
DE60305409T 2002-10-23 2003-02-21 Synchroner Halbleiterspeicher mit dynamischen Speicherzellen und Refresh-Verfahren Expired - Lifetime DE60305409T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2002308670A JP4077295B2 (ja) 2002-10-23 2002-10-23 同期型半導体記憶装置及びその動作方法
JP2002308670 2002-10-23

Publications (2)

Publication Number Publication Date
DE60305409D1 true DE60305409D1 (de) 2006-06-29
DE60305409T2 DE60305409T2 (de) 2007-05-10

Family

ID=32064340

Family Applications (1)

Application Number Title Priority Date Filing Date
DE60305409T Expired - Lifetime DE60305409T2 (de) 2002-10-23 2003-02-21 Synchroner Halbleiterspeicher mit dynamischen Speicherzellen und Refresh-Verfahren

Country Status (5)

Country Link
US (1) US6879540B2 (de)
EP (1) EP1414045B1 (de)
JP (1) JP4077295B2 (de)
CN (1) CN100378866C (de)
DE (1) DE60305409T2 (de)

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DE10317162B4 (de) * 2003-04-14 2010-02-11 Qimonda Ag Speichervorrichtung mit kurzer Wortleitungszykluszeit und Leseverfahren hierzu
JP4267006B2 (ja) * 2006-07-24 2009-05-27 エルピーダメモリ株式会社 半導体記憶装置
KR100899388B1 (ko) * 2006-12-29 2009-05-27 주식회사 하이닉스반도체 내부전압생성회로
WO2012115839A1 (en) 2011-02-23 2012-08-30 Rambus Inc. Protocol for memory power-mode control
US9740485B2 (en) 2012-10-26 2017-08-22 Micron Technology, Inc. Apparatuses and methods for memory operations having variable latencies
US9754648B2 (en) 2012-10-26 2017-09-05 Micron Technology, Inc. Apparatuses and methods for memory operations having variable latencies
US9734097B2 (en) * 2013-03-15 2017-08-15 Micron Technology, Inc. Apparatuses and methods for variable latency memory operations
TWI508066B (zh) * 2013-04-30 2015-11-11 Mstar Semiconductor Inc 記憶體控制器及其信號產生方法
TWI588841B (zh) * 2013-06-25 2017-06-21 晨星半導體股份有限公司 記憶體控制器及其信號產生方法
US9727493B2 (en) 2013-08-14 2017-08-08 Micron Technology, Inc. Apparatuses and methods for providing data to a configurable storage area
US9563565B2 (en) 2013-08-14 2017-02-07 Micron Technology, Inc. Apparatuses and methods for providing data from a buffer
US10365835B2 (en) 2014-05-28 2019-07-30 Micron Technology, Inc. Apparatuses and methods for performing write count threshold wear leveling operations
KR20170045795A (ko) * 2015-10-20 2017-04-28 삼성전자주식회사 메모리 장치 및 이를 포함하는 메모리 시스템
US10635357B2 (en) 2018-07-03 2020-04-28 Nvidia Corporation Method for overlapping memory accesses
CN113553000B (zh) * 2018-07-18 2024-04-12 成都忆芯科技有限公司 降低集成电路功耗的方法及其控制电路
KR102553855B1 (ko) * 2019-03-05 2023-07-12 에스케이하이닉스 주식회사 시프트레지스터
US11188681B2 (en) * 2019-04-08 2021-11-30 International Business Machines Corporation Malware resistant computer
US20210064987A1 (en) * 2019-09-03 2021-03-04 Nvidia Corporation Processor and system to convert tensor operations in machine learning
US11676651B2 (en) 2019-10-31 2023-06-13 SK Hynix Inc. Arithmetic devices conducting auto-load operation
US11386947B2 (en) * 2019-10-31 2022-07-12 SK Hynix Inc. Arithmetic devices conducting auto-load operation for writing the activation functions
US11915125B2 (en) 2019-10-31 2024-02-27 SK Hynix Inc. Arithmetic devices for neural network

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01205788A (ja) 1988-02-12 1989-08-18 Toshiba Corp 半導体集積回路
JP3400824B2 (ja) * 1992-11-06 2003-04-28 三菱電機株式会社 半導体記憶装置
JP4000206B2 (ja) 1996-08-29 2007-10-31 富士通株式会社 半導体記憶装置
TW378330B (en) 1997-06-03 2000-01-01 Fujitsu Ltd Semiconductor memory device
US5999481A (en) * 1997-08-22 1999-12-07 Micron Technology, Inc. Method and apparatus for controlling the operation of an integrated circuit responsive to out-of-synchronism control signals
FR2778258A1 (fr) * 1998-04-29 1999-11-05 Texas Instruments France Controleur d'acces de trafic dans une memoire, systeme de calcul comprenant ce controleur d'acces et procede de fonctionnement d'un tel controleur d'acces
JP4034923B2 (ja) * 1999-05-07 2008-01-16 富士通株式会社 半導体記憶装置の動作制御方法および半導体記憶装置
JP4253097B2 (ja) 1999-12-28 2009-04-08 東芝マイクロエレクトロニクス株式会社 半導体記憶装置及びそのデータ読み出し方法
JP2001266570A (ja) 2000-03-24 2001-09-28 Toshiba Corp 同期型半導体記憶装置

Also Published As

Publication number Publication date
US6879540B2 (en) 2005-04-12
EP1414045B1 (de) 2006-05-24
CN100378866C (zh) 2008-04-02
CN1497604A (zh) 2004-05-19
JP2004145956A (ja) 2004-05-20
DE60305409T2 (de) 2007-05-10
EP1414045A1 (de) 2004-04-28
JP4077295B2 (ja) 2008-04-16
US20040081011A1 (en) 2004-04-29

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Legal Events

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