DE60318659D1 - Nichtflüchtiger Speicher und Auffrischungsverfahren - Google Patents

Nichtflüchtiger Speicher und Auffrischungsverfahren

Info

Publication number
DE60318659D1
DE60318659D1 DE60318659T DE60318659T DE60318659D1 DE 60318659 D1 DE60318659 D1 DE 60318659D1 DE 60318659 T DE60318659 T DE 60318659T DE 60318659 T DE60318659 T DE 60318659T DE 60318659 D1 DE60318659 D1 DE 60318659D1
Authority
DE
Germany
Prior art keywords
volatile memory
refresh method
refresh
volatile
memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE60318659T
Other languages
English (en)
Other versions
DE60318659T2 (de
Inventor
Hidehiko Tanaka
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sharp Corp
Original Assignee
Sharp Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sharp Corp filed Critical Sharp Corp
Publication of DE60318659D1 publication Critical patent/DE60318659D1/de
Application granted granted Critical
Publication of DE60318659T2 publication Critical patent/DE60318659T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
    • G11C16/3418—Disturbance prevention or evaluation; Refreshing of disturbed memory data
    • G11C16/3431—Circuits or methods to detect disturbed nonvolatile memory cells, e.g. which still read as programmed but with threshold less than the program verify threshold or read as erased but with threshold greater than the erase verify threshold, and to reverse the disturbance via a refreshing programming or erasing step
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/10—Programming or data input circuits
    • G11C16/12—Programming voltage switching circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
    • G11C11/5621—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using charge storage in a floating gate
    • G11C11/5628—Programming or writing circuits; Data input circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
    • G11C11/5621—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using charge storage in a floating gate
    • G11C11/5642—Sensing or reading circuits; Data output circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
    • G11C16/3404—Convergence or correction of memory cell threshold voltages; Repair or recovery of overerased or overprogrammed cells
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
    • G11C16/3418—Disturbance prevention or evaluation; Refreshing of disturbed memory data

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Read Only Memory (AREA)
DE60318659T 2002-09-06 2003-09-04 Nichtflüchtiger Speicher und Auffrischungsverfahren Expired - Lifetime DE60318659T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2002261921 2002-09-06
JP2002261921A JP2004103089A (ja) 2002-09-06 2002-09-06 不揮発性半導体記憶装置およびその再書き込み方法

Publications (2)

Publication Number Publication Date
DE60318659D1 true DE60318659D1 (de) 2008-03-06
DE60318659T2 DE60318659T2 (de) 2009-01-15

Family

ID=31712349

Family Applications (1)

Application Number Title Priority Date Filing Date
DE60318659T Expired - Lifetime DE60318659T2 (de) 2002-09-06 2003-09-04 Nichtflüchtiger Speicher und Auffrischungsverfahren

Country Status (7)

Country Link
US (1) US6816409B2 (de)
EP (1) EP1396862B1 (de)
JP (1) JP2004103089A (de)
KR (1) KR100632791B1 (de)
CN (1) CN100380523C (de)
DE (1) DE60318659T2 (de)
TW (1) TWI297498B (de)

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US6751766B2 (en) * 2002-05-20 2004-06-15 Sandisk Corporation Increasing the effectiveness of error correction codes and operating multi-level memory systems by using information about the quality of the stored data
JP4124692B2 (ja) * 2003-04-25 2008-07-23 シャープ株式会社 不揮発性半導体記憶装置
US7372731B2 (en) * 2003-06-17 2008-05-13 Sandisk Il Ltd. Flash memories with adaptive reference voltages
US7092290B2 (en) * 2004-11-16 2006-08-15 Sandisk Corporation High speed programming system with reduced over programming
JPWO2007043133A1 (ja) * 2005-10-04 2009-04-16 スパンション エルエルシー 半導体装置およびその制御方法
JP2007149241A (ja) * 2005-11-29 2007-06-14 Matsushita Electric Ind Co Ltd 不揮発性半導体記憶装置
JP2007193867A (ja) * 2006-01-17 2007-08-02 Matsushita Electric Ind Co Ltd 不揮発性半導体記憶装置及びその書き換え方法
KR100888695B1 (ko) 2007-02-27 2009-03-16 삼성전자주식회사 과표본화 읽기 동작을 수행하는 플래시 메모리 장치 및그것의 데이터 독출 방법
US7577036B2 (en) 2007-05-02 2009-08-18 Micron Technology, Inc. Non-volatile multilevel memory cells with data read of reference cells
KR100888842B1 (ko) * 2007-06-28 2009-03-17 삼성전자주식회사 읽기 전압을 최적화할 수 있는 플래시 메모리 장치 및그것의 독출 전압 설정 방법
US8938655B2 (en) * 2007-12-20 2015-01-20 Spansion Llc Extending flash memory data retension via rewrite refresh
JP5197241B2 (ja) * 2008-09-01 2013-05-15 ルネサスエレクトロニクス株式会社 半導体装置
KR101572830B1 (ko) 2009-06-22 2015-11-30 삼성전자주식회사 비휘발성 메모리 장치의 프로그램 방법, 비휘발성 메모리 장치 및 비휘발성 메모리 시스템
US7944744B2 (en) * 2009-06-30 2011-05-17 Sandisk Il Ltd. Estimating values related to discharge of charge-storing memory cells
KR20110050923A (ko) * 2009-11-09 2011-05-17 삼성전자주식회사 반도체 메모리 장치, 반도체 메모리 모듈 및 이를 구비하는 반도체 메모리 시스템
KR101618311B1 (ko) * 2010-02-08 2016-05-04 삼성전자주식회사 플래시 메모리 장치 및 그것의 읽기 방법
JP2013137848A (ja) * 2011-12-28 2013-07-11 Univ Of Tokyo メモリコントローラ，フラッシュメモリシステムおよびフラッシュメモリの制御方法
US8645770B2 (en) * 2012-01-18 2014-02-04 Apple Inc. Systems and methods for proactively refreshing nonvolatile memory
US9183940B2 (en) 2013-05-21 2015-11-10 Aplus Flash Technology, Inc. Low disturbance, power-consumption, and latency in NAND read and program-verify operations
WO2014210424A2 (en) 2013-06-27 2014-12-31 Aplus Flash Technology, Inc. Novel nand array architecture for multiple simultaneous program and read
WO2015013689A2 (en) 2013-07-25 2015-01-29 Aplus Flash Technology, Inc. Nand array hiarchical bl structures for multiple-wl and all -bl simultaneous erase, erase-verify, program, program-verify, and read operations
US9293205B2 (en) 2013-09-14 2016-03-22 Aplus Flash Technology, Inc Multi-task concurrent/pipeline NAND operations on all planes
CN104681089A (zh) * 2013-11-26 2015-06-03 旺宏电子股份有限公司 复原多个存储单元的阵列的方法、电子装置及控制器
WO2015100434A2 (en) 2013-12-25 2015-07-02 Aplus Flash Technology, Inc A HYBRID NAND WITH ALL-BL m-PAGE OPERATION SCHEME
CN104751893B (zh) * 2013-12-30 2018-09-07 北京兆易创新科技股份有限公司 增强nor型flash可靠性的方法
CN104751898B (zh) * 2013-12-30 2018-04-24 北京兆易创新科技股份有限公司 Nor型flash数据恢复的方法
WO2016014731A1 (en) 2014-07-22 2016-01-28 Aplus Flash Technology, Inc. Yukai vsl-based vt-compensation for nand memory
KR102190241B1 (ko) * 2014-07-31 2020-12-14 삼성전자주식회사 메모리 컨트롤러의 동작 방법 및 불휘발성 메모리 시스템
US9728278B2 (en) 2014-10-24 2017-08-08 Micron Technology, Inc. Threshold voltage margin analysis
CN106920567A (zh) * 2015-12-24 2017-07-04 北京兆易创新科技股份有限公司 一种存储器的刷新方法和装置
JP2018045742A (ja) * 2016-09-13 2018-03-22 ルネサスエレクトロニクス株式会社 記憶装置及び記憶装置の管理方法
JP6997595B2 (ja) * 2017-11-09 2022-01-17 ルネサスエレクトロニクス株式会社 半導体記憶装置、及び半導体記憶装置の制御方法
WO2021223075A1 (en) * 2020-05-06 2021-11-11 Yangtze Memory Technologies Co., Ltd. Non-volatile memory device and control method thereof

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3562043B2 (ja) 1995-07-19 2004-09-08 ソニー株式会社 不揮発性記憶装置
US5777923A (en) * 1996-06-17 1998-07-07 Aplus Integrated Circuits, Inc. Flash memory read/write controller
JP3584607B2 (ja) 1996-05-10 2004-11-04 ソニー株式会社 不揮発性記憶装置
US5738193A (en) 1996-07-19 1998-04-14 General Motors Corporation Roller clutch with snap fit roller control cars
US6134148A (en) * 1997-09-30 2000-10-17 Hitachi, Ltd. Semiconductor integrated circuit and data processing system
US5909449A (en) 1997-09-08 1999-06-01 Invox Technology Multibit-per-cell non-volatile memory with error detection and correction
US6018477A (en) * 1998-10-08 2000-01-25 Information Storage Devices, Inc. Intelligent refreshing method and apparatus for increasing multi-level non-volatile memory charge retention reliability
JP3410036B2 (ja) 1999-02-03 2003-05-26 シャープ株式会社 不揮発性半導体記憶装置への情報の書き込み方法
US6314026B1 (en) * 1999-02-08 2001-11-06 Kabushiki Kaisha Toshiba Nonvolatile semiconductor device using local self boost technique
JP3569185B2 (ja) * 1999-12-24 2004-09-22 Ｎｅｃエレクトロニクス株式会社 不揮発性半導体記憶装置
US6343033B1 (en) * 2000-02-25 2002-01-29 Advanced Micro Devices, Inc. Variable pulse width memory programming
JP2002074999A (ja) 2000-08-23 2002-03-15 Sharp Corp 不揮発性半導体記憶装置

Also Published As

Publication number Publication date
KR100632791B1 (ko) 2006-10-11
US6816409B2 (en) 2004-11-09
TW200414200A (en) 2004-08-01
JP2004103089A (ja) 2004-04-02
US20040071023A1 (en) 2004-04-15
CN100380523C (zh) 2008-04-09
TWI297498B (en) 2008-06-01
EP1396862B1 (de) 2008-01-16
KR20040022409A (ko) 2004-03-12
EP1396862A1 (de) 2004-03-10
CN1492446A (zh) 2004-04-28
DE60318659T2 (de) 2009-01-15

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Legal Events

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