DE602005018561D1 - Halbleiterspeicherbauelement und dessen Herstellungsverfahren - Google Patents

Halbleiterspeicherbauelement und dessen Herstellungsverfahren

Info

Publication number
DE602005018561D1
DE602005018561D1 DE602005018561T DE602005018561T DE602005018561D1 DE 602005018561 D1 DE602005018561 D1 DE 602005018561D1 DE 602005018561 T DE602005018561 T DE 602005018561T DE 602005018561 T DE602005018561 T DE 602005018561T DE 602005018561 D1 DE602005018561 D1 DE 602005018561D1
Authority
DE
Germany
Prior art keywords
manufacturing
memory device
semiconductor memory
semiconductor
memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
DE602005018561T
Other languages
English (en)
Inventor
Takashi Yokoyama
Takuji Tanigami
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sharp Corp
Original Assignee
Sharp Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sharp Corp filed Critical Sharp Corp
Publication of DE602005018561D1 publication Critical patent/DE602005018561D1/de
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B63/00—Resistance change memory devices, e.g. resistive RAM [ReRAM] devices
    • H10B63/30—Resistance change memory devices, e.g. resistive RAM [ReRAM] devices comprising selection components having three or more electrodes, e.g. transistors
    • H10B63/32—Resistance change memory devices, e.g. resistive RAM [ReRAM] devices comprising selection components having three or more electrodes, e.g. transistors of the bipolar type
    • E—FIXED CONSTRUCTIONS
    • E04—BUILDING
    • E04C—STRUCTURAL ELEMENTS; BUILDING MATERIALS
    • E04C3/00—Structural elongated elements designed for load-supporting
    • E04C3/30—Columns; Pillars; Struts
    • E04C3/36—Columns; Pillars; Struts of materials not covered by groups E04C3/32 or E04C3/34; of a combination of two or more materials
    • E—FIXED CONSTRUCTIONS
    • E04—BUILDING
    • E04H—BUILDINGS OR LIKE STRUCTURES FOR PARTICULAR PURPOSES; SWIMMING OR SPLASH BATHS OR POOLS; MASTS; FENCING; TENTS OR CANOPIES, IN GENERAL
    • E04H12/00—Towers; Masts or poles; Chimney stacks; Water-towers; Methods of erecting such structures
    • E04H12/02—Structures made of specified materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B63/00—Resistance change memory devices, e.g. resistive RAM [ReRAM] devices
    • H10B63/80—Arrangements comprising multiple bistable or multi-stable switching components of the same type on a plane parallel to the substrate, e.g. cross-point arrays
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/011—Manufacture or treatment of multistable switching devices
    • H10N70/061—Shaping switching materials
    • H10N70/066—Shaping switching materials by filling of openings, e.g. damascene method
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/20—Multistable switching devices, e.g. memristors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/801—Constructional details of multistable switching devices
    • H10N70/821—Device geometry
    • H10N70/826—Device geometry adapted for essentially vertical current flow, e.g. sandwich or pillar type devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/801—Constructional details of multistable switching devices
    • H10N70/881—Switching materials
    • H10N70/883—Oxides or nitrides
    • H10N70/8836—Complex metal oxides, e.g. perovskites, spinels

Landscapes

  • Engineering & Computer Science (AREA)
  • Architecture (AREA)
  • Civil Engineering (AREA)
  • Structural Engineering (AREA)
  • Life Sciences & Earth Sciences (AREA)
  • Chemical & Material Sciences (AREA)
  • Materials Engineering (AREA)
  • Wood Science & Technology (AREA)
  • Semiconductor Memories (AREA)
  • Static Random-Access Memory (AREA)
DE602005018561T 2004-01-28 2005-01-26 Halbleiterspeicherbauelement und dessen Herstellungsverfahren Active DE602005018561D1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2004019261 2004-01-28
JP2004077797A JP2005244145A (ja) 2004-01-28 2004-03-18 半導体記憶装置及びその製造方法

Publications (1)

Publication Number Publication Date
DE602005018561D1 true DE602005018561D1 (de) 2010-02-11

Family

ID=34680677

Family Applications (1)

Application Number Title Priority Date Filing Date
DE602005018561T Active DE602005018561D1 (de) 2004-01-28 2005-01-26 Halbleiterspeicherbauelement und dessen Herstellungsverfahren

Country Status (7)

Country Link
US (1) US20050169043A1 (de)
EP (1) EP1562235B1 (de)
JP (1) JP2005244145A (de)
KR (1) KR100680565B1 (de)
CN (1) CN100461417C (de)
DE (1) DE602005018561D1 (de)
TW (1) TWI256675B (de)

Families Citing this family (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4880894B2 (ja) * 2004-11-17 2012-02-22 シャープ株式会社 半導体記憶装置の構造及びその製造方法
JP4911037B2 (ja) 2006-01-18 2012-04-04 富士通株式会社 抵抗記憶素子及びその製造方法
US7362608B2 (en) * 2006-03-02 2008-04-22 Infineon Technologies Ag Phase change memory fabricated using self-aligned processing
KR101418434B1 (ko) * 2008-03-13 2014-08-14 삼성전자주식회사 비휘발성 메모리 장치, 이의 제조 방법, 및 이를 포함하는프로세싱 시스템
US9030867B2 (en) 2008-10-20 2015-05-12 Seagate Technology Llc Bipolar CMOS select device for resistive sense memory
US8159856B2 (en) * 2009-07-07 2012-04-17 Seagate Technology Llc Bipolar select device for resistive sense memory
US8648426B2 (en) 2010-12-17 2014-02-11 Seagate Technology Llc Tunneling transistors
US10296480B2 (en) 2011-10-20 2019-05-21 SK Hynix Inc. Data processing system having combined memory block and stack package
KR20130043474A (ko) 2011-10-20 2013-04-30 에스케이하이닉스 주식회사 통합 메모리 블록 및 이를 포함하는 데이터 처리 시스템
JP5726715B2 (ja) 2011-11-28 2015-06-03 株式会社東芝 半導体記憶装置
US20130341581A1 (en) * 2012-06-13 2013-12-26 Dan Ritter Device, a method for measuring temperature and a programmable insulator-semiconductor bipolar transistor
CN103579279B (zh) * 2012-08-02 2016-02-24 旺宏电子股份有限公司 具有三维阵列结构的存储装置
DE102014113557B4 (de) * 2014-09-19 2020-06-10 Infineon Technologies Ag Halbleitervorrichtung mit variablem resistivem element
EP4362627A1 (de) * 2022-10-27 2024-05-01 STMicroelectronics Crolles 2 SAS Verfahren zur herstellung eines elektronischen chips mit einer speicherschaltung
US20240172455A1 (en) * 2022-11-21 2024-05-23 Globalfoundries U.S. Inc. Array arrangements of vertical bipolar junction transistors

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2783579B2 (ja) * 1989-03-01 1998-08-06 株式会社東芝 半導体装置
US5936274A (en) * 1997-07-08 1999-08-10 Micron Technology, Inc. High density flash memory
US6204139B1 (en) * 1998-08-25 2001-03-20 University Of Houston Method for switching the properties of perovskite materials used in thin film resistors
US6531373B2 (en) * 2000-12-27 2003-03-11 Ovonyx, Inc. Method of forming a phase-change memory cell using silicon on insulator low electrode in charcogenide elements
US6804502B2 (en) * 2001-10-10 2004-10-12 Peregrine Semiconductor Corporation Switch circuit and method of switching radio frequency signals
US6579760B1 (en) * 2002-03-28 2003-06-17 Macronix International Co., Ltd. Self-aligned, programmable phase change memory
JP4282314B2 (ja) * 2002-06-25 2009-06-17 シャープ株式会社 記憶装置
US6746910B2 (en) * 2002-09-30 2004-06-08 Sharp Laboratories Of America, Inc. Method of fabricating self-aligned cross-point memory array

Also Published As

Publication number Publication date
US20050169043A1 (en) 2005-08-04
JP2005244145A (ja) 2005-09-08
TW200535938A (en) 2005-11-01
TWI256675B (en) 2006-06-11
EP1562235A2 (de) 2005-08-10
KR100680565B1 (ko) 2007-02-08
CN1649158A (zh) 2005-08-03
EP1562235B1 (de) 2009-12-30
CN100461417C (zh) 2009-02-11
EP1562235A3 (de) 2006-06-07
KR20050077778A (ko) 2005-08-03

Similar Documents

Publication Publication Date Title
DE602005018561D1 (de) Halbleiterspeicherbauelement und dessen Herstellungsverfahren
DE602004009821D1 (de) Halbleiterbauelement und Herstellungsverfahren dafür
DE602004027663D1 (de) Zufallszahlen-erzeugungsverfahren und integrierte halbleiterschaltungseinrichtung
TWI348741B (en) Semiconductor device and method of manufacturing the same
EP1935027A4 (de) Halbleiterbauelement und herstellungsverfahren dafür
EP1946374A4 (de) Halbleitervorrichtung und herstellungsverfahren dafür
EP1966740A4 (de) Halbleiterbauelement und herstellungsverfahren dafür
DE602005009957D1 (de) Rfid-einrichtung und herstellungsverfahren
DE602005009411D1 (de) Halbleiterspeichervorrichtung
DE602006011803D1 (de) Zeilenlayoutstruktur, Halbleiterspeichervorrichtung und Layoutverfahren
SG114787A1 (en) Semiconductor device and manufacturing method of the same
DE602005012028D1 (de) Nichtflüchtige Halbleiterspeicheranordnung und Leseverfahren
DE602005016394D1 (de) Steinrückholvorrichtung und relevante herstellungsverfahren
TWI351075B (en) Semiconductor device, embedded memory, and method of fabricating the same
SG131100A1 (en) Semiconductor device and manufacturing method of the same
EP1817796A4 (de) Halbleiterbauelement und herstellungsverfahren dafür
ITMI20050704A1 (it) Dispositivo semiconduttore e metodo di produzione dello stesso
DE602005006197D1 (de) Halbleiterspeicherbaustein
SG119329A1 (en) Semiconductor device and method for manufacturing the same
DE602007006370D1 (de) Halbleiterbauelement und Herstellungsverfahren dafür
DE602005019383D1 (de) Halbleiterspeicher und Systemvorrichtung
DE602007013325D1 (de) Halbleitervorrichtung und Herstellungsverfahren dafür
GB0707819D0 (en) Semiconductor device and manufacturing method thereof
TWI318006B (en) Semiconductor device and manufacturing method thereof
EP1846952A4 (de) Halbleiterbauelement und verfahren zu seiner herstellung

Legal Events

Date Code Title Description
8364 No opposition during term of opposition