DE60224611D1 - Leiterplatte mit eingebetteter elektrischer Vorrichtung und Verfahren zur Herstellung einer Leiterplatte mit eingebetteter elektrischer Vorrichtung - Google Patents

Leiterplatte mit eingebetteter elektrischer Vorrichtung und Verfahren zur Herstellung einer Leiterplatte mit eingebetteter elektrischer Vorrichtung

Info

Publication number
DE60224611D1
DE60224611D1 DE60224611T DE60224611T DE60224611D1 DE 60224611 D1 DE60224611 D1 DE 60224611D1 DE 60224611 T DE60224611 T DE 60224611T DE 60224611 T DE60224611 T DE 60224611T DE 60224611 D1 DE60224611 D1 DE 60224611D1
Authority
DE
Germany
Prior art keywords
circuit board
printed circuit
electrical device
embedded electrical
manufacturing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE60224611T
Other languages
English (en)
Other versions
DE60224611T2 (de
Inventor
Koji Kondo
Tomohiro Yokochi
Toshihiro Miyake
Satoshi Takeuchi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Denso Corp
Original Assignee
Denso Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from JP2001204023A external-priority patent/JP3882540B2/ja
Priority claimed from JP2002062394A external-priority patent/JP3867593B2/ja
Application filed by Denso Corp filed Critical Denso Corp
Publication of DE60224611D1 publication Critical patent/DE60224611D1/de
Application granted granted Critical
Publication of DE60224611T2 publication Critical patent/DE60224611T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/18Printed circuits structurally associated with non-printed electric components
    • H05K1/182Printed circuits structurally associated with non-printed electric components associated with components mounted in the printed circuit board, e.g. insert mounted components [IMC]
    • H05K1/185Components encapsulated in the insulating substrate of the printed circuit or incorporated in internal layers of a multilayer circuit
    • H05K1/186Components encapsulated in the insulating substrate of the printed circuit or incorporated in internal layers of a multilayer circuit manufactured by mounting on or connecting to patterned circuits before or during embedding
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4611Manufacturing multilayer circuits by laminating two or more circuit boards
    • H05K3/4614Manufacturing multilayer circuits by laminating two or more circuit boards the electrical connections between the circuit boards being made during lamination
    • H05K3/4617Manufacturing multilayer circuits by laminating two or more circuit boards the electrical connections between the circuit boards being made during lamination characterized by laminating only or mainly similar single-sided circuit boards
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4611Manufacturing multilayer circuits by laminating two or more circuit boards
    • H05K3/4626Manufacturing multilayer circuits by laminating two or more circuit boards characterised by the insulating layers or materials
    • H05K3/4632Manufacturing multilayer circuits by laminating two or more circuit boards characterised by the insulating layers or materials laminating thermoplastic or uncured resin sheets comprising printed circuits without added adhesive materials between the sheets
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554External layer
    • H01L2224/0556Disposition
    • H01L2224/05568Disposition the whole external layer protruding from the surface
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554External layer
    • H01L2224/05573Single external layer
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484Connecting portions
    • H01L2224/4847Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond
    • H01L2224/48472Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond the other connecting portion not on the bonding area also being a wedge bond, i.e. wedge-to-wedge
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01078Platinum [Pt]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01079Gold [Au]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/1901Structure
    • H01L2924/1904Component type
    • H01L2924/19041Component type being a capacitor
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/03Use of materials for the substrate
    • H05K1/05Insulated conductive substrates, e.g. insulated metal substrate
    • H05K1/056Insulated conductive substrates, e.g. insulated metal substrate the metal substrate being covered by an organic insulating layer
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/01Dielectrics
    • H05K2201/0104Properties and characteristics in general
    • H05K2201/0129Thermoplastic polymer, e.g. auto-adhesive layer; Shaping of thermoplastic polymer
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/03Conductive materials
    • H05K2201/0332Structure of the conductor
    • H05K2201/0388Other aspects of conductors
    • H05K2201/0394Conductor crossing over a hole in the substrate or a gap between two separate substrate parts
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10621Components characterised by their electrical contacts
    • H05K2201/10636Leadless chip, e.g. chip capacitor or resistor
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/06Lamination
    • H05K2203/063Lamination of preperforated insulating layer
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/40Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/4038Through-connections; Vertical interconnect access [VIA] connections
    • H05K3/4053Through-connections; Vertical interconnect access [VIA] connections by thick-film techniques
    • H05K3/4069Through-connections; Vertical interconnect access [VIA] connections by thick-film techniques for via connections in organic insulating substrates
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02PCLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50Manufacturing or production processes characterised by the final manufactured product
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00Metal working
    • Y10T29/49Method of mechanical manufacture
    • Y10T29/49002Electrical device making
    • Y10T29/49117Conductor or circuit manufacturing
    • Y10T29/49124On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/4913Assembling to base an electrical component, e.g., capacitor, etc.
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00Metal working
    • Y10T29/49Method of mechanical manufacture
    • Y10T29/49002Electrical device making
    • Y10T29/49117Conductor or circuit manufacturing
    • Y10T29/49124On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/4913Assembling to base an electrical component, e.g., capacitor, etc.
    • Y10T29/49131Assembling to base an electrical component, e.g., capacitor, etc. by utilizing optical sighting device
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00Metal working
    • Y10T29/49Method of mechanical manufacture
    • Y10T29/49002Electrical device making
    • Y10T29/49117Conductor or circuit manufacturing
    • Y10T29/49124On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/4913Assembling to base an electrical component, e.g., capacitor, etc.
    • Y10T29/49133Assembling to base an electrical component, e.g., capacitor, etc. with component orienting
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00Metal working
    • Y10T29/49Method of mechanical manufacture
    • Y10T29/49002Electrical device making
    • Y10T29/49117Conductor or circuit manufacturing
    • Y10T29/49124On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/49147Assembling terminal to base
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00Metal working
    • Y10T29/49Method of mechanical manufacture
    • Y10T29/49002Electrical device making
    • Y10T29/49117Conductor or circuit manufacturing
    • Y10T29/49124On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/49155Manufacturing circuit on or in base
    • Y10T29/49165Manufacturing circuit on or in base by forming conductive walled aperture in base
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T428/00Stock material or miscellaneous articles
    • Y10T428/24Structurally defined web or sheet [e.g., overall dimension, etc.]
    • Y10T428/24802Discontinuous or differential coating, impregnation or bond [e.g., artwork, printing, retouched photograph, etc.]
    • Y10T428/24917Discontinuous or differential coating, impregnation or bond [e.g., artwork, printing, retouched photograph, etc.] including metal layer

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Laminated Bodies (AREA)
DE60224611T 2001-06-13 2002-06-13 Leiterplatte mit eingebetteter elektrischer Vorrichtung und Verfahren zur Herstellung einer Leiterplatte mit eingebetteter elektrischer Vorrichtung Expired - Lifetime DE60224611T2 (de)

Applications Claiming Priority (8)

Application Number Priority Date Filing Date Title
JP2001179118 2001-06-13
JP2001179118 2001-06-13
JP2001199392 2001-06-29
JP2001199392 2001-06-29
JP2001204023 2001-07-04
JP2001204023A JP3882540B2 (ja) 2001-07-04 2001-07-04 プリント基板の製造方法およびその製造方法によって形成されるプリント基板
JP2002062394A JP3867593B2 (ja) 2001-06-13 2002-03-07 プリント基板の製造方法およびその製造方法によって形成されるプリント基板
JP2002062394 2002-03-07

Publications (2)

Publication Number Publication Date
DE60224611D1 true DE60224611D1 (de) 2008-03-06
DE60224611T2 DE60224611T2 (de) 2009-01-15

Family

ID=27482333

Family Applications (1)

Application Number Title Priority Date Filing Date
DE60224611T Expired - Lifetime DE60224611T2 (de) 2001-06-13 2002-06-13 Leiterplatte mit eingebetteter elektrischer Vorrichtung und Verfahren zur Herstellung einer Leiterplatte mit eingebetteter elektrischer Vorrichtung

Country Status (8)

Country Link
US (2) US6680441B2 (de)
EP (1) EP1267597B1 (de)
KR (1) KR100488412B1 (de)
CN (1) CN100475003C (de)
DE (1) DE60224611T2 (de)
MX (1) MXPA02005829A (de)
SG (1) SG102054A1 (de)
TW (1) TW545100B (de)

Families Citing this family (58)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100488412B1 (ko) * 2001-06-13 2005-05-11 가부시키가이샤 덴소 내장된 전기소자를 갖는 인쇄 배선 기판 및 그 제조 방법
JP2003332749A (ja) 2002-01-11 2003-11-21 Denso Corp 受動素子内蔵基板、その製造方法及び受動素子内蔵基板形成用素板
US6756662B2 (en) * 2002-09-25 2004-06-29 International Business Machines Corporation Semiconductor chip module and method of manufacture of same
FI20030293A (fi) * 2003-02-26 2004-08-27 Imbera Electronics Oy Menetelmä elektroniikkamoduulin valmistamiseksi ja elektroniikkamoduuli
JP2005158770A (ja) * 2003-11-20 2005-06-16 Matsushita Electric Ind Co Ltd 積層基板とその製造方法及び前記積層基板を用いたモジュールの製造方法とその製造装置
US20050233122A1 (en) * 2004-04-19 2005-10-20 Mikio Nishimura Manufacturing method of laminated substrate, and manufacturing apparatus of semiconductor device for module and laminated substrate for use therein
WO2006011320A1 (ja) * 2004-07-30 2006-02-02 Murata Manufacturing Co., Ltd. 複合型電子部品及びその製造方法
JP4575071B2 (ja) * 2004-08-02 2010-11-04 新光電気工業株式会社 電子部品内蔵基板の製造方法
US7022464B2 (en) * 2004-08-25 2006-04-04 Peter Kukanskis Integral plated resistor and method for the manufacture of printed circuit boards comprising the same
JP2006073763A (ja) * 2004-09-01 2006-03-16 Denso Corp 多層基板の製造方法
TWI287805B (en) * 2005-11-11 2007-10-01 Ind Tech Res Inst Composite conductive film and semiconductor package using such film
US7365273B2 (en) * 2004-12-03 2008-04-29 Delphi Technologies, Inc. Thermal management of surface-mount circuit devices
GB2438816B (en) * 2005-04-12 2009-04-01 Yaskawa Denki Seisakusho Kk Canned linear motor armature and canned linear motor
JP2006324567A (ja) * 2005-05-20 2006-11-30 Matsushita Electric Ind Co Ltd 部品内蔵基板とその製造方法
AU2006265765B2 (en) * 2005-07-04 2009-08-27 Griffith University Fabrication of electronic components in plastic
KR100643334B1 (ko) * 2005-11-09 2006-11-10 삼성전기주식회사 소자 내장 인쇄회로기판 및 그 제조방법
JP5114041B2 (ja) * 2006-01-13 2013-01-09 日本シイエムケイ株式会社 半導体素子内蔵プリント配線板及びその製造方法
JP4697037B2 (ja) * 2006-05-09 2011-06-08 株式会社デンソー 部品内蔵基板及びその配線不良検査方法
JP2007324550A (ja) * 2006-06-05 2007-12-13 Denso Corp 多層基板
US7459202B2 (en) * 2006-07-03 2008-12-02 Motorola, Inc. Printed circuit board
WO2008047918A1 (fr) * 2006-10-20 2008-04-24 Nec Corporation Structure de paquet de dispositifs électroniques et procédé de fabrication correspondant
JP4862641B2 (ja) * 2006-12-06 2012-01-25 株式会社デンソー 多層基板及び多層基板の製造方法
US7504283B2 (en) * 2006-12-18 2009-03-17 Texas Instruments Incorporated Stacked-flip-assembled semiconductor chips embedded in thin hybrid substrate
JP4840132B2 (ja) * 2006-12-26 2011-12-21 株式会社デンソー 多層基板の製造方法
DE102007024189A1 (de) * 2007-05-24 2008-11-27 Robert Bosch Gmbh Verfahren zur Herstellung einer elektronischen Baugruppe
WO2008155957A1 (ja) * 2007-06-19 2008-12-24 Murata Manufacturing Co., Ltd. 部品内蔵基板の製造方法および部品内蔵基板
JP5012896B2 (ja) * 2007-06-26 2012-08-29 株式会社村田製作所 部品内蔵基板の製造方法
US20090114345A1 (en) * 2007-11-07 2009-05-07 Sumitomo Metal Mining Co., Ltd. Method for manufacturing a substrate for mounting a semiconductor element
JP4548509B2 (ja) * 2008-04-23 2010-09-22 株式会社デンソー プリント基板製造装置
US20100012354A1 (en) * 2008-07-14 2010-01-21 Logan Brook Hedin Thermally conductive polymer based printed circuit board
WO2010018708A1 (ja) * 2008-08-12 2010-02-18 株式会社村田製作所 部品内蔵モジュールの製造方法及び部品内蔵モジュール
KR101089840B1 (ko) * 2009-04-01 2011-12-05 삼성전기주식회사 회로 기판 모듈 및 그의 제조 방법
WO2010113448A1 (ja) * 2009-04-02 2010-10-07 パナソニック株式会社 回路基板の製造方法および回路基板
US9299539B2 (en) * 2009-08-21 2016-03-29 Lam Research Corporation Method and apparatus for measuring wafer bias potential
JP5126278B2 (ja) 2010-02-04 2013-01-23 株式会社デンソー 半導体装置およびその製造方法
JP2011249745A (ja) * 2010-04-28 2011-12-08 Denso Corp 多層基板
JP5454681B2 (ja) * 2010-05-26 2014-03-26 株式会社村田製作所 モジュール基板およびその製造方法
JP5062302B2 (ja) 2010-06-29 2012-10-31 株式会社デンソー 冷却器への電子部品内蔵配線基板の取付構造及びその取付方法
CN102986314B (zh) * 2010-07-06 2016-10-12 株式会社藤仓 层叠配线基板及其制造方法
JP5447453B2 (ja) 2010-11-03 2014-03-19 株式会社デンソー スイッチングモジュール
TWM411098U (en) 2011-01-28 2011-09-01 Chunghwa Picture Tubes Ltd Circuit board assembly
JP2012186279A (ja) * 2011-03-04 2012-09-27 Fujikura Ltd 電子部品を内蔵した積層プリント配線板及びその製造方法
JP5622939B2 (ja) * 2011-08-23 2014-11-12 株式会社フジクラ 部品内蔵基板およびその製造方法
US9277645B2 (en) * 2012-01-18 2016-03-01 Covidien Lp Method of manufacturing a printed circuit board
US9351395B2 (en) * 2012-01-18 2016-05-24 Covidien Lp Printed circuit boards including strip-line circuitry and methods of manufacturing same
JP5574073B2 (ja) * 2012-06-14 2014-08-20 株式会社村田製作所 高周波モジュール
CN105027692B (zh) 2013-05-17 2018-01-30 株式会社村田制作所 元器件内置多层基板的制造方法以及元器件内置多层基板
DE102015113322B3 (de) 2015-08-12 2016-11-17 Schweizer Electronic Ag Hochfrequenzantenne, Hochfrequenzsubstrat mit Hochfrequenzantenne und Verfahren zur Herstellung
DE102015113324A1 (de) 2015-08-12 2017-02-16 Schweizer Electronic Ag Leiterstrukturelement mit einlaminiertem Innenlagensubstrat und Verfahren zu dessen Herstellung
JP6388097B2 (ja) 2016-05-18 2018-09-12 株式会社村田製作所 部品内蔵基板の製造方法
CN209358846U (zh) 2016-06-02 2019-09-06 株式会社村田制作所 树脂多层基板
WO2018030262A1 (ja) 2016-08-09 2018-02-15 株式会社村田製作所 モジュール部品の製造方法
JP6717245B2 (ja) * 2017-03-17 2020-07-01 三菱マテリアル株式会社 接合体の製造方法、絶縁回路基板の製造方法、及び、ヒートシンク付き絶縁回路基板の製造方法
CN112201652A (zh) * 2019-07-07 2021-01-08 深南电路股份有限公司 线路板及其制作方法
KR20210076585A (ko) 2019-12-16 2021-06-24 삼성전기주식회사 전자부품 내장기판
CN113498633B (zh) * 2020-01-21 2023-09-15 鹏鼎控股(深圳)股份有限公司 内埋电子元件的电路板及制作方法
EP4156874A4 (de) 2020-07-07 2024-02-14 Shennan Circuits Co., Ltd. Leiterplatte und herstellungsverfahren dafür
TWI777741B (zh) * 2021-08-23 2022-09-11 欣興電子股份有限公司 內埋元件基板及其製作方法

Family Cites Families (41)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60116191A (ja) * 1983-11-29 1985-06-22 イビデン株式会社 電子部品搭載用基板の製造方法
JPS60137092A (ja) * 1983-12-19 1985-07-20 株式会社東芝 回路基板の製造方法
JPH01251778A (ja) * 1988-03-31 1989-10-06 Toshiba Corp Icカード
JPH02150098A (ja) 1988-12-01 1990-06-08 Japan Radio Co Ltd 多層混成集積回路
JPH03191596A (ja) 1989-12-21 1991-08-21 Nippon Cement Co Ltd コンデンサ内蔵多層セラミック基板の製造方法
US5161093A (en) * 1990-07-02 1992-11-03 General Electric Company Multiple lamination high density interconnect process and structure employing a variable crosslinking adhesive
JPH04163988A (ja) * 1990-10-29 1992-06-09 Toshiba Corp 電池内装型プリント配線板
JP2816028B2 (ja) * 1991-02-18 1998-10-27 株式会社東芝 半導体装置の製造方法
JPH06120670A (ja) 1991-03-12 1994-04-28 Japan Radio Co Ltd 多層配線基板
JPH04356998A (ja) 1991-06-01 1992-12-10 Ibiden Co Ltd マルチチップモジュール
US5336928A (en) * 1992-09-18 1994-08-09 General Electric Company Hermetically sealed packaged electronic system
EP0644587B1 (de) * 1993-09-01 2002-07-24 Kabushiki Kaisha Toshiba Halbleiteraufbau und Verfahren zur Herstellung
JPH07263867A (ja) 1994-03-18 1995-10-13 Fujitsu General Ltd 多層配線基板
US6031723A (en) * 1994-08-18 2000-02-29 Allen-Bradley Company, Llc Insulated surface mount circuit board construction
KR0172779B1 (ko) * 1995-03-29 1999-03-20 김주용 감광막 제거 방법
JP3610999B2 (ja) * 1996-06-07 2005-01-19 松下電器産業株式会社 半導体素子の実装方法
TW383435B (en) * 1996-11-01 2000-03-01 Hitachi Chemical Co Ltd Electronic device
US5808873A (en) * 1997-05-30 1998-09-15 Motorola, Inc. Electronic component assembly having an encapsulation material and method of forming the same
JPH11126978A (ja) 1997-10-24 1999-05-11 Kyocera Corp 多層配線基板
JPH11145381A (ja) 1997-11-12 1999-05-28 Denso Corp 半導体マルチチップモジュール
US6038133A (en) * 1997-11-25 2000-03-14 Matsushita Electric Industrial Co., Ltd. Circuit component built-in module and method for producing the same
JP2000208698A (ja) 1999-01-18 2000-07-28 Toshiba Corp 半導体装置
KR100563122B1 (ko) * 1998-01-30 2006-03-21 다이요 유덴 가부시키가이샤 하이브리드 모듈 및 그 제조방법 및 그 설치방법
JPH11233904A (ja) * 1998-02-18 1999-08-27 Nec Corp 放熱構造プリント基板
JP3236818B2 (ja) 1998-04-28 2001-12-10 京セラ株式会社 素子内蔵多層配線基板の製造方法
US6180881B1 (en) 1998-05-05 2001-01-30 Harlan Ruben Isaak Chip stack and method of making same
JP3119630B2 (ja) * 1998-09-18 2000-12-25 日本電気株式会社 半導体チップモジュール用多層回路基板およびその製造方法
US6404643B1 (en) * 1998-10-15 2002-06-11 Amerasia International Technology, Inc. Article having an embedded electronic device, and method of making same
JP2000151112A (ja) * 1998-11-10 2000-05-30 Toshiba Corp 配線基板及びその製造方法
JP3207174B2 (ja) 1999-02-01 2001-09-10 京セラ株式会社 電気素子搭載配線基板およびその製造方法
JP3213292B2 (ja) * 1999-07-12 2001-10-02 ソニーケミカル株式会社 多層基板、及びモジュール
US6449836B1 (en) * 1999-07-30 2002-09-17 Denso Corporation Method for interconnecting printed circuit boards and interconnection structure
JP3619395B2 (ja) * 1999-07-30 2005-02-09 京セラ株式会社 半導体素子内蔵配線基板およびその製造方法
TW472330B (en) 1999-08-26 2002-01-11 Toshiba Corp Semiconductor device and the manufacturing method thereof
JP2001119147A (ja) 1999-10-14 2001-04-27 Sony Corp 電子部品内蔵多層基板及びその製造方法
JP2001251056A (ja) * 2000-03-03 2001-09-14 Sony Corp プリント配線基板の製造方法
US6292366B1 (en) 2000-06-26 2001-09-18 Intel Corporation Printed circuit board with embedded integrated circuit
TW511415B (en) * 2001-01-19 2002-11-21 Matsushita Electric Ind Co Ltd Component built-in module and its manufacturing method
US6621012B2 (en) * 2001-02-01 2003-09-16 International Business Machines Corporation Insertion of electrical component within a via of a printed circuit board
US6512182B2 (en) * 2001-03-12 2003-01-28 Ngk Spark Plug Co., Ltd. Wiring circuit board and method for producing same
KR100488412B1 (ko) * 2001-06-13 2005-05-11 가부시키가이샤 덴소 내장된 전기소자를 갖는 인쇄 배선 기판 및 그 제조 방법

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EP1267597A2 (de) 2002-12-18
US20040091687A1 (en) 2004-05-13
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TW545100B (en) 2003-08-01
US20020192442A1 (en) 2002-12-19
DE60224611T2 (de) 2009-01-15
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US7165321B2 (en) 2007-01-23
US6680441B2 (en) 2004-01-20
CN100475003C (zh) 2009-04-01

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