DE69942196D1 - Methode zur Herstellung einer Dickschichthybridschaltung auf einer Metalleiterplatte - Google Patents

Methode zur Herstellung einer Dickschichthybridschaltung auf einer Metalleiterplatte

Info

Publication number
DE69942196D1
DE69942196D1 DE69942196T DE69942196T DE69942196D1 DE 69942196 D1 DE69942196 D1 DE 69942196D1 DE 69942196 T DE69942196 T DE 69942196T DE 69942196 T DE69942196 T DE 69942196T DE 69942196 D1 DE69942196 D1 DE 69942196D1
Authority
DE
Germany
Prior art keywords
thick
producing
circuit board
film hybrid
metal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69942196T
Other languages
English (en)
Inventor
Marion Edmund Ellis
Frans Peter Lautzenhiser
Anthony John Stankavich
Dwadasi Hare Rama Sarma
Philip Harbaugh Bowles
Washington Morris Mobley
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Callahan Cellular LLC
Original Assignee
Casantra Acquisition III LLC
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Casantra Acquisition III LLC filed Critical Casantra Acquisition III LLC
Application granted granted Critical
Publication of DE69942196D1 publication Critical patent/DE69942196D1/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/42—Fillings or auxiliary members in containers or encapsulations selected or arranged to facilitate heating or cooling
    • H01L23/433—Auxiliary members in containers characterised by their shape, e.g. pistons
    • H01L23/4334—Auxiliary members in encapsulations
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/12—Mountings, e.g. non-detachable insulating substrates
    • H01L23/14—Mountings, e.g. non-detachable insulating substrates characterised by the material or its electrical properties
    • H01L23/142—Metallic substrates having insulating layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/3135—Double encapsulation or coating and encapsulation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49866—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers characterised by the materials
    • H01L23/49894—Materials of the insulating layers or coatings
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/03—Use of materials for the substrate
    • H05K1/05—Insulated conductive substrates, e.g. insulated metal substrate
    • H05K1/053—Insulated conductive substrates, e.g. insulated metal substrate the metal substrate being covered by an inorganic insulating layer
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/05599—Material
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001—Core members of the connector
    • H01L2224/4501—Shape
    • H01L2224/45012—Cross-sectional shape
    • H01L2224/45015—Cross-sectional shape being circular
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/8538—Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/85399—Material
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/0102—Calcium [Ca]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01025—Manganese [Mn]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01046—Palladium [Pd]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/095—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00 with a principal constituent of the material being a combination of two or more materials provided in the groups H01L2924/013 - H01L2924/0715
    • H01L2924/097—Glass-ceramics, e.g. devitrified glass
    • H01L2924/09701—Low temperature co-fired ceramic [LTCC]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/12—Passive devices, e.g. 2 terminal devices
    • H01L2924/1204—Optical Diode
    • H01L2924/12041—LED
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/1901—Structure
    • H01L2924/1904—Component type
    • H01L2924/19041—Component type being a capacitor
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/16—Printed circuits incorporating printed electric components, e.g. printed resistor, capacitor, inductor
    • H05K1/162—Printed circuits incorporating printed electric components, e.g. printed resistor, capacitor, inductor incorporating printed capacitors
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/16—Printed circuits incorporating printed electric components, e.g. printed resistor, capacitor, inductor
    • H05K1/167—Printed circuits incorporating printed electric components, e.g. printed resistor, capacitor, inductor incorporating printed resistors
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/4913—Assembling to base an electrical component, e.g., capacitor, etc.
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/4913—Assembling to base an electrical component, e.g., capacitor, etc.
    • Y10T29/49144—Assembling to base an electrical component, e.g., capacitor, etc. by metal fusion
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/49155—Manufacturing circuit on or in base

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Inorganic Chemistry (AREA)
  • Parts Printed On Printed Circuit Boards (AREA)
  • Insulated Metal Substrates For Printed Circuits (AREA)
DE69942196T 1999-01-17 1999-12-20 Methode zur Herstellung einer Dickschichthybridschaltung auf einer Metalleiterplatte Expired - Lifetime DE69942196D1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US09/232,951 US6233817B1 (en) 1999-01-17 1999-01-17 Method of forming thick-film hybrid circuit on a metal circuit board

Publications (1)

Publication Number Publication Date
DE69942196D1 true DE69942196D1 (de) 2010-05-12

Family

ID=22875237

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69942196T Expired - Lifetime DE69942196D1 (de) 1999-01-17 1999-12-20 Methode zur Herstellung einer Dickschichthybridschaltung auf einer Metalleiterplatte

Country Status (3)

Country Link
US (1) US6233817B1 (de)
EP (1) EP1020909B1 (de)
DE (1) DE69942196D1 (de)

Families Citing this family (28)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6077766A (en) * 1999-06-25 2000-06-20 International Business Machines Corporation Variable thickness pads on a substrate surface
US6528145B1 (en) * 2000-06-29 2003-03-04 International Business Machines Corporation Polymer and ceramic composite electronic substrates
DE10113474B4 (de) * 2001-03-17 2007-09-13 Siemens Ag Elektrische Schaltung
US6822331B2 (en) * 2001-06-14 2004-11-23 Delphi Technologies, Inc. Method of mounting a circuit component and joint structure therefor
US7304276B2 (en) * 2001-06-21 2007-12-04 Watlow Electric Manufacturing Company Thick film heater integrated with low temperature components and method of making the same
US20020195268A1 (en) * 2001-06-21 2002-12-26 Schendel Robert E. Thick film circuit connection
TW560231B (en) * 2002-03-27 2003-11-01 United Test Ct Inc Fabrication method of circuit board
EP1365450A1 (de) * 2002-05-24 2003-11-26 Ultratera Corporation Verbessertes drahtgebundenes Chip-on-board-Gehäuse
US6750084B2 (en) 2002-06-21 2004-06-15 Delphi Technologies, Inc. Method of mounting a leadless package and structure therefor
US7177143B1 (en) 2002-08-05 2007-02-13 Communication Associates, Inc. Molded electronic components
CA2520241C (en) * 2003-04-15 2013-05-28 Naomi Yonemura Metal base circuit board and its production process
JP2005191148A (ja) * 2003-12-24 2005-07-14 Sanyo Electric Co Ltd 混成集積回路装置およびその製造方法
JP4383257B2 (ja) * 2004-05-31 2009-12-16 三洋電機株式会社 回路装置およびその製造方法
CN100420049C (zh) * 2005-02-02 2008-09-17 银河制版印刷有限公司 发光二极管模块的基板结构
DE102005011857B4 (de) * 2005-03-15 2007-03-22 Alcan Technology & Management Ag Flächige Beleuchtungseinrichtung
KR101283182B1 (ko) 2006-01-26 2013-07-05 엘지이노텍 주식회사 발광 다이오드 패키지 및 그 제조 방법
US20080299401A1 (en) * 2007-06-01 2008-12-04 Jesus Carmona Valdes Conductive sensing elements for applications in corrosive environments
US20080318061A1 (en) * 2007-06-20 2008-12-25 Akira Inaba Insulation paste for a metal core substrate and electronic device
US20100086771A1 (en) * 2008-10-08 2010-04-08 E. I. Du Pont De Nemours And Company Substrate for Lighting Device and Production Thereof
JP4572994B2 (ja) 2008-10-28 2010-11-04 東芝ライテック株式会社 発光モジュールおよび照明装置
US8424176B2 (en) * 2008-11-25 2013-04-23 Kovio, Inc. Methods of forming tunable capacitors
EP2524773B1 (de) 2011-05-19 2017-06-21 Black & Decker Inc. Elektronische Energievorrichtung für ein Elektrowerkzeug
WO2014073038A1 (ja) * 2012-11-06 2014-05-15 日本碍子株式会社 発光ダイオード用基板
JP6125528B2 (ja) * 2012-11-06 2017-05-10 日本碍子株式会社 発光ダイオード用基板および発光ダイオード用基板の製造方法
US20160014900A1 (en) 2014-07-10 2016-01-14 United Technologies Corporation Apparatus, system, and method for electronics manufacturing using direct write with fabricated foils
US10629513B2 (en) * 2015-06-04 2020-04-21 Eaton Intelligent Power Limited Ceramic plated materials for electrical isolation and thermal transfer
US10608501B2 (en) 2017-05-24 2020-03-31 Black & Decker Inc. Variable-speed input unit having segmented pads for a power tool
US11155023B2 (en) 2019-01-04 2021-10-26 Rohr, Inc. Stretching and deployment of a sensor network for large structure monitoring

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4163072A (en) * 1977-06-07 1979-07-31 Bell Telephone Laboratories, Incorporated Encapsulation of circuits
US4658332A (en) * 1983-04-04 1987-04-14 Raytheon Company Compliant layer printed circuit board
US4650923A (en) * 1984-06-01 1987-03-17 Narumi China Corporation Ceramic article having a high moisture proof
JPS611088A (ja) * 1984-06-14 1986-01-07 松下電器産業株式会社 導電回路の形成法
US4997698A (en) * 1987-05-04 1991-03-05 Allied-Signal, Inc. Ceramic coated metal substrates for electronic applications
US4794048A (en) * 1987-05-04 1988-12-27 Allied-Signal Inc. Ceramic coated metal substrates for electronic applications
KR970008145B1 (ko) * 1991-12-18 1997-05-21 제너럴 일렉트릭 컴페니 세라믹-온 금속-회로 기판 및 그 제조방법
US5527627A (en) * 1993-03-29 1996-06-18 Delco Electronics Corp. Ink composition for an ultra-thick thick film for thermal management of a hybrid circuit
JP2756075B2 (ja) * 1993-08-06 1998-05-25 三菱電機株式会社 金属ベース基板およびそれを用いた電子機器
US5455000A (en) * 1994-07-01 1995-10-03 Massachusetts Institute Of Technology Method for preparation of a functionally gradient material
WO1996022949A1 (en) * 1995-01-27 1996-08-01 Sarnoff Corporation Low dielectric loss glasses
US5565262A (en) * 1995-01-27 1996-10-15 David Sarnoff Research Center, Inc. Electrical feedthroughs for ceramic circuit board support substrates
US5725808A (en) * 1996-05-23 1998-03-10 David Sarnoff Research Center, Inc. Multilayer co-fired ceramic compositions and ceramic-on-metal circuit board

Also Published As

Publication number Publication date
EP1020909A2 (de) 2000-07-19
EP1020909B1 (de) 2010-03-31
US6233817B1 (en) 2001-05-22
EP1020909A3 (de) 2003-07-09

Similar Documents

Publication Publication Date Title
DE69942196D1 (de) Methode zur Herstellung einer Dickschichthybridschaltung auf einer Metalleiterplatte
DE69842092D1 (de) Verfahren zur Herstellung einer mehrschichtigen gedruckten Leiterplatte
DE602004026257D1 (de) Verfahren zur Herstellung einer flexiblen Leiterplatte
DE60217023D1 (de) Mehrschichtige Leiterplatte und Verfahren zur Herstellung einer mehrschichtigen Leiterplatte
DE60137733D1 (de) Vorrichtung zur Herstellung einer Beatmungskreislauf-Komponente
DE60030949D1 (de) Verfahren zur herstellung einer karte
DE69901142T2 (de) Verfahren zur Herstellung einer Halbleiterschaltung mit Kupfer-Verbindungsleitungen
DE69920629D1 (de) Verfahren zur Herstellung einer biegsamen Schaltungsplatte
DE60224611D1 (de) Leiterplatte mit eingebetteter elektrischer Vorrichtung und Verfahren zur Herstellung einer Leiterplatte mit eingebetteter elektrischer Vorrichtung
DE60234300D1 (de) Verfahren zur Herstellung einer Metall/Keramik-Verbundleiterplatte
DE59510807D1 (de) Verfahren zur herstellung einer dreidimensionalen schaltungsanordnung
DE59508426D1 (de) Verfahren zur herstellung einer dreidimensionalen schaltungsanordnung
DE69932665D1 (de) Verfahren zur Herstellung einer Verbindungsstruktur
DE50109017D1 (de) Verfahren zur herstellung einer elektronischen baugruppe
DE10081175T1 (de) Verfahren zur Herstellung einer dreidimensionalen gedruckten Leiterplatte
DE69607546D1 (de) Verfahren zur Herstellung einer Schaltungsanordnung
DE60039407D1 (de) Verfahren zur Herstellung chrombeschichteten Kupfers für Leiterplatten
DE60134220D1 (de) Verfahren zur herstellung einer heteroübergang-bicmos-integrierter schaltung
DE69800219D1 (de) Verfahren zur Herstellung einer Mehrlagenleiterplatte
DE59508684D1 (de) Verfahren zur herstellung einer dreidimensionalen schaltungsanordnung
DE69925893D1 (de) Verfahren zur Herstellung einer doppelseitigen flexiblen Leiterplatte
DE60207779D1 (de) Verfahren zur Herstellung einer mehrschichtigen Platte
DE69911902D1 (de) Verfahren zur Herstellung einer gedruckten Schaltung
DE69530698D1 (de) Verfahren zur herstellung einer leiterplatte
DE59911874D1 (de) Verfahren zur herstellung einer rohrplatine

Legal Events

Date Code Title Description
8364 No opposition during term of opposition