DE60042811D1 - Herstellungsverfahren für eine ferroelektrische Speichervorrichtung - Google Patents

Herstellungsverfahren für eine ferroelektrische Speichervorrichtung

Info

Publication number
DE60042811D1
DE60042811D1 DE60042811T DE60042811T DE60042811D1 DE 60042811 D1 DE60042811 D1 DE 60042811D1 DE 60042811 T DE60042811 T DE 60042811T DE 60042811 T DE60042811 T DE 60042811T DE 60042811 D1 DE60042811 D1 DE 60042811D1
Authority
DE
Germany
Prior art keywords
manufacturing
memory device
ferroelectric memory
ferroelectric
memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE60042811T
Other languages
English (en)
Inventor
Tatsuya Shimoda
Takao Nishikawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Epson Corp
Original Assignee
Seiko Epson Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seiko Epson Corp filed Critical Seiko Epson Corp
Application granted granted Critical
Publication of DE60042811D1 publication Critical patent/DE60042811D1/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/10—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration
    • H01L27/105—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration including field-effect components
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H01L21/033—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers
    • H01L21/0334—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane
    • H01L21/0337—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane characterised by the process involved to create the mask, e.g. lift-off masks, sidewalls, or to modify the mask, e.g. pre-treatment, post-treatment
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/314—Inorganic layers
    • H01L21/316—Inorganic layers composed of oxides or glassy oxides or oxide based glass
    • H01L21/31691—Inorganic layers composed of oxides or glassy oxides or oxide based glass with perovskite structure
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
    • H01L28/40—Capacitors
    • H01L28/55—Capacitors with a dielectric comprising a perovskite structure material
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
    • H01L28/40—Capacitors
    • H01L28/60—Electrodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B53/00—Ferroelectric RAM [FeRAM] devices comprising ferroelectric memory capacitors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B53/00—Ferroelectric RAM [FeRAM] devices comprising ferroelectric memory capacitors
    • H10B53/30—Ferroelectric RAM [FeRAM] devices comprising ferroelectric memory capacitors characterised by the memory core region
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02172—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides
    • H01L21/02197—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides the material having a perovskite structure, e.g. BaTiO3
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02205—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02263—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
    • H01L21/02271—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02282—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process liquid deposition, e.g. spin-coating, sol-gel techniques, spray coating

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Chemical & Material Sciences (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Materials Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Inorganic Chemistry (AREA)
  • Semiconductor Memories (AREA)
  • Semiconductor Integrated Circuits (AREA)
DE60042811T 1999-06-04 2000-06-02 Herstellungsverfahren für eine ferroelektrische Speichervorrichtung Expired - Lifetime DE60042811D1 (de)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
JP15734399 1999-06-04
JP15734499 1999-06-04
JP2000078545 2000-03-21
PCT/JP2000/003590 WO2000075992A1 (fr) 1999-06-04 2000-06-02 Dispositif memoire ferroelectrique et procede de fabrication d'un tel dispositif

Publications (1)

Publication Number Publication Date
DE60042811D1 true DE60042811D1 (de) 2009-10-08

Family

ID=27321147

Family Applications (1)

Application Number Title Priority Date Filing Date
DE60042811T Expired - Lifetime DE60042811D1 (de) 1999-06-04 2000-06-02 Herstellungsverfahren für eine ferroelektrische Speichervorrichtung

Country Status (8)

Country Link
US (2) US6420190B1 (de)
EP (1) EP1115156B1 (de)
JP (1) JP4045406B2 (de)
KR (1) KR100457121B1 (de)
CN (2) CN100431137C (de)
DE (1) DE60042811D1 (de)
TW (1) TW473998B (de)
WO (1) WO2000075992A1 (de)

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US6835178B1 (en) * 1999-06-23 2004-12-28 Hologic, Inc. Ultrasonic bone testing with copolymer transducers
JP3901432B2 (ja) * 2000-08-22 2007-04-04 セイコーエプソン株式会社 強誘電体キャパシタを有するメモリセルアレイおよびその製造方法
US6756620B2 (en) * 2001-06-29 2004-06-29 Intel Corporation Low-voltage and interface damage-free polymer memory device
US6858862B2 (en) * 2001-06-29 2005-02-22 Intel Corporation Discrete polymer memory array and method of making same
US6624457B2 (en) 2001-07-20 2003-09-23 Intel Corporation Stepped structure for a multi-rank, stacked polymer memory device and method of making same
US6960479B2 (en) * 2001-07-20 2005-11-01 Intel Corporation Stacked ferroelectric memory device and method of making same
US6798003B2 (en) * 2001-07-20 2004-09-28 Intel Corporation Reliable adhesion layer interface structure for polymer memory electrode and method of making same
EP1302441B1 (de) * 2001-10-10 2007-01-03 Rohm And Haas Company Verbessertes Verfahren zur Herstellung von Lithiumborohydrid
US7727777B2 (en) * 2002-05-31 2010-06-01 Ebrahim Andideh Forming ferroelectric polymer memories
US6531325B1 (en) * 2002-06-04 2003-03-11 Sharp Laboratories Of America, Inc. Memory transistor and method of fabricating same
JP2004031728A (ja) * 2002-06-27 2004-01-29 Matsushita Electric Ind Co Ltd 記憶装置
US7049153B2 (en) * 2003-04-23 2006-05-23 Micron Technology, Inc. Polymer-based ferroelectric memory
JP4590854B2 (ja) 2003-10-28 2010-12-01 セイコーエプソン株式会社 圧電体デバイスの製造方法
EP1700331A1 (de) * 2003-12-22 2006-09-13 Koninklijke Philips Electronics N.V. Verfahren zur strukturierung einer ferroelektrischen polymerschicht
JP2005327919A (ja) * 2004-05-14 2005-11-24 Seiko Epson Corp デバイスの製造方法及びデバイス、電気光学素子、プリンタ
EP1675162A3 (de) * 2004-12-27 2007-05-30 Seiko Epson Corporation Ferroelektrische Schicht, Herstellungsverfahren einer ferroelektrischen Schicht, ferrroelektrischer Kondensator, ferroelektrischer Speicher
KR100719345B1 (ko) * 2005-04-18 2007-05-17 삼성전자주식회사 자기 기억 장치의 형성 방법
NO324539B1 (no) * 2005-06-14 2007-11-19 Thin Film Electronics Asa Fremgangsmate i fabrikasjonen av en ferroelektrisk minneinnretning
KR100682950B1 (ko) 2005-07-28 2007-02-15 삼성전자주식회사 강유전체 기록매체 및 그 제조 방법
JP4999185B2 (ja) * 2008-03-04 2012-08-15 富士フイルム株式会社 ドライエッチング方法及びドライエッチング装置
JP2011199106A (ja) * 2010-03-23 2011-10-06 Seiko Epson Corp 圧電素子、圧電アクチュエーター、液滴噴射ヘッド及び液滴噴射装置並びに圧電素子の製造方法
KR20210050630A (ko) * 2019-10-28 2021-05-10 삼성전자주식회사 반도체 메모리 소자
CN113659073B (zh) * 2020-05-12 2024-04-30 中芯国际集成电路制造(上海)有限公司 非易失性存储装置及其形成方法

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US5423285A (en) * 1991-02-25 1995-06-13 Olympus Optical Co., Ltd. Process for fabricating materials for ferroelectric, high dielectric constant, and integrated circuit applications
US5627013A (en) * 1991-11-14 1997-05-06 Rohm Co., Ltd. Method of forming a fine pattern of ferroelectric film
JP2851193B2 (ja) 1991-11-14 1999-01-27 ローム株式会社 強誘電体薄膜微細パターン形成方法
US5335138A (en) * 1993-02-12 1994-08-02 Micron Semiconductor, Inc. High dielectric constant capacitor and method of manufacture
JPH07273216A (ja) 1994-03-30 1995-10-20 Toshiba Corp 金属酸化膜の形成方法
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JP3488007B2 (ja) 1996-03-05 2004-01-19 富士通株式会社 薄膜形成方法、半導体装置及びその製造方法
JP3621162B2 (ja) 1995-09-25 2005-02-16 富士通株式会社 容量素子及びその製造方法、並びに半導体装置
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JP3672115B2 (ja) 1995-09-19 2005-07-13 富士通株式会社 薄膜形成方法及び半導体装置の製造方法
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Also Published As

Publication number Publication date
EP1115156B1 (de) 2009-08-26
CN1149678C (zh) 2004-05-12
US20020142491A1 (en) 2002-10-03
CN100431137C (zh) 2008-11-05
EP1115156A1 (de) 2001-07-11
KR20010072240A (ko) 2001-07-31
US6885050B2 (en) 2005-04-26
KR100457121B1 (ko) 2004-11-16
JP4045406B2 (ja) 2008-02-13
US6420190B1 (en) 2002-07-16
CN1319254A (zh) 2001-10-24
WO2000075992A1 (fr) 2000-12-14
CN1574287A (zh) 2005-02-02
EP1115156A4 (de) 2003-11-05
TW473998B (en) 2002-01-21

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