DE4334263B4 - Generatorschaltung für eine negative Vorspannung für ein Halbleiterspeicherbauelement - Google Patents

Generatorschaltung für eine negative Vorspannung für ein Halbleiterspeicherbauelement Download PDF

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Publication number
DE4334263B4
DE4334263B4 DE4334263A DE4334263A DE4334263B4 DE 4334263 B4 DE4334263 B4 DE 4334263B4 DE 4334263 A DE4334263 A DE 4334263A DE 4334263 A DE4334263 A DE 4334263A DE 4334263 B4 DE4334263 B4 DE 4334263B4
Authority
DE
Germany
Prior art keywords
negative bias
generator
semiconductor memory
generator circuit
oscillator
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE4334263A
Other languages
German (de)
English (en)
Other versions
DE4334263A1 (de
Inventor
Tae-Hoon Kim
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
SK Hynix Inc
Original Assignee
LG Semicon Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by LG Semicon Co Ltd filed Critical LG Semicon Co Ltd
Publication of DE4334263A1 publication Critical patent/DE4334263A1/de
Application granted granted Critical
Publication of DE4334263B4 publication Critical patent/DE4334263B4/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C5/00—Details of stores covered by group G11C11/00
    • G11C5/14—Power supply arrangements, e.g. power down, chip selection or deselection, layout of wirings or power grids, or multiple supply levels
    • G11C5/145—Applications of charge pumps; Boosted voltage circuits; Clamp circuits therefor
    • G11C5/146—Substrate bias generators

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Dram (AREA)
  • Static Random-Access Memory (AREA)
  • Dc-Dc Converters (AREA)
DE4334263A 1992-10-08 1993-10-07 Generatorschaltung für eine negative Vorspannung für ein Halbleiterspeicherbauelement Expired - Fee Related DE4334263B4 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
KR92-19241 1992-10-08
KR92019241U KR950006067Y1 (ko) 1992-10-08 1992-10-08 반도체 메모리 장치

Publications (2)

Publication Number Publication Date
DE4334263A1 DE4334263A1 (de) 1994-04-14
DE4334263B4 true DE4334263B4 (de) 2004-07-29

Family

ID=19341415

Family Applications (1)

Application Number Title Priority Date Filing Date
DE4334263A Expired - Fee Related DE4334263B4 (de) 1992-10-08 1993-10-07 Generatorschaltung für eine negative Vorspannung für ein Halbleiterspeicherbauelement

Country Status (5)

Country Link
US (1) US5434820A (en:Method)
JP (1) JP3761202B2 (en:Method)
KR (1) KR950006067Y1 (en:Method)
DE (1) DE4334263B4 (en:Method)
TW (1) TW230815B (en:Method)

Families Citing this family (22)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR0157334B1 (ko) * 1993-11-17 1998-10-15 김광호 반도체 메모리 장치의 전압 승압회로
KR0137437B1 (ko) * 1994-12-29 1998-06-01 김주용 챠지 펌프회로의 출력전압 조절회로
JP3497601B2 (ja) * 1995-04-17 2004-02-16 松下電器産業株式会社 半導体集積回路
US6259310B1 (en) * 1995-05-23 2001-07-10 Texas Instruments Incorporated Apparatus and method for a variable negative substrate bias generator
US5612644A (en) * 1995-08-31 1997-03-18 Cirrus Logic Inc. Circuits, systems and methods for controlling substrate bias in integrated circuits
KR0179845B1 (ko) * 1995-10-12 1999-04-15 문정환 메모리의 기판전압 공급제어회로
JP2830807B2 (ja) * 1995-11-29 1998-12-02 日本電気株式会社 半導体メモリ装置
US5715199A (en) * 1996-12-23 1998-02-03 Hyundai Electronics Industries Co., Ltd. Back bias voltage generating circuit
US5907255A (en) * 1997-03-25 1999-05-25 Cypress Semiconductor Dynamic voltage reference which compensates for process variations
JPH10289574A (ja) * 1997-04-10 1998-10-27 Fujitsu Ltd 電圧発生回路を有した半導体装置
KR100481824B1 (ko) * 1997-05-07 2005-07-08 삼성전자주식회사 리플레쉬용발진회로를갖는반도체메모리장치
KR19990003770A (ko) * 1997-06-26 1999-01-15 김영환 전압 제어 발진기
KR100319164B1 (ko) * 1997-12-31 2002-04-22 박종섭 다중레벨검출에의한다중구동장치및그방법
US6628564B1 (en) 1998-06-29 2003-09-30 Fujitsu Limited Semiconductor memory device capable of driving non-selected word lines to first and second potentials
US6781439B2 (en) * 1998-07-30 2004-08-24 Kabushiki Kaisha Toshiba Memory device pump circuit with two booster circuits
KR100338548B1 (ko) * 1999-07-28 2002-05-27 윤종용 반도체 메모리 장치의 부스팅 회로
US20030197546A1 (en) * 2001-07-09 2003-10-23 Samsung Electronics Co., Ltd. Negative voltage generator for a semiconductor memory device
US7336121B2 (en) * 2001-05-04 2008-02-26 Samsung Electronics Co., Ltd. Negative voltage generator for a semiconductor memory device
JP4834261B2 (ja) * 2001-09-27 2011-12-14 Ｏｋｉセミコンダクタ株式会社 昇圧電源発生回路
US6891426B2 (en) * 2001-10-19 2005-05-10 Intel Corporation Circuit for providing multiple voltage signals
JP2010257528A (ja) * 2009-04-24 2010-11-11 Toshiba Corp 半導体集積回路装置
JP6581765B2 (ja) * 2013-10-02 2019-09-25 株式会社半導体エネルギー研究所 ブートストラップ回路、およびブートストラップ回路を有する半導体装置

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4760560A (en) * 1985-08-30 1988-07-26 Kabushiki Kaisha Toshiba Random access memory with resistance to crystal lattice memory errors
US4775959A (en) * 1984-08-31 1988-10-04 Hitachi, Ltd. Semiconductor integrated circuit device having back-bias voltage generator
US5022055A (en) * 1988-04-28 1991-06-04 Amaf Industries, Inc. Trunk dialing converter

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0724298B2 (ja) * 1988-08-10 1995-03-15 日本電気株式会社 半導体記憶装置
JP2645142B2 (ja) * 1989-06-19 1997-08-25 株式会社東芝 ダイナミック型ランダムアクセスメモリ

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4775959A (en) * 1984-08-31 1988-10-04 Hitachi, Ltd. Semiconductor integrated circuit device having back-bias voltage generator
US4760560A (en) * 1985-08-30 1988-07-26 Kabushiki Kaisha Toshiba Random access memory with resistance to crystal lattice memory errors
US5022055A (en) * 1988-04-28 1991-06-04 Amaf Industries, Inc. Trunk dialing converter

Non-Patent Citations (4)

* Cited by examiner, † Cited by third party
Title
1-282796 A., P-1000, Febr. 2,1990, Vol.14,No.59 *
60-211699 A., P- 439, März 25,1986, Vol.10,No.74 *
JP Patents Abstracts of Japan: 63-211193 A., P- 809, Jan. 9,1989, Vol.13,No. 4
JP Patents Abstracts of Japan: 63-211193 A., P- 809, Jan. 9,1989, Vol.13,No. 4 *

Also Published As

Publication number Publication date
KR950006067Y1 (ko) 1995-07-27
US5434820A (en) 1995-07-18
JPH06215568A (ja) 1994-08-05
KR940011024U (ko) 1994-05-27
DE4334263A1 (de) 1994-04-14
TW230815B (en:Method) 1994-09-21
JP3761202B2 (ja) 2006-03-29

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Legal Events

Date Code Title Description
OM8 Search report available as to paragraph 43 lit. 1 sentence 1 patent law
8127 New person/name/address of the applicant

Owner name: LG SEMICON CO. LTD., CHUNGCHEONGBUK-DO, KR

8110 Request for examination paragraph 44
8364 No opposition during term of opposition
R119 Application deemed withdrawn, or ip right lapsed, due to non-payment of renewal fee

Effective date: 20130501