DE3851649D1 - Aus einer Vielzahl von Eintransistorzellen bestehende dynamische Speichervorrichtung mit wahlfreiem Zugriff. - Google Patents

Aus einer Vielzahl von Eintransistorzellen bestehende dynamische Speichervorrichtung mit wahlfreiem Zugriff.

Info

Publication number
DE3851649D1
DE3851649D1 DE3851649T DE3851649T DE3851649D1 DE 3851649 D1 DE3851649 D1 DE 3851649D1 DE 3851649 T DE3851649 T DE 3851649T DE 3851649 T DE3851649 T DE 3851649T DE 3851649 D1 DE3851649 D1 DE 3851649D1
Authority
DE
Germany
Prior art keywords
memory device
random access
access memory
dynamic random
device composed
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE3851649T
Other languages
English (en)
Other versions
DE3851649T2 (de
Inventor
Shozo Nishimoto
Yasukazu Inoue
Hiroshi Kotaki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from JP62067383A external-priority patent/JP2668873B2/ja
Priority claimed from JP62067385A external-priority patent/JPS63232459A/ja
Application filed by NEC Corp filed Critical NEC Corp
Publication of DE3851649D1 publication Critical patent/DE3851649D1/de
Application granted granted Critical
Publication of DE3851649T2 publication Critical patent/DE3851649T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/86—Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
    • H01L29/92—Capacitors having potential barriers
    • H01L29/94—Metal-insulator-semiconductors, e.g. MOS
    • H01L29/945—Trench capacitors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/01—Manufacture or treatment
    • H10B12/02—Manufacture or treatment for one transistor one-capacitor [1T-1C] memory cells
    • H10B12/03—Making the capacitor or connections thereto
    • H10B12/038—Making the capacitor or connections thereto the capacitor being in a trench in the substrate
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/30—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
    • H10B12/37—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells the capacitor being at least partially in a trench in the substrate

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Semiconductor Memories (AREA)
  • Semiconductor Integrated Circuits (AREA)
DE3851649T 1987-03-20 1988-03-18 Aus einer Vielzahl von Eintransistorzellen bestehende dynamische Speichervorrichtung mit wahlfreiem Zugriff. Expired - Fee Related DE3851649T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP62067383A JP2668873B2 (ja) 1987-03-20 1987-03-20 半導体記憶装置
JP62067385A JPS63232459A (ja) 1987-03-20 1987-03-20 Ｍｏｓ型メモリ半導体装置およびその製造方法

Publications (2)

Publication Number Publication Date
DE3851649D1 true DE3851649D1 (de) 1994-11-03
DE3851649T2 DE3851649T2 (de) 1995-05-04

Family

ID=26408585

Family Applications (1)

Application Number Title Priority Date Filing Date
DE3851649T Expired - Fee Related DE3851649T2 (de) 1987-03-20 1988-03-18 Aus einer Vielzahl von Eintransistorzellen bestehende dynamische Speichervorrichtung mit wahlfreiem Zugriff.

Country Status (3)

Country Link
US (1) US4969022A (de)
EP (1) EP0283964B1 (de)
DE (1) DE3851649T2 (de)

Families Citing this family (43)

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KR910000246B1 (ko) * 1988-02-15 1991-01-23 삼성전자 주식회사 반도체 메모리장치
US5021355A (en) * 1989-05-22 1991-06-04 International Business Machines Corporation Method of fabricating cross-point lightly-doped drain-source trench transistor
DE3931381A1 (de) * 1989-09-20 1991-03-28 Siemens Ag Halbleiterschichtaufbau mit vergrabener verdrahtungsebene, verfahren fuer dessen herstellung und anwendung der vergrabenen verdrahtungsebene als vergrabene zellplatte fuer drams
JPH03165558A (ja) * 1989-11-24 1991-07-17 Toshiba Corp 半導体記憶装置およびその製造方法
JP2861243B2 (ja) * 1990-04-27 1999-02-24 日本電気株式会社 ダイナミック型ランダムアクセスメモリセル
JPH0449654A (ja) * 1990-06-19 1992-02-19 Nec Corp 半導体メモリ
JP3003188B2 (ja) * 1990-09-10 2000-01-24 ソニー株式会社 半導体メモリ及びその製造方法
JP3128834B2 (ja) * 1991-01-28 2001-01-29 日本電気株式会社 半導体装置
JP2819520B2 (ja) * 1991-05-07 1998-10-30 インターナショナル・ビジネス・マシーンズ・コーポレイション Ｄｒａｍセル
JP2994110B2 (ja) * 1991-09-09 1999-12-27 株式会社東芝 半導体記憶装置
US5250829A (en) * 1992-01-09 1993-10-05 International Business Machines Corporation Double well substrate plate trench DRAM cell array
JPH07112049B2 (ja) * 1992-01-09 1995-11-29 インターナショナル・ビジネス・マシーンズ・コーポレイション ダイナミック・ランダム・アクセス・メモリ・デバイスおよび製造方法
US5264716A (en) * 1992-01-09 1993-11-23 International Business Machines Corporation Diffused buried plate trench dram cell array
JP3141486B2 (ja) * 1992-01-27 2001-03-05 ソニー株式会社 半導体装置
US5528062A (en) * 1992-06-17 1996-06-18 International Business Machines Corporation High-density DRAM structure on soi
JPH0637275A (ja) * 1992-07-13 1994-02-10 Toshiba Corp 半導体記憶装置及びその製造方法
JP2791260B2 (ja) * 1993-03-01 1998-08-27 株式会社東芝 半導体装置の製造方法
US5448090A (en) * 1994-08-03 1995-09-05 International Business Machines Corporation Structure for reducing parasitic leakage in a memory array with merged isolation and node trench construction
US5936271A (en) * 1994-11-15 1999-08-10 Siemens Aktiengesellschaft Unit cell layout and transfer gate design for high density DRAMs having a trench capacitor with signal electrode composed of three differently doped polysilicon layers
US5543348A (en) * 1995-03-29 1996-08-06 Kabushiki Kaisha Toshiba Controlled recrystallization of buried strap in a semiconductor memory device
US5908310A (en) 1995-12-27 1999-06-01 International Business Machines Corporation Method to form a buried implanted plate for DRAM trench storage capacitors
US5656535A (en) * 1996-03-04 1997-08-12 Siemens Aktiengesellschaft Storage node process for deep trench-based DRAM
US5981332A (en) * 1997-09-30 1999-11-09 Siemens Aktiengesellschaft Reduced parasitic leakage in semiconductor devices
JP3705919B2 (ja) * 1998-03-05 2005-10-12 三菱電機株式会社 半導体装置及びその製造方法
US6110792A (en) * 1998-08-19 2000-08-29 International Business Machines Corporation Method for making DRAM capacitor strap
US6222218B1 (en) * 1998-09-14 2001-04-24 International Business Machines Corporation DRAM trench
US6380575B1 (en) 1999-08-31 2002-04-30 International Business Machines Corporation DRAM trench cell
US6265279B1 (en) * 1999-09-24 2001-07-24 Infineon Technologies Ag Method for fabricating a trench capacitor
US6150670A (en) * 1999-11-30 2000-11-21 International Business Machines Corporation Process for fabricating a uniform gate oxide of a vertical transistor
DE10158798A1 (de) * 2001-11-30 2003-06-18 Infineon Technologies Ag Kondensator und Verfahren zum Herstellen eines Kondensators
US6815256B2 (en) * 2002-12-23 2004-11-09 Intel Corporation Silicon building blocks in integrated circuit packaging
US6930357B2 (en) * 2003-06-16 2005-08-16 Infineon Technologies Ag Active SOI structure with a body contact through an insulator
US20070158718A1 (en) * 2006-01-12 2007-07-12 Yi-Nan Su Dynamic random access memory and method of fabricating the same
US8779506B2 (en) * 2006-03-07 2014-07-15 Infineon Technologies Ag Semiconductor component arrangement comprising a trench transistor
US8501561B2 (en) 2006-03-07 2013-08-06 Infineon Technologies Ag Method for producing a semiconductor component arrangement comprising a trench transistor
JP4241856B2 (ja) * 2006-06-29 2009-03-18 三洋電機株式会社 半導体装置および半導体装置の製造方法
US7410856B2 (en) * 2006-09-14 2008-08-12 Micron Technology, Inc. Methods of forming vertical transistors
JP2008192803A (ja) 2007-02-05 2008-08-21 Spansion Llc 半導体装置およびその製造方法
US20090302421A1 (en) * 2008-06-09 2009-12-10 Altera Corporation Method and apparatus for creating a deep trench capacitor to improve device performance
JP2010050374A (ja) * 2008-08-25 2010-03-04 Seiko Instruments Inc 半導体装置
JP2010219139A (ja) * 2009-03-13 2010-09-30 Elpida Memory Inc 半導体装置及びその製造方法
JP5515429B2 (ja) * 2009-06-01 2014-06-11 富士通セミコンダクター株式会社 半導体装置の製造方法
CN109326595B (zh) 2017-07-31 2021-03-09 联华电子股份有限公司 半导体元件及其制作方法

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS547888A (en) * 1977-06-21 1979-01-20 Victor Co Of Japan Ltd Implanted capacitance device
JPS5982761A (ja) * 1982-11-04 1984-05-12 Hitachi Ltd 半導体メモリ
JPS6054472A (ja) * 1983-09-05 1985-03-28 Nec Corp 半導体記憶装置およびその製造方法
JPS60152058A (ja) * 1984-01-20 1985-08-10 Toshiba Corp 半導体記憶装置
JPS60154664A (ja) * 1984-01-25 1985-08-14 Hitachi Ltd 半導体記憶装置
JPS60189964A (ja) * 1984-03-12 1985-09-27 Hitachi Ltd 半導体メモリ
US4651184A (en) * 1984-08-31 1987-03-17 Texas Instruments Incorporated Dram cell and array
JPS6190395A (ja) * 1984-10-09 1986-05-08 Fujitsu Ltd 半導体記憶装置
DE3681490D1 (de) * 1985-04-01 1991-10-24 Nec Corp Dynamische speicheranordnung mit wahlfreiem zugriff mit einer vielzahl von eintransistorspeicherzellen.
US4801989A (en) * 1986-02-20 1989-01-31 Fujitsu Limited Dynamic random access memory having trench capacitor with polysilicon lined lower electrode
EP0236089B1 (de) * 1986-03-03 1992-08-05 Fujitsu Limited Einen Rillenkondensator enthaltender dynamischer Speicher mit wahlfreiem Zugriff
JPS62208662A (ja) * 1986-03-07 1987-09-12 Sony Corp 半導体記憶装置
US4794434A (en) * 1987-07-06 1988-12-27 Motorola, Inc. Trench cell for a dram

Also Published As

Publication number Publication date
US4969022A (en) 1990-11-06
EP0283964A2 (de) 1988-09-28
EP0283964B1 (de) 1994-09-28
DE3851649T2 (de) 1995-05-04
EP0283964A3 (en) 1989-06-14

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Legal Events

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8339 Ceased/non-payment of the annual fee