DE3876415D1 - Dynamischer direktzugriffsspeicher. - Google Patents

Dynamischer direktzugriffsspeicher.

Info

Publication number
DE3876415D1
DE3876415D1 DE8888310148T DE3876415T DE3876415D1 DE 3876415 D1 DE3876415 D1 DE 3876415D1 DE 8888310148 T DE8888310148 T DE 8888310148T DE 3876415 T DE3876415 T DE 3876415T DE 3876415 D1 DE3876415 D1 DE 3876415D1
Authority
DE
Germany
Prior art keywords
access memory
direct access
dynamic direct
dynamic
memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE8888310148T
Other languages
English (en)
Other versions
DE3876415T2 (de
Inventor
Keith Burton
Jonathan Michael Hanbury
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Services Ltd
Original Assignee
Fujitsu Services Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Services Ltd filed Critical Fujitsu Services Ltd
Publication of DE3876415D1 publication Critical patent/DE3876415D1/de
Application granted granted Critical
Publication of DE3876415T2 publication Critical patent/DE3876415T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/406—Management or control of the refreshing or charge-regeneration cycles

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Dram (AREA)
DE8888310148T 1988-01-22 1988-10-28 Dynamischer direktzugriffsspeicher. Expired - Fee Related DE3876415T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB888801472A GB8801472D0 (en) 1988-01-22 1988-01-22 Dynamic random-access memory

Publications (2)

Publication Number Publication Date
DE3876415D1 true DE3876415D1 (de) 1993-01-14
DE3876415T2 DE3876415T2 (de) 1993-06-09

Family

ID=10630396

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8888310148T Expired - Fee Related DE3876415T2 (de) 1988-01-22 1988-10-28 Dynamischer direktzugriffsspeicher.

Country Status (4)

Country Link
US (1) US4901283A (de)
EP (1) EP0325026B1 (de)
DE (1) DE3876415T2 (de)
GB (1) GB8801472D0 (de)

Families Citing this family (37)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CA2008071A1 (en) * 1989-01-27 1990-07-27 Jeffrey S. Watters Pump bus to avoid indeterminacy in reading variable bit field
US5430681A (en) * 1989-05-08 1995-07-04 Hitachi Maxell, Ltd. Memory cartridge and its memory control method
US5041964A (en) * 1989-06-12 1991-08-20 Grid Systems Corporation Low-power, standby mode computer
US5204840A (en) * 1989-08-08 1993-04-20 Mazur Jeffrey G Means and methods for preserving microprocessor memory
JPH0390942A (ja) * 1989-09-01 1991-04-16 Oki Electric Ind Co Ltd 主記憶装置の制御方式
US5390333A (en) * 1990-02-06 1995-02-14 Alcatel Network Systems, Inc. Switch array power reduction apparatus
JP3225531B2 (ja) * 1990-05-15 2001-11-05 セイコーエプソン株式会社 メモリカード
JPH04107623A (ja) * 1990-08-28 1992-04-09 Seiko Epson Corp 表示装置
JPH04109488A (ja) * 1990-08-29 1992-04-10 Mitsubishi Electric Corp ダイナミック型半導体記憶装置
US5243576A (en) * 1990-08-30 1993-09-07 Nec Corporation Semiconductor memory device
WO1992007317A1 (en) * 1990-10-12 1992-04-30 Intel Corporation Slow memory refresh in a computer with a limited supply of power
US5430881A (en) * 1990-12-28 1995-07-04 Dia Semicon Systems Incorporated Supervisory control method and power saving control unit for computer system
US5229969A (en) * 1991-04-15 1993-07-20 Micron Technology, Inc. Method for synchronizing refresh cycles in self-refreshing DRAMs having timing circuit shutdown
GB2256735B (en) * 1991-06-12 1995-06-21 Intel Corp Non-volatile disk cache
GB2261753B (en) * 1991-11-19 1995-07-12 Intel Corp Multi-mode microprocessor with electrical pin for selective re-initialization of processor state
US5274828A (en) * 1992-02-24 1993-12-28 Texas Instruments Incorporated Computer including an integrated circuit having an on-chip high voltage source
US5781784A (en) * 1992-07-09 1998-07-14 Zilog, Inc. Dynamic power management of solid state memories
JPH06124587A (ja) * 1992-10-09 1994-05-06 Mitsubishi Electric Corp ダイナミックランダムアクセスメモリ装置
US5421005A (en) * 1992-12-02 1995-05-30 Fiset; Peter D. Alternate DRAM refresh controlled by signal period detector
AU6988494A (en) * 1993-05-28 1994-12-20 Rambus Inc. Method and apparatus for implementing refresh in a synchronous dram system
US5392251A (en) * 1993-07-13 1995-02-21 Micron Semiconductor, Inc. Controlling dynamic memory refresh cycle time
JP3759758B2 (ja) * 1994-02-03 2006-03-29 株式会社ルネサステクノロジ 半導体記憶装置
US5438549A (en) * 1994-02-28 1995-08-01 Intel Corporation Nonvolatile memory with volatile memory buffer and a backup power supply system
US6025737A (en) * 1996-11-27 2000-02-15 Altera Corporation Circuitry for a low internal voltage integrated circuit
US6175952B1 (en) 1997-05-27 2001-01-16 Altera Corporation Technique of fabricating integrated circuits having interfaces compatible with different operating voltage conditions
US6147511A (en) 1996-05-28 2000-11-14 Altera Corporation Overvoltage-tolerant interface for integrated circuits
US5712825A (en) * 1996-10-09 1998-01-27 International Business Machines Corporation Maintaining data integrity in DRAM while varying operating voltages
KR100243335B1 (ko) * 1996-12-31 2000-02-01 김영환 독립적인 리프레쉬 수단을 가지는 데이지 체인 구조의 반도체 장치
US6266379B1 (en) * 1997-06-20 2001-07-24 Massachusetts Institute Of Technology Digital transmitter with equalization
US6255850B1 (en) 1997-10-28 2001-07-03 Altera Corporation Integrated circuit with both clamp protection and high impedance protection from input overshoot
US6134167A (en) * 1998-06-04 2000-10-17 Compaq Computer Corporation Reducing power consumption in computer memory
US6112306A (en) * 1998-10-06 2000-08-29 Intel Corporation Self-synchronizing method and apparatus for exiting dynamic random access memory from a low power state
US6201751B1 (en) * 1999-03-08 2001-03-13 Micron Technology, Inc. Integrated circuit power-up controllers, integrated circuit power-up circuits, and integrated circuit power-up methods
US6243315B1 (en) 1999-12-31 2001-06-05 James B. Goodman Computer memory system with a low power down mode
KR100413761B1 (ko) * 2001-05-31 2003-12-31 삼성전자주식회사 온도와 공정에 따라 리프레시 사이클이 조절되는 반도체메모리 장치 및 방법
US7177222B2 (en) * 2005-03-04 2007-02-13 Seagate Technology Llc Reducing power consumption in a data storage system
EP1953619B1 (de) * 2007-02-01 2015-04-01 Siemens Aktiengesellschaft Verfahren zur Sicherung von Daten einer Datenverarbeitungsanlage sowie Datenverarbeitungsanlage

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4316248A (en) * 1978-12-06 1982-02-16 Data General Corporation Memory refresh means including means for providing refresh addresses during power failures
JPS55105891A (en) * 1979-01-30 1980-08-13 Sharp Corp Refresh system for dynamic memory
JPS59162690A (ja) * 1983-03-04 1984-09-13 Nec Corp 擬似スタテイツクメモリ
JPS59227090A (ja) * 1983-06-06 1984-12-20 Hitachi Ltd 不揮発性メモリ装置
US4631701A (en) * 1983-10-31 1986-12-23 Ncr Corporation Dynamic random access memory refresh control system
US4625296A (en) * 1984-01-17 1986-11-25 The Perkin-Elmer Corporation Memory refresh circuit with varying system transparency
JPS60237522A (ja) * 1984-05-10 1985-11-26 Fujitsu Ltd 論理回路装置
US4701843A (en) * 1985-04-01 1987-10-20 Ncr Corporation Refresh system for a page addressable memory
US4754425A (en) * 1985-10-18 1988-06-28 Gte Communication Systems Corporation Dynamic random access memory refresh circuit selectively adapted to different clock frequencies

Also Published As

Publication number Publication date
EP0325026A3 (en) 1990-05-09
GB8801472D0 (en) 1988-02-24
EP0325026A2 (de) 1989-07-26
DE3876415T2 (de) 1993-06-09
US4901283A (en) 1990-02-13
EP0325026B1 (de) 1992-12-02

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee