DE3675010D1 - Verfahren zur herstellung eines bipolartransistors. - Google Patents

Verfahren zur herstellung eines bipolartransistors.

Info

Publication number
DE3675010D1
DE3675010D1 DE8686200948T DE3675010T DE3675010D1 DE 3675010 D1 DE3675010 D1 DE 3675010D1 DE 8686200948 T DE8686200948 T DE 8686200948T DE 3675010 T DE3675010 T DE 3675010T DE 3675010 D1 DE3675010 D1 DE 3675010D1
Authority
DE
Germany
Prior art keywords
base
bipolar
implant
transistors
comprised
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE8686200948T
Other languages
English (en)
Inventor
Peter Denis Scovell
Peter Fred Blomley
Roger Leslie Baker
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nortel Networks Ltd
Original Assignee
STC PLC
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by STC PLC filed Critical STC PLC
Application granted granted Critical
Publication of DE3675010D1 publication Critical patent/DE3675010D1/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/70—Bipolar devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8248—Combination of bipolar and field-effect technology
    • H01L21/8249—Bipolar and MOS technology
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8232—Field-effect technology
    • H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
    • H01L21/8238—Complementary field-effect transistors, e.g. CMOS
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/06—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/06—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
    • H01L27/0611—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region
    • H01L27/0617—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region comprising components of the field-effect type
    • H01L27/0623—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region comprising components of the field-effect type in combination with bipolar transistors
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/01—Bipolar transistors-ion implantation

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Ceramic Engineering (AREA)
  • Bipolar Transistors (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Recrystallisation Techniques (AREA)
  • Heterocyclic Carbon Compounds Containing A Hetero Ring Having Oxygen Or Sulfur (AREA)
  • Oscillators With Electromechanical Resonators (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
  • Thin Film Transistor (AREA)
  • Mechanical Treatment Of Semiconductor (AREA)
  • Noodles (AREA)
DE8686200948T 1985-03-23 1986-02-17 Verfahren zur herstellung eines bipolartransistors. Expired - Fee Related DE3675010D1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB858507624A GB8507624D0 (en) 1985-03-23 1985-03-23 Semiconductor devices

Publications (1)

Publication Number Publication Date
DE3675010D1 true DE3675010D1 (de) 1990-11-22

Family

ID=10576545

Family Applications (2)

Application Number Title Priority Date Filing Date
DE8686200948T Expired - Fee Related DE3675010D1 (de) 1985-03-23 1986-02-17 Verfahren zur herstellung eines bipolartransistors.
DE8686301052T Expired - Fee Related DE3671326D1 (de) 1985-03-23 1986-02-17 Halbleiteranordnung mit einem bipolaren transistor und einem mos-transistor und verfahren zu deren herstellung.

Family Applications After (1)

Application Number Title Priority Date Filing Date
DE8686301052T Expired - Fee Related DE3671326D1 (de) 1985-03-23 1986-02-17 Halbleiteranordnung mit einem bipolaren transistor und einem mos-transistor und verfahren zu deren herstellung.

Country Status (11)

Country Link
US (3) US4914048A (de)
EP (2) EP0196757B1 (de)
JP (2) JPH0799764B2 (de)
KR (2) KR920006752B1 (de)
CN (2) CN1004593B (de)
AT (2) ATE57586T1 (de)
DE (2) DE3675010D1 (de)
GB (3) GB8507624D0 (de)
NO (1) NO173478C (de)
PH (1) PH26112A (de)
SG (1) SG69890G (de)

Families Citing this family (25)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2188479B (en) * 1986-03-26 1990-05-23 Stc Plc Semiconductor devices
JPS63239856A (ja) * 1987-03-27 1988-10-05 Hitachi Ltd 半導体集積回路装置及びその製造方法
KR900001062B1 (ko) * 1987-09-15 1990-02-26 강진구 반도체 바이 씨 모오스 장치의 제조방법
EP0316104A3 (de) * 1987-11-03 1991-01-30 Stc Plc Integrierte Schaltungen mit Widerständen und Bipolartransistoren
US5124817A (en) * 1988-01-19 1992-06-23 National Semiconductor Corporation Polysilicon emitter and a polysilicon gate using the same etch of polysilicon on a thin gate oxide
EP0325181B1 (de) * 1988-01-19 1995-04-05 National Semiconductor Corporation Verfahren zum Herstellen eines Polysiliciumemitters und eines Polysiliciumgates durch gleichzeitiges Ätzen von Polysilicium auf einem dünnen Gateoxid
FR2626406B1 (fr) * 1988-01-22 1992-01-24 France Etat Transistor bipolaire compatible avec la technologie mos
GB2214870B (en) * 1988-02-20 1991-09-11 Stc Plc Plasma etching process
DE3914910C2 (de) * 1988-05-10 1999-11-25 Northern Telecom Ltd Verfahren zur Herstellung einer integrierten Schaltung
GB8810973D0 (en) * 1988-05-10 1988-06-15 Stc Plc Improvements in integrated circuits
JPH0348457A (ja) * 1989-04-14 1991-03-01 Toshiba Corp 半導体装置およびその製造方法
US5091760A (en) * 1989-04-14 1992-02-25 Kabushiki Kaisha Toshiba Semiconductor device
US5028973A (en) * 1989-06-19 1991-07-02 Harris Corporation Bipolar transistor with high efficient emitter
US5177582A (en) * 1989-09-22 1993-01-05 Siemens Aktiengesellschaft CMOS-compatible bipolar transistor with reduced collector/substrate capacitance and process for producing the same
US4983531A (en) * 1990-02-12 1991-01-08 Motorola, Inc. Method of fabricating a single polysilicon bipolar transistor which is compatible with a method of fabricating CMOS transistors
US4987089A (en) * 1990-07-23 1991-01-22 Micron Technology, Inc. BiCMOS process and process for forming bipolar transistors on wafers also containing FETs
JP2842682B2 (ja) * 1990-11-08 1999-01-06 シャープ株式会社 半導体装置の製造方法
US5158900A (en) * 1991-10-18 1992-10-27 Hewlett-Packard Company Method of separately fabricating a base/emitter structure of a BiCMOS device
WO1993016494A1 (en) * 1992-01-31 1993-08-19 Analog Devices, Inc. Complementary bipolar polysilicon emitter devices
JPH08172100A (ja) * 1994-12-16 1996-07-02 Mitsubishi Electric Corp 半導体装置
US5830789A (en) * 1996-11-19 1998-11-03 Integrated Device Technology, Inc. CMOS process forming wells after gate formation
KR100235628B1 (ko) * 1997-06-25 1999-12-15 김영환 반도체 소자의 제조방법
KR20040008485A (ko) * 2002-07-18 2004-01-31 주식회사 하이닉스반도체 반도체소자의 테스트 패턴 형성방법
JP2004311684A (ja) * 2003-04-07 2004-11-04 Sanyo Electric Co Ltd 半導体装置
TW200524139A (en) * 2003-12-24 2005-07-16 Renesas Tech Corp Voltage generating circuit and semiconductor integrated circuit

Family Cites Families (45)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CA969290A (en) * 1971-10-20 1975-06-10 Alfred C. Ipri Fabrication of semiconductor devices incorporating polycrystalline silicon
US3753807A (en) * 1972-02-24 1973-08-21 Bell Canada Northern Electric Manufacture of bipolar semiconductor devices
US4041518A (en) * 1973-02-24 1977-08-09 Hitachi, Ltd. MIS semiconductor device and method of manufacturing the same
US3940288A (en) * 1973-05-16 1976-02-24 Fujitsu Limited Method of making a semiconductor device
JPS539469A (en) * 1976-07-15 1978-01-27 Nippon Telegr & Teleph Corp <Ntt> Semiconductor device having electrode of stepped structure and its production
US4120707A (en) * 1977-03-30 1978-10-17 Harris Corporation Process of fabricating junction isolated IGFET and bipolar transistor integrated circuit by diffusion
US4099987A (en) * 1977-07-25 1978-07-11 International Business Machines Corporation Fabricating integrated circuits incorporating high-performance bipolar transistors
JPS5846863B2 (ja) * 1977-08-25 1983-10-19 松下電器産業株式会社 半導体集積回路装置
JPS54101290A (en) * 1978-01-27 1979-08-09 Hitachi Ltd Semiconductor integtated circuit unit and its manufacture
GB2023340B (en) * 1978-06-01 1982-09-02 Mitsubishi Electric Corp Integrated circuits
US4289550A (en) * 1979-05-25 1981-09-15 Raytheon Company Method of forming closely spaced device regions utilizing selective etching and diffusion
US4452645A (en) * 1979-11-13 1984-06-05 International Business Machines Corporation Method of making emitter regions by implantation through a non-monocrystalline layer
DE2946963A1 (de) * 1979-11-21 1981-06-04 Siemens AG, 1000 Berlin und 8000 München Schnelle bipolare transistoren
US4534806A (en) * 1979-12-03 1985-08-13 International Business Machines Corporation Method for manufacturing vertical PNP transistor with shallow emitter
JPS5696860A (en) * 1979-12-29 1981-08-05 Sony Corp Semiconductor device
US4301588A (en) * 1980-02-01 1981-11-24 International Business Machines Corporation Consumable amorphous or polysilicon emitter process
JPS5710969A (en) * 1980-06-25 1982-01-20 Nec Corp Semiconductor device and manufacture thereof
US4391650A (en) * 1980-12-22 1983-07-05 Ncr Corporation Method for fabricating improved complementary metal oxide semiconductor devices
JPS57206063A (en) * 1981-06-15 1982-12-17 Toshiba Corp Semiconductor substrate and manufacture therefor
US4483726A (en) * 1981-06-30 1984-11-20 International Business Machines Corporation Double self-aligned fabrication process for making a bipolar transistor structure having a small polysilicon-to-extrinsic base contact area
US4498223A (en) * 1982-04-23 1985-02-12 Gte Laboratories Incorporated Method of fabrication of monolithic integrated circuit structure
EP0093786B1 (de) * 1982-05-06 1986-08-06 Deutsche ITT Industries GmbH Verfahren zum Herstellen einer planaren monolithisch integrierten Festkörperschaltung mit mindestens einem Isolierschicht-Feldeffekttransistor und mit mindestens einem Bipolartransistor
US4437897A (en) * 1982-05-18 1984-03-20 International Business Machines Corporation Fabrication process for a shallow emitter/base transistor using same polycrystalline layer
US4507847A (en) * 1982-06-22 1985-04-02 Ncr Corporation Method of making CMOS by twin-tub process integrated with a vertical bipolar transistor
JPS58225663A (ja) * 1982-06-23 1983-12-27 Toshiba Corp 半導体装置の製造方法
JPS5931052A (ja) * 1982-08-13 1984-02-18 Hitachi Ltd 半導体集積回路装置の製造方法
JPS59117150A (ja) * 1982-12-24 1984-07-06 Hitachi Ltd 半導体集積回路装置とその製造法
JPS59138363A (ja) * 1983-01-28 1984-08-08 Hitachi Ltd 半導体装置及びその製造方法
US4673965A (en) * 1983-02-22 1987-06-16 General Motors Corporation Uses for buried contacts in integrated circuits
IT1162836B (it) * 1983-03-04 1987-04-01 Cselt Centro Studi Lab Telecom Ricestrasmettitore numerico per trasmissione bidirezionale simultanea di segnali logici su una linea unica
US4631568A (en) * 1983-03-08 1986-12-23 Trw Inc. Bipolar transistor construction
EP0122004A3 (de) * 1983-03-08 1986-12-17 Trw Inc. Aufbau eines Bipolartransistors
JPS59186367A (ja) * 1983-04-06 1984-10-23 Matsushita Electric Ind Co Ltd 半導体装置の製造方法
JPS6010776A (ja) * 1983-06-30 1985-01-19 Fujitsu Ltd バイポーラトランジスタの製造方法
GB2143083B (en) * 1983-07-06 1987-11-25 Standard Telephones Cables Ltd Semiconductor structures
US4574467A (en) * 1983-08-31 1986-03-11 Solid State Scientific, Inc. N- well CMOS process on a P substrate with double field guard rings and a PMOS buried channel
US4637125A (en) * 1983-09-22 1987-01-20 Kabushiki Kaisha Toshiba Method for making a semiconductor integrated device including bipolar transistor and CMOS transistor
US4523370A (en) * 1983-12-05 1985-06-18 Ncr Corporation Process for fabricating a bipolar transistor with a thin base and an abrupt base-collector junction
US4647958A (en) * 1984-04-16 1987-03-03 Trw Inc. Bipolar transistor construction
JPS6153762A (ja) * 1984-08-24 1986-03-17 Hitachi Ltd 半導体集積回路装置
GB2172744B (en) * 1985-03-23 1989-07-19 Stc Plc Semiconductor devices
US4604790A (en) * 1985-04-01 1986-08-12 Advanced Micro Devices, Inc. Method of fabricating integrated circuit structure having CMOS and bipolar devices
US4929992A (en) * 1985-09-18 1990-05-29 Advanced Micro Devices, Inc. MOS transistor construction with self aligned silicided contacts to gate, source, and drain regions
JPH0638856A (ja) * 1992-07-21 1994-02-15 Tokyo Seat Kk アームレストの取付装置
JP3930944B2 (ja) * 1997-06-16 2007-06-13 株式会社Ｎｅｏｍａｘ 画像形成方法

Also Published As

Publication number Publication date
EP0196757B1 (de) 1990-05-16
JPS6351673A (ja) 1988-03-04
GB2173638B (en) 1989-06-28
EP0196757A2 (de) 1986-10-08
EP0234054B1 (de) 1990-10-17
GB2173638A (en) 1986-10-15
US4845532A (en) 1989-07-04
KR860007863A (ko) 1986-10-17
ATE52877T1 (de) 1990-06-15
NO173478B (no) 1993-09-06
GB8603322D0 (en) 1986-03-19
NO860663L (no) 1986-09-24
SG69890G (en) 1990-11-23
CN1007389B (zh) 1990-03-28
KR860007746A (ko) 1986-10-17
JPS61220453A (ja) 1986-09-30
US4914048A (en) 1990-04-03
JPH0783024B2 (ja) 1995-09-06
DE3671326D1 (de) 1990-06-21
US4849364A (en) 1989-07-18
CN1004593B (zh) 1989-06-21
CN86101789A (zh) 1986-11-19
CN86103793A (zh) 1987-04-08
GB2174244A (en) 1986-10-29
GB8507624D0 (en) 1985-05-01
EP0196757A3 (en) 1987-05-27
ATE57586T1 (de) 1990-11-15
JPH0799764B2 (ja) 1995-10-25
KR920006752B1 (ko) 1992-08-17
GB2174244B (en) 1989-07-05
PH26112A (en) 1992-02-06
GB8612801D0 (en) 1986-07-02
EP0234054A1 (de) 1987-09-02
NO173478C (no) 1993-12-15
KR920010192B1 (ko) 1992-11-19

Similar Documents

Publication Publication Date Title
DE3675010D1 (de) Verfahren zur herstellung eines bipolartransistors.
ATE94306T1 (de) Verfahren zum herstellen von bipolaren transistoren und komplementaeren mos-transistoren auf einem gemeinsamen siliziumsubstrat.
DE3676781D1 (de) Integrierte bipolar- und komplementaere mos-transistoren auf einem gemeinsamen substrat enthaltende schaltung und verfahren zu ihrer herstellung.
EP0388000A3 (de) Verfahren zum Herstellen bipolarer vertikaler Transistoren und von Hochspannungs-CMOS-Transistoren in einer einzigen integrierten Schaltung
JPS5546504A (en) Semiconductor device
DE3687973D1 (de) Verfahren zum gleichzeitigen herstellen von bipolaren und komplementaeren mos-transistoren auf einem gemeinsamen siliziumsubstrat.
ATE59499T1 (de) Verfahren zur herstellung eines voll selbstjustierten bipolartransistors.
DE3787407D1 (de) Integrierte Bipolar- und komplementäre MOS-Transistoren auf einem gemeinsamen Substrat enthaltende Schaltung und Verfahren zu ihrer Herstellung.
EP0768709A3 (de) BiCMOS-Verfahren mit Bipolartransistor mit geringem Basis-Rekombinationsstrom
KR840005927A (ko) 반도체 집적 회로 장치 및 그의 제조 방법
JPS6480063A (en) Npn bipolar transistor
ATE74228T1 (de) Verfahren zur herstellung von halbleiterschaltungen um einen bipolaren transistor mit extrinsischen basengebieten zu bilden.
EP0414400A3 (de) MOSFET-Verarmungsanordnung
JPS55157257A (en) Manufacture of mos integrated circuit
KR970017994A (ko) 다수의 마이크로 전자 회로를 soi상에 제작하기 위한 방법
JPS57118663A (en) Manufacture of semiconductor integrated circuit device
SU1345976A1 (ru) Способ изготовления мдп-транзисторов интегральных микросхем с поликремниевым затвором
JPS63240058A (ja) 半導体装置の製造方法
KR100226798B1 (ko) 바이씨모스를 이용한 캐스캐이드 구조
JPS6421949A (en) Manufacture of semiconductor device
JPH03194935A (ja) 縦型ｐｎｐトランジスタの製造方法
KR900008695A (ko) 바이폴라 및 mos 트랜지스터를 사용한 인버터 회로 및 그 제조방법
KR930014948A (ko) 트랜지스터의 아이소레이션 방법
JPS6439758A (en) Semiconductor device and manufacture thereof
KR960005881A (ko) 바이폴라 트랜지스터 제조방법

Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8327 Change in the person/name/address of the patent owner

Owner name: NORTHERN TELECOM LTD., MONTREAL, QUEBEC, CA

8328 Change in the person/name/address of the agent

Free format text: KOCH, G., DIPL.-ING. HAIBACH, T., DIPL.-PHYS. DR.RER.NAT. FELDKAMP, R., DIPL.-ING., PAT.-ANWAELTE, 80339 MUENCHEN

8339 Ceased/non-payment of the annual fee