JPS54101290A - Semiconductor integtated circuit unit and its manufacture - Google Patents

Semiconductor integtated circuit unit and its manufacture

Info

Publication number
JPS54101290A
JPS54101290A JP724278A JP724278A JPS54101290A JP S54101290 A JPS54101290 A JP S54101290A JP 724278 A JP724278 A JP 724278A JP 724278 A JP724278 A JP 724278A JP S54101290 A JPS54101290 A JP S54101290A
Authority
JP
Japan
Prior art keywords
integtated
semiconductor
manufacture
circuit unit
layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP724278A
Other languages
Japanese (ja)
Inventor
Kazutaka Narita
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP724278A priority Critical patent/JPS54101290A/en
Publication of JPS54101290A publication Critical patent/JPS54101290A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/06—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
    • H01L27/0688—Integrated circuits having a three-dimensional layout

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)

Abstract

PURPOSE:To form the bipolar element such as lateral type transistors for the polysilicon layer, by using the selective diffusion method in CMOS as it is. CONSTITUTION:MOSFET of different channel is respectively formed at the substrate region and the well region by forming the well 4 on the silicon semiconductor substrate 1, the polysilicon layer 6 is formed via the insulation film 5 on the substrate, and the hybrid type IC having the lateral type pn junction semiconductor element is formed on the layer 6 by utilizing the diffuion process to form MOSFET on this layer 6.
JP724278A 1978-01-27 1978-01-27 Semiconductor integtated circuit unit and its manufacture Pending JPS54101290A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP724278A JPS54101290A (en) 1978-01-27 1978-01-27 Semiconductor integtated circuit unit and its manufacture

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP724278A JPS54101290A (en) 1978-01-27 1978-01-27 Semiconductor integtated circuit unit and its manufacture

Publications (1)

Publication Number Publication Date
JPS54101290A true JPS54101290A (en) 1979-08-09

Family

ID=11660527

Family Applications (1)

Application Number Title Priority Date Filing Date
JP724278A Pending JPS54101290A (en) 1978-01-27 1978-01-27 Semiconductor integtated circuit unit and its manufacture

Country Status (1)

Country Link
JP (1) JPS54101290A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0105695A2 (en) * 1982-09-30 1984-04-18 Kabushiki Kaisha Toshiba MOS/bipolar integrated circuit device and manufacturing method thereof
JPS61220453A (en) * 1985-03-23 1986-09-30 エステイーシー　ピーエルシー Integrated circuit and manufacture thereof
US7026690B2 (en) * 2003-02-12 2006-04-11 Micron Technology, Inc. Memory devices and electronic systems comprising integrated bipolar and FET devices

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0105695A2 (en) * 1982-09-30 1984-04-18 Kabushiki Kaisha Toshiba MOS/bipolar integrated circuit device and manufacturing method thereof
JPS61220453A (en) * 1985-03-23 1986-09-30 エステイーシー　ピーエルシー Integrated circuit and manufacture thereof
EP0196757A2 (en) * 1985-03-23 1986-10-08 Stc Plc Semiconductor device comprising a bipolar transistor and a MOS transistor and method of manufacturing the same
US4845532A (en) * 1985-03-23 1989-07-04 Stc Plc Semiconductor devices
US4914048A (en) * 1985-03-23 1990-04-03 Stc Plc Method of making Bicmos devices
US7026690B2 (en) * 2003-02-12 2006-04-11 Micron Technology, Inc. Memory devices and electronic systems comprising integrated bipolar and FET devices
US7351620B2 (en) 2003-02-12 2008-04-01 Micron Technology, Inc. Methods of forming semiconductor constructions

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