DE3580240D1 - Ein-element-transistor/kondensator-halbleiterspeicheranordnung und verfahren zu ihrer herstellung. - Google Patents

Ein-element-transistor/kondensator-halbleiterspeicheranordnung und verfahren zu ihrer herstellung.

Info

Publication number
DE3580240D1
DE3580240D1 DE8585307925T DE3580240T DE3580240D1 DE 3580240 D1 DE3580240 D1 DE 3580240D1 DE 8585307925 T DE8585307925 T DE 8585307925T DE 3580240 T DE3580240 T DE 3580240T DE 3580240 D1 DE3580240 D1 DE 3580240D1
Authority
DE
Germany
Prior art keywords
production
semiconductor storage
storage arrangement
element transistor
capacitor semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE8585307925T
Other languages
English (en)
Inventor
Masashi C O Patent Divisi Wada
Shigeyoshi C O Patent Watanabe
Fujio C O Patent Divis Masuoka
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Application granted granted Critical
Publication of DE3580240D1 publication Critical patent/DE3580240D1/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B12/00Dynamic random access memory [DRAM] devices
    • H10B12/01Manufacture or treatment
    • H10B12/02Manufacture or treatment for one transistor one-capacitor [1T-1C] memory cells
    • H10B12/03Making the capacitor or connections thereto
    • H10B12/038Making the capacitor or connections thereto the capacitor being in a trench in the substrate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/10Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/762Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76202Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO
    • H01L21/76205Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO in a region being recessed from the surface, e.g. in a recess, groove, tub or trench region
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/762Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76224Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/86Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
    • H01L29/92Capacitors having potential barriers
    • H01L29/94Metal-insulator-semiconductors, e.g. MOS
    • H01L29/945Trench capacitors
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B12/00Dynamic random access memory [DRAM] devices
    • H10B12/30DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
    • H10B12/37DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells the capacitor being at least partially in a trench in the substrate

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Ceramic Engineering (AREA)
  • Semiconductor Memories (AREA)
  • Semiconductor Integrated Circuits (AREA)
DE8585307925T 1984-10-31 1985-10-31 Ein-element-transistor/kondensator-halbleiterspeicheranordnung und verfahren zu ihrer herstellung. Expired - Lifetime DE3580240D1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59229203A JPS61107762A (ja) 1984-10-31 1984-10-31 半導体記憶装置の製造方法

Publications (1)

Publication Number Publication Date
DE3580240D1 true DE3580240D1 (de) 1990-11-29

Family

ID=16888432

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8585307925T Expired - Lifetime DE3580240D1 (de) 1984-10-31 1985-10-31 Ein-element-transistor/kondensator-halbleiterspeicheranordnung und verfahren zu ihrer herstellung.

Country Status (5)

Country Link
US (1) US4606011A (de)
EP (1) EP0181162B1 (de)
JP (1) JPS61107762A (de)
KR (1) KR900000180B1 (de)
DE (1) DE3580240D1 (de)

Families Citing this family (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62150879A (ja) * 1985-12-25 1987-07-04 Mitsubishi Electric Corp 半導体記憶装置
JPH0815206B2 (ja) * 1986-01-30 1996-02-14 三菱電機株式会社 半導体記憶装置
JPH0685427B2 (ja) * 1986-03-13 1994-10-26 三菱電機株式会社 半導体記憶装置
US6028346A (en) * 1986-04-25 2000-02-22 Mitsubishi Denki Kabushiki Kaisha Isolated trench semiconductor device
US5182227A (en) * 1986-04-25 1993-01-26 Mitsubishi Denki Kabushiki Kaisha Semiconductor device and method for manufacturing the same
JPH0620108B2 (ja) * 1987-03-23 1994-03-16 三菱電機株式会社 半導体装置の製造方法
DE19600422C1 (de) * 1996-01-08 1997-08-21 Siemens Ag Elektrisch programmierbare Speicherzellenanordnung und Verfahren zu deren Herstellung
US6121651A (en) 1998-07-30 2000-09-19 International Business Machines Corporation Dram cell with three-sided-gate transfer device
KR100609194B1 (ko) * 2002-02-14 2006-08-02 마츠시타 덴끼 산교 가부시키가이샤 반도체장치 및 그 제조방법
KR100451515B1 (ko) * 2002-06-28 2004-10-06 주식회사 하이닉스반도체 반도체소자의 캐패시터 제조방법
KR100584997B1 (ko) * 2003-07-18 2006-05-29 매그나칩 반도체 유한회사 트렌치 구조의 캐패시터를 구비한 아날로그 반도체 소자및 그제조 방법
JP2006049413A (ja) * 2004-08-02 2006-02-16 Fujitsu Ltd 半導体装置及びその製造方法
JP5303938B2 (ja) 2008-01-18 2013-10-02 富士通セミコンダクター株式会社 半導体装置とその製造方法
GB201617276D0 (en) 2016-10-11 2016-11-23 Big Solar Limited Energy storage

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4199722A (en) * 1976-06-30 1980-04-22 Israel Paz Tri-state delta modulator
JPS5681968A (en) * 1979-12-07 1981-07-04 Toshiba Corp Manufacture of semiconductor device
US4353086A (en) * 1980-05-07 1982-10-05 Bell Telephone Laboratories, Incorporated Silicon integrated circuits
US4547792A (en) * 1980-06-19 1985-10-15 Rockwell International Corporation Selective access array integrated circuit
JPS58154256A (ja) * 1982-03-10 1983-09-13 Hitachi Ltd 半導体装置
JPH0612804B2 (ja) * 1982-06-02 1994-02-16 株式会社東芝 半導体記憶装置
JPS5972161A (ja) * 1983-09-09 1984-04-24 Hitachi Ltd 半導体記憶装置

Also Published As

Publication number Publication date
EP0181162A2 (de) 1986-05-14
EP0181162A3 (en) 1988-01-07
US4606011A (en) 1986-08-12
EP0181162B1 (de) 1990-10-24
KR900000180B1 (ko) 1990-01-23
KR860003658A (ko) 1986-05-28
JPS61107762A (ja) 1986-05-26

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee