DE3483709D1 - Halbleiterspeicher und verfahren zu seiner herstellung. - Google Patents

Halbleiterspeicher und verfahren zu seiner herstellung.

Info

Publication number
DE3483709D1
DE3483709D1 DE8484111667T DE3483709T DE3483709D1 DE 3483709 D1 DE3483709 D1 DE 3483709D1 DE 8484111667 T DE8484111667 T DE 8484111667T DE 3483709 T DE3483709 T DE 3483709T DE 3483709 D1 DE3483709 D1 DE 3483709D1
Authority
DE
Germany
Prior art keywords
production
semiconductor storage
semiconductor
storage
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE8484111667T
Other languages
English (en)
Inventor
Hideo Sunami
Makoto Ohkura
Masanobu Miyao
Kikuo Kusukawa
Masahiro Moniwa
Shinichiro Kimura
Terunori Warabisako
Tokuo Kure
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from JP58177952A external-priority patent/JPH07105474B2/ja
Priority claimed from JP58246948A external-priority patent/JPS60140861A/ja
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Application granted granted Critical
Publication of DE3483709D1 publication Critical patent/DE3483709D1/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/30—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
    • H10B12/39—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells the capacitor and the transistor being in a same trench
    • H10B12/395—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells the capacitor and the transistor being in a same trench the transistor being vertical

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Semiconductor Memories (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Thin Film Transistor (AREA)
  • Non-Volatile Memory (AREA)
DE8484111667T 1983-09-28 1984-09-28 Halbleiterspeicher und verfahren zu seiner herstellung. Expired - Lifetime DE3483709D1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP58177952A JPH07105474B2 (ja) 1983-09-28 1983-09-28 半導体メモリ
JP58246948A JPS60140861A (ja) 1983-12-28 1983-12-28 マイクロキヤパシタ半導体メモリ

Publications (1)

Publication Number Publication Date
DE3483709D1 true DE3483709D1 (de) 1991-01-17

Family

ID=26498299

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8484111667T Expired - Lifetime DE3483709D1 (de) 1983-09-28 1984-09-28 Halbleiterspeicher und verfahren zu seiner herstellung.

Country Status (4)

Country Link
US (2) US4937641A (de)
EP (1) EP0135942B1 (de)
KR (1) KR920010461B1 (de)
DE (1) DE3483709D1 (de)

Families Citing this family (45)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5357131A (en) * 1982-03-10 1994-10-18 Hitachi, Ltd. Semiconductor memory with trench capacitor
JPH0682800B2 (ja) * 1985-04-16 1994-10-19 株式会社東芝 半導体記憶装置
US4735824A (en) * 1985-05-31 1988-04-05 Kabushiki Kaisha Toshiba Method of manufacturing an MOS capacitor
US4820652A (en) * 1985-12-11 1989-04-11 Sony Corporation Manufacturing process and structure of semiconductor memory devices
US4811067A (en) * 1986-05-02 1989-03-07 International Business Machines Corporation High density vertically structured memory
US4769786A (en) * 1986-07-15 1988-09-06 International Business Machines Corporation Two square memory cells
US4959698A (en) * 1986-10-08 1990-09-25 Mitsubishi Denki Kabushiki Kaisha Memory cell of a semiconductor memory device
JP2606857B2 (ja) * 1987-12-10 1997-05-07 株式会社日立製作所 半導体記憶装置の製造方法
JPH07105477B2 (ja) * 1988-05-28 1995-11-13 富士通株式会社 半導体装置及びその製造方法
US5136533A (en) * 1988-07-08 1992-08-04 Eliyahou Harari Sidewall capacitor DRAM cell
US4958318A (en) * 1988-07-08 1990-09-18 Eliyahou Harari Sidewall capacitor DRAM cell
JP2743391B2 (ja) * 1988-08-25 1998-04-22 ソニー株式会社 半導体メモリの製造方法
US5181088A (en) * 1988-09-14 1993-01-19 Kabushiki Kaisha Toshiba Vertical field effect transistor with an extended polysilicon channel region
US5021355A (en) * 1989-05-22 1991-06-04 International Business Machines Corporation Method of fabricating cross-point lightly-doped drain-source trench transistor
US5124766A (en) * 1989-06-30 1992-06-23 Texas Instruments Incorporated Filament channel transistor interconnected with a conductor
JPH0775247B2 (ja) * 1990-05-28 1995-08-09 株式会社東芝 半導体記憶装置
EP0468758B1 (de) * 1990-07-24 1997-03-26 Semiconductor Energy Laboratory Co., Ltd. Verfahren zum Herstellen isolierender Filme, Kapazitäten und Halbleiteranordnungen
US7335570B1 (en) 1990-07-24 2008-02-26 Semiconductor Energy Laboratory Co., Ltd. Method of forming insulating films, capacitances, and semiconductor devices
US5302843A (en) * 1990-07-26 1994-04-12 Semiconductor Energy Laboratory Co., Ltd. Improved vertical channel transistor
US5132745A (en) * 1990-10-05 1992-07-21 General Electric Company Thin film transistor having an improved gate structure and gate coverage by the gate dielectric
US5214301A (en) * 1991-09-30 1993-05-25 Motorola, Inc. Field effect transistor having control and current electrodes positioned at a planar elevated surface
JPH05175191A (ja) * 1991-10-22 1993-07-13 Mitsubishi Electric Corp 積層導電配線
US5324673A (en) * 1992-11-19 1994-06-28 Motorola, Inc. Method of formation of vertical transistor
KR0135067B1 (ko) * 1993-03-22 1998-04-20 문정환 반도체 장치의 메모리셀 제조방법 및 구조
KR0147584B1 (ko) * 1994-03-17 1998-08-01 윤종용 매몰 비트라인 셀의 제조방법
US6713238B1 (en) * 1998-10-09 2004-03-30 Stephen Y. Chou Microscale patterning and articles formed thereby
DE10038728A1 (de) * 2000-07-31 2002-02-21 Infineon Technologies Ag Halbleiterspeicher-Zellenanordnung und Verfahren zu deren Herstellung
US6727140B2 (en) 2001-07-11 2004-04-27 Micron Technology, Inc. Capacitor with high dielectric constant materials and method of making
US7008547B2 (en) * 2002-03-14 2006-03-07 Sarnoff Corporation Solid phase sensors
KR100464649B1 (ko) * 2002-04-23 2005-01-03 주식회사 하이닉스반도체 이중 유전막 구조를 가진 반도체소자의 캐패시터 및 그제조방법
US7385954B2 (en) * 2003-07-16 2008-06-10 Lucent Technologies Inc. Method of transmitting or retransmitting packets in a communication system
US7473596B2 (en) * 2003-12-19 2009-01-06 Micron Technology, Inc. Methods of forming memory cells
KR100887055B1 (ko) * 2004-08-24 2009-03-04 마이크론 테크놀로지, 인크 반도체 구조 및 반도체 구조 제작 방법
US7122425B2 (en) 2004-08-24 2006-10-17 Micron Technology, Inc. Methods of forming semiconductor constructions
US7547945B2 (en) * 2004-09-01 2009-06-16 Micron Technology, Inc. Transistor devices, transistor structures and semiconductor constructions
US7384849B2 (en) 2005-03-25 2008-06-10 Micron Technology, Inc. Methods of forming recessed access devices associated with semiconductor constructions
US7282401B2 (en) 2005-07-08 2007-10-16 Micron Technology, Inc. Method and apparatus for a self-aligned recessed access device (RAD) transistor gate
US7867851B2 (en) 2005-08-30 2011-01-11 Micron Technology, Inc. Methods of forming field effect transistors on substrates
US7700441B2 (en) * 2006-02-02 2010-04-20 Micron Technology, Inc. Methods of forming field effect transistors, methods of forming field effect transistor gates, methods of forming integrated circuitry comprising a transistor gate array and circuitry peripheral to the gate array, and methods of forming integrated circuitry comprising a transistor gate array including first gates and second grounded isolation gates
US7602001B2 (en) 2006-07-17 2009-10-13 Micron Technology, Inc. Capacitorless one transistor DRAM cell, integrated circuitry comprising an array of capacitorless one transistor DRAM cells, and method of forming lines of capacitorless one transistor DRAM cells
US7772632B2 (en) 2006-08-21 2010-08-10 Micron Technology, Inc. Memory arrays and methods of fabricating memory arrays
US7589995B2 (en) 2006-09-07 2009-09-15 Micron Technology, Inc. One-transistor memory cell with bias gate
US7923373B2 (en) 2007-06-04 2011-04-12 Micron Technology, Inc. Pitch multiplication using self-assembling materials
US8575584B2 (en) 2011-09-03 2013-11-05 Avalanche Technology Inc. Resistive memory device having vertical transistors and method for making the same
JP6100559B2 (ja) * 2012-03-05 2017-03-22 株式会社半導体エネルギー研究所 半導体記憶装置

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2807181C2 (de) * 1977-02-21 1985-11-28 Zaidan Hojin Handotai Kenkyu Shinkokai, Sendai, Miyagi Halbleiterspeichervorrichtung
US4462040A (en) * 1979-05-07 1984-07-24 International Business Machines Corporation Single electrode U-MOSFET random access memory
JPS5834946B2 (ja) * 1980-10-16 1983-07-29 三菱電機株式会社 半導体記憶装置
JPS583269A (ja) * 1981-06-30 1983-01-10 Fujitsu Ltd 縦型ｍｏｓダイナミツクメモリ−セル
JPS58154256A (ja) * 1982-03-10 1983-09-13 Hitachi Ltd 半導体装置
JPS5919366A (ja) * 1982-07-23 1984-01-31 Hitachi Ltd 半導体記憶装置
JPS5982761A (ja) * 1982-11-04 1984-05-12 Hitachi Ltd 半導体メモリ
US4713678A (en) * 1984-12-07 1987-12-15 Texas Instruments Incorporated dRAM cell and method

Also Published As

Publication number Publication date
US4984038A (en) 1991-01-08
EP0135942B1 (de) 1990-12-05
KR920010461B1 (ko) 1992-11-28
EP0135942A3 (en) 1986-02-12
KR850002680A (ko) 1985-05-15
US4937641A (en) 1990-06-26
EP0135942A2 (de) 1985-04-03

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee