DE3019850C2 - - Google Patents
Info
- Publication number
 - DE3019850C2 DE3019850C2 DE3019850A DE3019850A DE3019850C2 DE 3019850 C2 DE3019850 C2 DE 3019850C2 DE 3019850 A DE3019850 A DE 3019850A DE 3019850 A DE3019850 A DE 3019850A DE 3019850 C2 DE3019850 C2 DE 3019850C2
 - Authority
 - DE
 - Germany
 - Prior art keywords
 - film
 - sio
 - oxide film
 - substrate
 - films
 - Prior art date
 - Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
 - Expired - Lifetime
 
Links
Classifications
- 
        
- H—ELECTRICITY
 - H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
 - H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
 - H10D30/00—Field-effect transistors [FET]
 - H10D30/60—Insulated-gate field-effect transistors [IGFET]
 
 - 
        
- G—PHYSICS
 - G11—INFORMATION STORAGE
 - G11C—STATIC STORES
 - G11C16/00—Erasable programmable read-only memories
 - G11C16/02—Erasable programmable read-only memories electrically programmable
 - G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
 - G11C16/0466—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells with charge storage in an insulating layer, e.g. metal-nitride-oxide-silicon [MNOS], silicon-oxide-nitride-oxide-silicon [SONOS]
 
 - 
        
- H—ELECTRICITY
 - H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
 - H10B—ELECTRONIC MEMORY DEVICES
 - H10B69/00—Erasable-and-programmable ROM [EPROM] devices not provided for in groups H10B41/00 - H10B63/00, e.g. ultraviolet erasable-and-programmable ROM [UVEPROM] devices
 
 - 
        
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
 - Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
 - Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
 - Y10S148/00—Metal treatment
 - Y10S148/07—Guard rings and cmos
 
 - 
        
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
 - Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
 - Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
 - Y10S148/00—Metal treatment
 - Y10S148/117—Oxidation, selective
 
 - 
        
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
 - Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
 - Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
 - Y10S148/00—Metal treatment
 - Y10S148/141—Self-alignment coat gate
 
 
Landscapes
- Engineering & Computer Science (AREA)
 - Microelectronics & Electronic Packaging (AREA)
 - Non-Volatile Memory (AREA)
 - Element Separation (AREA)
 - Semiconductor Memories (AREA)
 - Static Random-Access Memory (AREA)
 - Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
 
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title | 
|---|---|---|---|
| JP6394179A JPS55156370A (en) | 1979-05-25 | 1979-05-25 | Manufacture of semiconductor device | 
Publications (2)
| Publication Number | Publication Date | 
|---|---|
| DE3019850A1 DE3019850A1 (de) | 1980-11-27 | 
| DE3019850C2 true DE3019850C2 (enEXAMPLES) | 1992-02-06 | 
Family
ID=13243870
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date | 
|---|---|---|---|
| DE19803019850 Granted DE3019850A1 (de) | 1979-05-25 | 1980-05-23 | Halbleitervorrichtung und verfahren zu ihrer herstellung | 
Country Status (3)
| Country | Link | 
|---|---|
| US (3) | US4586238A (enEXAMPLES) | 
| JP (1) | JPS55156370A (enEXAMPLES) | 
| DE (1) | DE3019850A1 (enEXAMPLES) | 
Families Citing this family (37)
| Publication number | Priority date | Publication date | Assignee | Title | 
|---|---|---|---|---|
| US5348898A (en) * | 1979-05-25 | 1994-09-20 | Hitachi, Ltd. | Semiconductor device and method for manufacturing the same | 
| JPS55156370A (en) * | 1979-05-25 | 1980-12-05 | Hitachi Ltd | Manufacture of semiconductor device | 
| US5252505A (en) * | 1979-05-25 | 1993-10-12 | Hitachi, Ltd. | Method for manufacturing a semiconductor device | 
| JPS5736844A (en) * | 1980-08-15 | 1982-02-27 | Hitachi Ltd | Semiconductor device | 
| JPS57114283A (en) * | 1981-01-08 | 1982-07-16 | Toshiba Corp | Non-volatile semiconductive memory | 
| EP0061512B1 (de) * | 1981-04-01 | 1985-09-18 | Deutsche ITT Industries GmbH | Integrierte Schaltungsanordnung zum Schreiben, Lesen und Löschen von Speichermatrizen mit Isolierschicht-Feldeffekttransistoren nichtflüchtigen Speicherverhaltens | 
| US4516313A (en) * | 1983-05-27 | 1985-05-14 | Ncr Corporation | Unified CMOS/SNOS semiconductor fabrication process | 
| NL8304256A (nl) * | 1983-12-09 | 1985-07-01 | Philips Nv | Halfgeleiderinrichting. | 
| KR940011426B1 (ko) * | 1985-07-26 | 1994-12-15 | 가부시기가이샤 히다찌세이사꾸쇼 | 반도체 기억 장치 | 
| JPH0789569B2 (ja) * | 1986-03-26 | 1995-09-27 | 株式会社日立製作所 | 半導体集積回路装置及びその製造方法 | 
| US4922311A (en) * | 1987-12-04 | 1990-05-01 | American Telephone And Telegraph Company | Folded extended window field effect transistor | 
| US5057448A (en) * | 1988-02-26 | 1991-10-15 | Hitachi, Ltd. | Method of making a semiconductor device having DRAM cells and floating gate memory cells | 
| JP2654449B2 (ja) * | 1988-06-09 | 1997-09-17 | 株式会社日立製作所 | 半導体集積回路装置及びその製造方法 | 
| JPH0271499A (ja) * | 1988-09-06 | 1990-03-12 | Hitachi Ltd | 半導体記憶装置 | 
| JP2515009B2 (ja) * | 1989-01-13 | 1996-07-10 | 株式会社東芝 | 不揮発性半導体メモリの製造方法 | 
| JPH0338475U (enEXAMPLES) * | 1989-08-24 | 1991-04-15 | ||
| JP2572653B2 (ja) * | 1989-12-29 | 1997-01-16 | セイコーエプソン株式会社 | 半導体装置の製造方法 | 
| US5624741A (en) * | 1990-05-31 | 1997-04-29 | E. I. Du Pont De Nemours And Company | Interconnect structure having electrical conduction paths formable therein | 
| JPH04123471A (ja) | 1990-09-14 | 1992-04-23 | Oki Electric Ind Co Ltd | 半導体記憶装置のデータ書込みおよび消去方法 | 
| US5286992A (en) * | 1990-09-28 | 1994-02-15 | Actel Corporation | Low voltage device in a high voltage substrate | 
| JP3266644B2 (ja) * | 1991-04-08 | 2002-03-18 | テキサス インスツルメンツ インコーポレイテツド | ゲートアレイ装置 | 
| US5514616A (en) * | 1991-08-26 | 1996-05-07 | Lsi Logic Corporation | Depositing and densifying glass to planarize layers in semi-conductor devices based on CMOS structures | 
| US5619063A (en) * | 1993-07-07 | 1997-04-08 | Actel Corporation | Edgeless, self-aligned, differential oxidation enhanced and difusion-controlled minimum-geometry antifuse and method of fabrication | 
| US5498895A (en) * | 1993-07-07 | 1996-03-12 | Actel Corporation | Process ESD protection devices for use with antifuses | 
| US5369054A (en) * | 1993-07-07 | 1994-11-29 | Actel Corporation | Circuits for ESD protection of metal-to-metal antifuses during processing | 
| DE69330564T2 (de) * | 1993-12-15 | 2002-06-27 | Stmicroelectronics S.R.L., Agrate Brianza | Integrierte Schaltung die eine EEPROM-Zelle und einen MOS-Transistor enthält | 
| US5783470A (en) * | 1995-12-14 | 1998-07-21 | Lsi Logic Corporation | Method of making CMOS dynamic random-access memory structures and the like | 
| US5824596A (en) * | 1996-08-08 | 1998-10-20 | National Semiconductor Corporation | POCl3 process flow for doping polysilicon without forming oxide pillars or gate oxide shorts | 
| US5909049A (en) * | 1997-02-11 | 1999-06-01 | Actel Corporation | Antifuse programmed PROM cell | 
| JP4014708B2 (ja) * | 1997-08-21 | 2007-11-28 | 株式会社ルネサステクノロジ | 半導体集積回路装置の設計方法 | 
| JP3408466B2 (ja) * | 1999-08-23 | 2003-05-19 | エヌイーシーマイクロシステム株式会社 | 半導体記憶装置 | 
| JP2001332561A (ja) * | 2000-05-22 | 2001-11-30 | Nec Corp | バイポーラトランジスタおよびその製造方法 | 
| TW497151B (en) * | 2001-09-21 | 2002-08-01 | Mosel Vitelic Inc | Method for producing semiconductor with increased threshold voltage uniformity of transistor | 
| JP4547852B2 (ja) * | 2002-09-04 | 2010-09-22 | 富士ゼロックス株式会社 | 電気部品の製造方法 | 
| KR100623633B1 (ko) * | 2004-05-19 | 2006-09-18 | 이태복 | 고 내압용 반도체 소자의 제조방법 | 
| JP4991134B2 (ja) * | 2005-09-15 | 2012-08-01 | ルネサスエレクトロニクス株式会社 | 半導体装置およびその製造方法 | 
| CN109524457B (zh) * | 2017-09-20 | 2021-11-02 | 联华电子股份有限公司 | 半导体装置 | 
Family Cites Families (24)
| Publication number | Priority date | Publication date | Assignee | Title | 
|---|---|---|---|---|
| GB1153428A (en) * | 1965-06-18 | 1969-05-29 | Philips Nv | Improvements in Semiconductor Devices. | 
| US3882469A (en) * | 1971-11-30 | 1975-05-06 | Texas Instruments Inc | Non-volatile variable threshold memory cell | 
| US3853633A (en) * | 1972-12-04 | 1974-12-10 | Motorola Inc | Method of making a semi planar insulated gate field-effect transistor device with implanted field | 
| US3983572A (en) * | 1973-07-09 | 1976-09-28 | International Business Machines | Semiconductor devices | 
| US4027380A (en) * | 1974-06-03 | 1977-06-07 | Fairchild Camera And Instrument Corporation | Complementary insulated gate field effect transistor structure and process for fabricating the structure | 
| US4053798A (en) * | 1975-02-20 | 1977-10-11 | Matsushita Electronics Corporation | Negative resistance device | 
| JPS51147976A (en) * | 1975-06-02 | 1976-12-18 | Ncr Co | Nnchannel silicone added polysilicon gate semiconductor device and method of producing same | 
| JPS5228229A (en) * | 1975-08-28 | 1977-03-03 | Mitsubishi Electric Corp | Semiconductor memory | 
| JPS5286083A (en) * | 1976-01-12 | 1977-07-16 | Hitachi Ltd | Production of complimentary isolation gate field effect transistor | 
| JPS52131483A (en) * | 1976-04-28 | 1977-11-04 | Hitachi Ltd | Mis-type semiconductor device | 
| US4099069A (en) * | 1976-10-08 | 1978-07-04 | Westinghouse Electric Corp. | Circuit producing a common clear signal for erasing selected arrays in a mnos memory system | 
| US4179311A (en) * | 1977-01-17 | 1979-12-18 | Mostek Corporation | Method of stabilizing semiconductor device by converting doped poly-Si to polyoxides | 
| JPS53102684A (en) * | 1977-02-18 | 1978-09-07 | Mitsubishi Electric Corp | Semiconductor memory device | 
| JPS53124084A (en) * | 1977-04-06 | 1978-10-30 | Hitachi Ltd | Semiconductor memory device containing floating type poly silicon layer and its manufacture | 
| DE2746234A1 (de) * | 1977-10-14 | 1979-04-19 | Itt Ind Gmbh Deutsche | Feldeffekt-speichertransistor und speichermatrix | 
| JPS5457875A (en) * | 1977-10-17 | 1979-05-10 | Hitachi Ltd | Semiconductor nonvolatile memory device | 
| US4384399A (en) * | 1978-03-20 | 1983-05-24 | Texas Instruments Incorporated | Method of making a metal programmable MOS read only memory device | 
| US4385432A (en) * | 1978-05-18 | 1983-05-31 | Texas Instruments Incorporated | Closely-spaced double level conductors for MOS read only | 
| JPS5529116A (en) * | 1978-08-23 | 1980-03-01 | Hitachi Ltd | Manufacture of complementary misic | 
| US4377818A (en) * | 1978-11-02 | 1983-03-22 | Texas Instruments Incorporated | High density electrically programmable ROM | 
| NL7903158A (nl) * | 1979-04-23 | 1980-10-27 | Philips Nv | Werkwijze voor het vervaardigen van een veldeffekt- transistor met geisoleerde poortelektrode, en transistor vervaardigd door toepassing van een derge- lijke werkwijze. | 
| JPS55156370A (en) * | 1979-05-25 | 1980-12-05 | Hitachi Ltd | Manufacture of semiconductor device | 
| US4306916A (en) * | 1979-09-20 | 1981-12-22 | American Microsystems, Inc. | CMOS P-Well selective implant method | 
| KR910009739B1 (ko) * | 1988-07-13 | 1991-11-29 | 삼성전자 주식회사 | 반도체장치의 제조방법 | 
- 
        1979
        
- 1979-05-25 JP JP6394179A patent/JPS55156370A/ja active Granted
 
 - 
        1980
        
- 1980-05-23 DE DE19803019850 patent/DE3019850A1/de active Granted
 
 - 
        1983
        
- 1983-04-21 US US06/487,085 patent/US4586238A/en not_active Expired - Lifetime
 
 - 
        1986
        
- 1986-04-10 US US06/850,037 patent/US4851364A/en not_active Expired - Lifetime
 
 - 
        1989
        
- 1989-05-15 US US07/351,847 patent/US5114870A/en not_active Expired - Lifetime
 
 
Also Published As
| Publication number | Publication date | 
|---|---|
| JPS55156370A (en) | 1980-12-05 | 
| JPH0219980B2 (enEXAMPLES) | 1990-05-07 | 
| US5114870A (en) | 1992-05-19 | 
| DE3019850A1 (de) | 1980-11-27 | 
| US4851364A (en) | 1989-07-25 | 
| US4586238A (en) | 1986-05-06 | 
Similar Documents
| Publication | Publication Date | Title | 
|---|---|---|
| DE3019850C2 (enEXAMPLES) | ||
| DE2700873C2 (de) | Verfahren zur Herstellung von komplementären Isolierschicht-Feldeffekttransistoren | |
| DE69032735T2 (de) | Verfahren zum Herstellen von Hochspannungs- und Niederspannungs-CMOS-Transistoren in einem einzigen integrierten Schaltungs-Chip | |
| DE2933849C2 (enEXAMPLES) | ||
| DE1764056C2 (de) | Verfahren zum Herstellen einer Halbleiteranordnung | |
| DE2253702C3 (de) | Verfahren zur Herstellung eines Halbleiterbauelementes | |
| DE3780369T2 (de) | Verfahren zum herstellen einer halbleiterstruktur. | |
| DE4116690C2 (de) | Elementisolationsaufbau einer Halbleitereinrichtung und Verfahren zur Herstellung derselben | |
| DE19747159B4 (de) | Halbleiterbauteil mit MOS-Gatesteuerung und Verfahren zu seiner Herstellung | |
| DE2654482C2 (enEXAMPLES) | ||
| DE2916364C2 (enEXAMPLES) | ||
| DE3334337A1 (de) | Verfahren zur herstellung einer integrierten halbleitereinrichtung | |
| EP0001574B1 (de) | Halbleiteranordnung für Widerstandsstrukturen in hochintegrierten Schaltkreisen und Verfahren zur Herstellung dieser Halbleiteranordnung | |
| EP0020998B1 (de) | Verfahren zum Herstellen eines bipolaren Transistors mit ionenimplantierter Emitterzone | |
| DE2734694A1 (de) | Isolierschicht-feldeffekttransistor mit kleiner kanallaenge und verfahren zu seiner herstellung | |
| DE2750209A1 (de) | Integrierte halbleiterschaltung und verfahren zu ihrer herstellung | |
| DE3150222A1 (de) | "verfahren zum herstellen einer halbleitervorrichtung" | |
| DE2247975C3 (de) | Verfahren zur Herstellung von Dünnschicht-Schaltungen mit komplementären MOS-Transistoren | |
| DE3603470A1 (de) | Verfahren zur herstellung von feldeffektbauelementen auf einem siliziumsubstrat | |
| DE2726003A1 (de) | Verfahren zur herstellung von mis- bauelementen mit versetztem gate | |
| DE3588129T2 (de) | Verbesserungen von Verfahren zum Herstellen von Chips mit einer integrierten Schaltung und auf diese Art hergestellte Chips | |
| EP0025854A1 (de) | Verfahren zum Herstellen von bipolaren Transistoren | |
| DE69415500T2 (de) | Verfahren zur Herstellung eines Halbleiterbauteils mit vergrabenem Übergang | |
| DE3788120T2 (de) | Verfahren zur herstellung gestapelter mos-strukturen. | |
| DE3886062T2 (de) | Verfahren zum Herstellen integrierter Strukturen aus bipolaren und CMOS-Transistoren. | 
Legal Events
| Date | Code | Title | Description | 
|---|---|---|---|
| OAR | Request for search filed | ||
| OB | Request for examination as to novelty | ||
| OC | Search report available | ||
| 8128 | New person/name/address of the agent | 
             Representative=s name: STREHL, P., DIPL.-ING. DIPL.-WIRTSCH.-ING. SCHUEBE  | 
        |
| 8110 | Request for examination paragraph 44 | ||
| 8125 | Change of the main classification | 
             Ipc: G11C 17/06  | 
        |
| D2 | Grant after examination | ||
| 8364 | No opposition during term of opposition |