DE19842441B4 - Halbleiterbauelement und Verfahren zu seiner Herstellung - Google Patents

Halbleiterbauelement und Verfahren zu seiner Herstellung Download PDF

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Publication number
DE19842441B4
DE19842441B4 DE19842441A DE19842441A DE19842441B4 DE 19842441 B4 DE19842441 B4 DE 19842441B4 DE 19842441 A DE19842441 A DE 19842441A DE 19842441 A DE19842441 A DE 19842441A DE 19842441 B4 DE19842441 B4 DE 19842441B4
Authority
DE
Germany
Prior art keywords
semiconductor
semiconductor substrate
layer
transistor
electrode
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE19842441A
Other languages
German (de)
English (en)
Other versions
DE19842441A1 (de
Inventor
Shigenobu Maeda
Tadashi Nishimura
Kazuhito Tsutsumi
Shigeto Maegawa
Yuuichi Hirano
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Publication of DE19842441A1 publication Critical patent/DE19842441A1/de
Application granted granted Critical
Publication of DE19842441B4 publication Critical patent/DE19842441B4/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W42/00—Arrangements for protection of devices
    • H10W42/20—Arrangements for protection of devices protecting against electromagnetic or particle radiation, e.g. light, X-rays, gamma-rays or electrons
    • H10W42/25—Arrangements for protection of devices protecting against electromagnetic or particle radiation, e.g. light, X-rays, gamma-rays or electrons against alpha rays, e.g. for outer space applications
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/67—Thin-film transistors [TFT]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/01—Manufacture or treatment
    • H10W72/012—Manufacture or treatment of bump connectors, dummy bumps or thermal bumps
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/01—Manufacture or treatment
    • H10W72/012—Manufacture or treatment of bump connectors, dummy bumps or thermal bumps
    • H10W72/01221—Manufacture or treatment of bump connectors, dummy bumps or thermal bumps using local deposition
    • H10W72/01225—Manufacture or treatment of bump connectors, dummy bumps or thermal bumps using local deposition in solid form, e.g. by using a powder or by stud bumping
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/01—Manufacture or treatment
    • H10W72/012—Manufacture or treatment of bump connectors, dummy bumps or thermal bumps
    • H10W72/01251—Changing the shapes of bumps
    • H10W72/01255—Changing the shapes of bumps by using masks
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/01—Manufacture or treatment
    • H10W72/019—Manufacture or treatment of bond pads
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H10W72/241—Dispositions, e.g. layouts
    • H10W72/242—Dispositions, e.g. layouts relative to the surface, e.g. recessed, protruding
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H10W72/251—Materials
    • H10W72/252—Materials comprising solid metals or solid metalloids, e.g. PbSn, Ag or Cu
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H10W72/29—Bond pads specially adapted therefor
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/951—Materials of bond pads
    • H10W72/952—Materials of bond pads comprising metals or metalloids, e.g. PbSn, Ag or Cu
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H10W74/10—Encapsulations, e.g. protective coatings characterised by their shape or disposition
    • H10W74/131—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being only partially enclosed
    • H10W74/147—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being only partially enclosed the encapsulations being multilayered

Landscapes

  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Thin Film Transistor (AREA)
  • Wire Bonding (AREA)
DE19842441A 1998-02-26 1998-09-16 Halbleiterbauelement und Verfahren zu seiner Herstellung Expired - Fee Related DE19842441B4 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP10045459A JPH11243208A (ja) 1998-02-26 1998-02-26 半導体装置及びその製造方法
JPP10-45459 1998-02-26

Publications (2)

Publication Number Publication Date
DE19842441A1 DE19842441A1 (de) 1999-09-09
DE19842441B4 true DE19842441B4 (de) 2004-07-29

Family

ID=12719953

Family Applications (1)

Application Number Title Priority Date Filing Date
DE19842441A Expired - Fee Related DE19842441B4 (de) 1998-02-26 1998-09-16 Halbleiterbauelement und Verfahren zu seiner Herstellung

Country Status (6)

Country Link
US (2) US6459125B2 (https=)
JP (1) JPH11243208A (https=)
KR (2) KR19990071421A (https=)
DE (1) DE19842441B4 (https=)
FR (1) FR2775387B1 (https=)
TW (1) TW382817B (https=)

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH11243208A (ja) * 1998-02-26 1999-09-07 Mitsubishi Electric Corp 半導体装置及びその製造方法
JP3824845B2 (ja) * 2000-06-21 2006-09-20 セイコーエプソン株式会社 Ｌｃｄドライバｉｃチップ
JP2002270611A (ja) * 2001-03-14 2002-09-20 Mitsubishi Electric Corp 半導体装置及びその製造方法
JP2003045958A (ja) * 2001-07-27 2003-02-14 Denso Corp 半導体装置及びその製造方法
US6762503B2 (en) * 2002-08-29 2004-07-13 Micron Technology, Inc. Innovative solder ball pad structure to ease design rule, methods of fabricating same and substrates, electronic device assemblies and systems employing same
US6841874B1 (en) * 2002-11-01 2005-01-11 Amkor Technology, Inc. Wafer-level chip-scale package
DE10308275A1 (de) * 2003-02-26 2004-09-16 Advanced Micro Devices, Inc., Sunnyvale Strahlungsresistentes Halbleiterbauteil
US8093097B2 (en) * 2005-06-15 2012-01-10 Nxp B.V. Layer sequence and method of manufacturing a layer sequence
US7736915B2 (en) * 2006-02-21 2010-06-15 International Business Machines Corporation Method for neutralizing trapped charge in a charge accumulation layer of a semiconductor structure
WO2009027888A2 (en) * 2007-08-24 2009-03-05 Nxp B.V. Solderable structure
JP2009064812A (ja) * 2007-09-04 2009-03-26 Panasonic Corp 半導体装置の電極構造およびその関連技術
US8809182B2 (en) 2008-05-01 2014-08-19 International Business Machines Corporation Pad cushion structure and method of fabrication for Pb-free C4 integrated circuit chip joining
KR101936039B1 (ko) 2012-10-30 2019-01-08 삼성전자 주식회사 반도체 장치
US10163828B2 (en) * 2013-11-18 2018-12-25 Taiwan Semiconductor Manufacturing Company Ltd. Semiconductor device and fabricating method thereof
JP6416800B2 (ja) * 2016-01-26 2018-10-31 株式会社東芝 半導体装置

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5329423A (en) * 1993-04-13 1994-07-12 Scholz Kenneth D Compressive bump-and-socket interconnection scheme for integrated circuits
WO1994017553A1 (en) * 1993-01-21 1994-08-04 Hughes Aircraft Company Three dimensional integrated circuit and method of fabricating same

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Publication number Priority date Publication date Assignee Title
JPS63110734A (ja) 1986-10-29 1988-05-16 Hitachi Ltd 集積回路素子
JPS63229726A (ja) 1987-03-18 1988-09-26 Nec Corp 混成集積回路装置
JPS63262867A (ja) 1987-04-20 1988-10-31 Nec Corp 半導体記憶装置
US5024965A (en) 1990-02-16 1991-06-18 Chang Chen Chi P Manufacturing high speed low leakage radiation hardened CMOS/SOI devices
JPH03272176A (ja) 1990-03-22 1991-12-03 Fujitsu Ltd 半導体装置と基板と基板製造方法
KR100292330B1 (ko) * 1992-05-01 2001-09-17 이데이 노부유끼 반도체장치와그제조방법및실리콘절연기판의제조방법
JP2924506B2 (ja) * 1992-10-27 1999-07-26 日本電気株式会社 アクティブマトリックス型液晶表示装置の画素構造
JP3321899B2 (ja) * 1992-12-04 2002-09-09 株式会社デンソー 半導体装置
JP3269536B2 (ja) 1993-02-19 2002-03-25 株式会社デンソー 半導体装置
US5492863A (en) * 1994-10-19 1996-02-20 Motorola, Inc. Method for forming conductive bumps on a semiconductor device
JPH08139296A (ja) 1994-11-08 1996-05-31 Hitachi Ltd 半導体基板およびそれを用いた半導体集積回路装置
JP3272176B2 (ja) 1994-12-20 2002-04-08 東芝テック株式会社 商品販売登録データ処理装置
JP3296400B2 (ja) * 1995-02-01 2002-06-24 東芝マイクロエレクトロニクス株式会社 半導体装置、その製造方法およびＣｕ製リード
JPH0951083A (ja) 1995-08-10 1997-02-18 Mitsubishi Electric Corp ゲートアレイ型半導体集積回路装置及びその製造方法
US5670812A (en) * 1995-09-29 1997-09-23 International Business Machines Corporation Field effect transistor having contact layer of transistor gate electrode material
JP2748955B2 (ja) 1996-03-21 1998-05-13 株式会社日立製作所 半導体装置
JP2861965B2 (ja) * 1996-09-20 1999-02-24 日本電気株式会社 突起電極の形成方法
US5956605A (en) * 1996-09-20 1999-09-21 Micron Technology, Inc. Use of nitrides for flip-chip encapsulation
JPH10294318A (ja) * 1997-04-18 1998-11-04 Toshiba Corp 電子部品
JP3641111B2 (ja) * 1997-08-28 2005-04-20 株式会社ルネサステクノロジ 半導体装置の製造方法
US6204564B1 (en) * 1997-11-21 2001-03-20 Rohm Co., Ltd. Semiconductor device and method for making the same
JPH11243208A (ja) * 1998-02-26 1999-09-07 Mitsubishi Electric Corp 半導体装置及びその製造方法
JP3546783B2 (ja) * 1999-06-09 2004-07-28 セイコーエプソン株式会社 半導体記憶装置及びその製造方法

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1994017553A1 (en) * 1993-01-21 1994-08-04 Hughes Aircraft Company Three dimensional integrated circuit and method of fabricating same
US5329423A (en) * 1993-04-13 1994-07-12 Scholz Kenneth D Compressive bump-and-socket interconnection scheme for integrated circuits

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
Flip Chip Technologies, J.H. Lau, 26-28, McGraw Hill, 1998 *

Also Published As

Publication number Publication date
FR2775387B1 (fr) 2002-09-06
US6459125B2 (en) 2002-10-01
KR20010072669A (ko) 2001-07-31
US20020003259A1 (en) 2002-01-10
JPH11243208A (ja) 1999-09-07
TW382817B (en) 2000-02-21
KR100377893B1 (ko) 2003-03-29
DE19842441A1 (de) 1999-09-09
US20020110954A1 (en) 2002-08-15
KR19990071421A (ko) 1999-09-27
FR2775387A1 (fr) 1999-08-27

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OP8 Request for examination as to paragraph 44 patent law
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee