DE112015001756B4 - Halbleitervorrichtung mit isoliertem Gate und Verfahren zur Herstellung der Halbleitervorrichtung mit isoliertem Gate - Google Patents

Halbleitervorrichtung mit isoliertem Gate und Verfahren zur Herstellung der Halbleitervorrichtung mit isoliertem Gate Download PDF

Info

Publication number
DE112015001756B4
DE112015001756B4 DE112015001756.9T DE112015001756T DE112015001756B4 DE 112015001756 B4 DE112015001756 B4 DE 112015001756B4 DE 112015001756 T DE112015001756 T DE 112015001756T DE 112015001756 B4 DE112015001756 B4 DE 112015001756B4
Authority
DE
Germany
Prior art keywords
regions
region
trenches
conductivity type
area
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE112015001756.9T
Other languages
German (de)
English (en)
Other versions
DE112015001756T5 (de
Inventor
Jun Saito
Tomoharu IKEDA
Tomoyuki Shoji
Toshimasa Yamamoto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toyota Motor Corp
Original Assignee
Toyota Motor Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toyota Motor Corp filed Critical Toyota Motor Corp
Publication of DE112015001756T5 publication Critical patent/DE112015001756T5/de
Application granted granted Critical
Publication of DE112015001756B4 publication Critical patent/DE112015001756B4/de
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D12/00—Bipolar devices controlled by the field effect, e.g. insulated-gate bipolar transistors [IGBT]
    • H10D12/01—Manufacture or treatment
    • H10D12/031—Manufacture or treatment of IGBTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/028—Manufacture or treatment of FETs having insulated gates [IGFET] of double-diffused metal oxide semiconductor [DMOS] FETs
    • H10D30/0291—Manufacture or treatment of FETs having insulated gates [IGFET] of double-diffused metal oxide semiconductor [DMOS] FETs of vertical DMOS [VDMOS] FETs
    • H10D30/0297—Manufacture or treatment of FETs having insulated gates [IGFET] of double-diffused metal oxide semiconductor [DMOS] FETs of vertical DMOS [VDMOS] FETs using recessing of the gate electrodes, e.g. to form trench gate electrodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/64—Double-diffused metal-oxide semiconductor [DMOS] FETs
    • H10D30/66—Vertical DMOS [VDMOS] FETs
    • H10D30/665—Vertical DMOS [VDMOS] FETs having edge termination structures
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/64—Double-diffused metal-oxide semiconductor [DMOS] FETs
    • H10D30/66—Vertical DMOS [VDMOS] FETs
    • H10D30/668—Vertical DMOS [VDMOS] FETs having trench gate electrodes, e.g. UMOS transistors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/102—Constructional design considerations for preventing surface leakage or controlling electric field concentration
    • H10D62/103—Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices
    • H10D62/105—Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices by having particular doping profiles, shapes or arrangements of PN junctions; by having supplementary regions, e.g. junction termination extension [JTE] 
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/102—Constructional design considerations for preventing surface leakage or controlling electric field concentration
    • H10D62/103—Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices
    • H10D62/105—Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices by having particular doping profiles, shapes or arrangements of PN junctions; by having supplementary regions, e.g. junction termination extension [JTE] 
    • H10D62/106—Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices by having particular doping profiles, shapes or arrangements of PN junctions; by having supplementary regions, e.g. junction termination extension [JTE]  having supplementary regions doped oppositely to or in rectifying contact with regions of the semiconductor bodies, e.g. guard rings with PN or Schottky junctions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/102—Constructional design considerations for preventing surface leakage or controlling electric field concentration
    • H10D62/103—Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices
    • H10D62/105—Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices by having particular doping profiles, shapes or arrangements of PN junctions; by having supplementary regions, e.g. junction termination extension [JTE] 
    • H10D62/106—Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices by having particular doping profiles, shapes or arrangements of PN junctions; by having supplementary regions, e.g. junction termination extension [JTE]  having supplementary regions doped oppositely to or in rectifying contact with regions of the semiconductor bodies, e.g. guard rings with PN or Schottky junctions
    • H10D62/107—Buried supplementary regions, e.g. buried guard rings 
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/113—Isolations within a component, i.e. internal isolations
    • H10D62/115—Dielectric isolations, e.g. air gaps
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/124—Shapes, relative sizes or dispositions of the regions of semiconductor bodies or of junctions between the regions
    • H10D62/126—Top-view geometrical layouts of the regions or the junctions
    • H10D62/127—Top-view geometrical layouts of the regions or the junctions of cellular field-effect devices, e.g. multicellular DMOS transistors or IGBTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/17—Semiconductor regions connected to electrodes not carrying current to be rectified, amplified or switched, e.g. channel regions
    • H10D62/213—Channel regions of field-effect devices
    • H10D62/221—Channel regions of field-effect devices of FETs
    • H10D62/235—Channel regions of field-effect devices of FETs of IGFETs
    • H10D62/314—Channel regions of field-effect devices of FETs of IGFETs having vertical doping variations 
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/80—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
    • H10D62/83—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group IV materials, e.g. B-doped Si or undoped Ge
    • H10D62/832—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group IV materials, e.g. B-doped Si or undoped Ge being Group IV materials comprising two or more elements, e.g. SiGe
    • H10D62/8325—Silicon carbide
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P30/00—Ion implantation into wafers, substrates or parts of devices
    • H10P30/20—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping
    • H10P30/202—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping characterised by the semiconductor materials
    • H10P30/204—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping characterised by the semiconductor materials into Group IV semiconductors
    • H10P30/2042—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping characterised by the semiconductor materials into Group IV semiconductors into crystalline silicon carbide
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P30/00—Ion implantation into wafers, substrates or parts of devices
    • H10P30/20—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping
    • H10P30/21—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping of electrically active species
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/01—Manufacture or treatment
    • H10W10/011—Manufacture or treatment of isolation regions comprising dielectric materials
    • H10W10/014—Manufacture or treatment of isolation regions comprising dielectric materials using trench refilling with dielectric materials, e.g. shallow trench isolations
    • H10W10/0148—Manufacture or treatment of isolation regions comprising dielectric materials using trench refilling with dielectric materials, e.g. shallow trench isolations comprising introducing impurities in side walls or bottom walls of trenches, e.g. for forming channel stoppers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/10—Isolation regions comprising dielectric materials
    • H10W10/17—Isolation regions comprising dielectric materials formed using trench refilling with dielectric materials, e.g. shallow trench isolations
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D12/00—Bipolar devices controlled by the field effect, e.g. insulated-gate bipolar transistors [IGBT]
    • H10D12/411—Insulated-gate bipolar transistors [IGBT]
    • H10D12/441—Vertical IGBTs
    • H10D12/461—Vertical IGBTs having non-planar surfaces, e.g. having trenches, recesses or pillars in the surfaces of the emitter, base or collector regions
    • H10D12/481—Vertical IGBTs having non-planar surfaces, e.g. having trenches, recesses or pillars in the surfaces of the emitter, base or collector regions having gate structures on slanted surfaces, on vertical surfaces, or in grooves, e.g. trench gate IGBTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/20—Electrodes characterised by their shapes, relative sizes or dispositions 
    • H10D64/27—Electrodes not carrying the current to be rectified, amplified, oscillated or switched, e.g. gates
    • H10D64/311—Gate electrodes for field-effect devices
    • H10D64/411—Gate electrodes for field-effect devices for FETs
    • H10D64/511—Gate electrodes for field-effect devices for FETs for IGFETs
    • H10D64/514—Gate electrodes for field-effect devices for FETs for IGFETs characterised by the insulating layers
    • H10D64/516—Gate electrodes for field-effect devices for FETs for IGFETs characterised by the insulating layers the thicknesses being non-uniform
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/20—Electrodes characterised by their shapes, relative sizes or dispositions 
    • H10D64/27—Electrodes not carrying the current to be rectified, amplified, oscillated or switched, e.g. gates
    • H10D64/311—Gate electrodes for field-effect devices
    • H10D64/411—Gate electrodes for field-effect devices for FETs
    • H10D64/511—Gate electrodes for field-effect devices for FETs for IGFETs
    • H10D64/517—Gate electrodes for field-effect devices for FETs for IGFETs characterised by the conducting layers
    • H10D64/519—Gate electrodes for field-effect devices for FETs for IGFETs characterised by the conducting layers characterised by their top-view geometrical layouts

Landscapes

  • Electrodes Of Semiconductors (AREA)
DE112015001756.9T 2014-04-09 2015-02-10 Halbleitervorrichtung mit isoliertem Gate und Verfahren zur Herstellung der Halbleitervorrichtung mit isoliertem Gate Expired - Fee Related DE112015001756B4 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2014080040A JP6208612B2 (ja) 2014-04-09 2014-04-09 絶縁ゲート型半導体装置、及び、絶縁ゲート型半導体装置の製造方法
JPJP2014080040 2014-04-09
PCT/JP2015/053692 WO2015156023A1 (ja) 2014-04-09 2015-02-10 絶縁ゲート型半導体装置、及び、絶縁ゲート型半導体装置の製造方法

Publications (2)

Publication Number Publication Date
DE112015001756T5 DE112015001756T5 (de) 2017-01-19
DE112015001756B4 true DE112015001756B4 (de) 2019-04-04

Family

ID=54287604

Family Applications (1)

Application Number Title Priority Date Filing Date
DE112015001756.9T Expired - Fee Related DE112015001756B4 (de) 2014-04-09 2015-02-10 Halbleitervorrichtung mit isoliertem Gate und Verfahren zur Herstellung der Halbleitervorrichtung mit isoliertem Gate

Country Status (6)

Country Link
US (1) US9755042B2 (enExample)
JP (1) JP6208612B2 (enExample)
KR (1) KR101887795B1 (enExample)
CN (1) CN106463523B (enExample)
DE (1) DE112015001756B4 (enExample)
WO (1) WO2015156023A1 (enExample)

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP6266975B2 (ja) 2013-12-26 2018-01-24 トヨタ自動車株式会社 絶縁ゲート型半導体装置の製造方法及び絶縁ゲート型半導体装置
JP6278048B2 (ja) * 2016-02-19 2018-02-14 トヨタ自動車株式会社 半導体装置
DK201670595A1 (en) * 2016-06-11 2018-01-22 Apple Inc Configuring context-specific user interfaces
DE112018001179T5 (de) * 2017-03-06 2019-12-24 Mitsubishi Electric Corporation Siliciumcarbid-halbleitereinheit, leistungswandler, verfahren zur herstellung einer siliciumcarbid-halbleitereinheit und verfahren zur herstellung eines leistungswandlers
JP2019046991A (ja) * 2017-09-04 2019-03-22 ルネサスエレクトロニクス株式会社 半導体装置およびその製造方法
CN107634095A (zh) * 2017-09-14 2018-01-26 全球能源互联网研究院 沟槽型半导体功率器件及其制备方法
CN109300977A (zh) * 2018-10-08 2019-02-01 深圳市南硕明泰科技有限公司 一种晶体管及其制作方法
DE102019119121B3 (de) 2019-07-15 2020-09-03 Infineon Technologies Ag Graben-kontaktstruktur enthaltende halbleitervorrichtung und herstellungsverfahren
JP7326991B2 (ja) * 2019-08-22 2023-08-16 株式会社デンソー スイッチング素子
JP7288827B2 (ja) * 2019-09-06 2023-06-08 ルネサスエレクトロニクス株式会社 半導体装置の製造方法
JP7717010B2 (ja) * 2022-03-08 2025-08-01 株式会社デンソー 半導体装置
CN118198103A (zh) * 2024-03-26 2024-06-14 重庆万国半导体科技有限公司 提高电场分布均匀程度的沟槽器件终端结构及其制作方法

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20080087951A1 (en) 2004-10-29 2008-04-17 Toyota Jidosha Kabushiki Kaisha Insulated Gate Semiconductor Device and Method for Producing the Same
JP2008135522A (ja) 2006-11-28 2008-06-12 Toyota Motor Corp 半導体装置
US20120043602A1 (en) 2010-01-11 2012-02-23 Maxpower Semiconductor Inc. Power MOSFET and Its Edge Termination

Family Cites Families (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE4445553A1 (de) * 1993-12-21 1995-06-22 Nippon Denso Co Halbleiterbeschleunigungssensor
JPH1187698A (ja) 1997-09-02 1999-03-30 Kansai Electric Power Co Inc:The 高耐圧半導体装置及びこの装置を用いた電力変換器
US6380569B1 (en) 1999-08-10 2002-04-30 Rockwell Science Center, Llc High power unipolar FET switch
TW594946B (en) 2002-01-16 2004-06-21 Sanken Electric Co Ltd Manufacturing method of semiconductor device
JP4538211B2 (ja) * 2003-10-08 2010-09-08 トヨタ自動車株式会社 絶縁ゲート型半導体装置およびその製造方法
JP4488935B2 (ja) * 2005-03-11 2010-06-23 関西電力株式会社 高耐圧半導体装置
JP4735235B2 (ja) * 2005-12-19 2011-07-27 トヨタ自動車株式会社 絶縁ゲート型半導体装置およびその製造方法
JP4453671B2 (ja) 2006-03-08 2010-04-21 トヨタ自動車株式会社 絶縁ゲート型半導体装置およびその製造方法
DE102006036347B4 (de) * 2006-08-03 2012-01-12 Infineon Technologies Austria Ag Halbleiterbauelement mit einer platzsparenden Randstruktur
JP5206248B2 (ja) * 2008-09-04 2013-06-12 トヨタ自動車株式会社 半導体装置
JP2012238741A (ja) * 2011-05-12 2012-12-06 Panasonic Corp 半導体装置及びその製造方法
JP6037499B2 (ja) 2011-06-08 2016-12-07 ローム株式会社 半導体装置およびその製造方法
US20140221427A1 (en) 2011-06-22 2014-08-07 Celgene Corporation Isotopologues of pomalidomide
US20130087852A1 (en) 2011-10-06 2013-04-11 Suku Kim Edge termination structure for power semiconductor devices
US8653587B2 (en) 2012-02-13 2014-02-18 Force Mos Technology Co., Ltd. Trench MOSFET having a top side drain
JP6139355B2 (ja) 2013-09-24 2017-05-31 トヨタ自動車株式会社 半導体装置
JP6266975B2 (ja) 2013-12-26 2018-01-24 トヨタ自動車株式会社 絶縁ゲート型半導体装置の製造方法及び絶縁ゲート型半導体装置

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20080087951A1 (en) 2004-10-29 2008-04-17 Toyota Jidosha Kabushiki Kaisha Insulated Gate Semiconductor Device and Method for Producing the Same
JP2008135522A (ja) 2006-11-28 2008-06-12 Toyota Motor Corp 半導体装置
US20120043602A1 (en) 2010-01-11 2012-02-23 Maxpower Semiconductor Inc. Power MOSFET and Its Edge Termination

Also Published As

Publication number Publication date
JP2015201559A (ja) 2015-11-12
CN106463523A (zh) 2017-02-22
KR20160138294A (ko) 2016-12-02
US9755042B2 (en) 2017-09-05
JP6208612B2 (ja) 2017-10-04
US20170025516A1 (en) 2017-01-26
DE112015001756T5 (de) 2017-01-19
KR101887795B1 (ko) 2018-08-10
WO2015156023A1 (ja) 2015-10-15
CN106463523B (zh) 2019-05-10

Similar Documents

Publication Publication Date Title
DE112015001756B4 (de) Halbleitervorrichtung mit isoliertem Gate und Verfahren zur Herstellung der Halbleitervorrichtung mit isoliertem Gate
DE112016003510B4 (de) HALBLEITERVORRlCHTUNG UND VERFAHREN ZUR HERSTELLUNG EINER HALBLEITERVORRICHTUNG
DE102013022570B4 (de) Halbleiterbauelement und verfahren zu seiner herstellung
DE69635824T2 (de) Graben-dmos-transistor mit vergrabener schicht für verminderten anschaltwiderstand und verbesserter robustheit
DE102013007685B4 (de) Siliziumkarbid-halbleiterbauelement und verfahren zu dessen herstellung
DE112010005443B4 (de) Halbleitervorrichtung mit einem Halbleitersubstrat mit einem Diodenbereich und einem IGBT-Bereich sowie Verfahren zu dessen Herstellung
DE112014006030B4 (de) Herstellungsverfahren einer Halbleitereinrichtung des isolierten Gatetyps und Halbleitereinrichtung des isolierten Gatetyps
DE102007061191B4 (de) Halbleiterbauelement mit einem Halbleiterkörper
DE69735349T2 (de) Graben-dmos-transistor mit leichtdotierter wanne
DE112011101964B4 (de) Halbleitereinrichtung und Verfahren zum Herstellen der Halbleitereinrichtung
DE102009010174B4 (de) Verfahren zur Herstellung eines Halbleiterbauelements und Halbleiterbauelement
DE102011053147B4 (de) Halbleiterstruktur mit grabenstrukturen in direktem kontakt
DE102018116869A1 (de) Halbleitervorrichtung und Herstellungsverfahren dafür
DE112015001751B4 (de) Halbleitervorrichtung und Verfahren zur Herstellung der Halbleitervorrichtung
DE102008018865A1 (de) Halbleiterbauelement und Verfahren zu seiner Herstellung
DE102008051245A1 (de) Hochvolttransistor mit hoher Stromtragfähigkeit und Verfahren zur Herstellung
DE112015002028T5 (de) Halbleitervorrichtung und Verfahren zur Herstellung der Halbleitervorrichtung
DE102008000660A1 (de) Siliziumkarbid-Halbleitervorrichtung und Verfahren zu ihrer Herstellung
DE102019216309A1 (de) Siliciumcarbid-halbleitervorrichtung und verfahren zur herstellung einer siliciumcarbid-halbleitervorrichtung
DE112012005869B4 (de) IGBT und IGBT-Herstellungsverfahren
DE112012002823T5 (de) Bipolartransistor mit isoliertem Gate
DE102015109538B3 (de) Transistor mit verbessertem Lawinendurchbruchsverhalten und Verfahren zur Herstellung
DE102014104201A1 (de) Eine Siliziumkarbidvorrichtung und ein Verfahren zum Ausbilden einer Siliziumkarbidvorrichtung
DE102015110584A1 (de) Halbleiterstruktur mit Reduzierung des Übergangskriechstroms
DE1944793B2 (de) Verfahren zur herstellung einer integrierten halbleiteranordnung

Legal Events

Date Code Title Description
R012 Request for examination validly filed
R016 Response to examination communication
R018 Grant decision by examination section/examining division
R081 Change of applicant/patentee

Owner name: TOYOTA JIDOSHA KABUSHIKI KAISHA, TOYOTA-SHI, JP

Free format text: FORMER OWNERS: TOYOTA JIDOSHA KABUSHIKI KAISHA, TOYOTA-SHI, AICHI-KEN, JP; DENSO CORPORATION, KARIYA-SHI, AICHI-KEN, JP

R082 Change of representative

Representative=s name: KUHNEN & WACKER PATENT- UND RECHTSANWALTSBUERO, DE

R084 Declaration of willingness to licence
R020 Patent grant now final
R079 Amendment of ipc main class

Free format text: PREVIOUS MAIN CLASS: H01L0029060000

Ipc: H10D0062100000

R119 Application deemed withdrawn, or ip right lapsed, due to non-payment of renewal fee