CN1996584A - 半导体器件及其制造方法 - Google Patents

半导体器件及其制造方法 Download PDF

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Publication number
CN1996584A
CN1996584A CNA2006101562406A CN200610156240A CN1996584A CN 1996584 A CN1996584 A CN 1996584A CN A2006101562406 A CNA2006101562406 A CN A2006101562406A CN 200610156240 A CN200610156240 A CN 200610156240A CN 1996584 A CN1996584 A CN 1996584A
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China
Prior art keywords
lead
wire
semiconductor chip
bonding
substrate
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CNA2006101562406A
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Chinese (zh)
Inventor
岛贯好彦
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Renesas Technology Corp
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Renesas Technology Corp
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Publication of CN1996584A publication Critical patent/CN1996584A/zh
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    • H10P72/70—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping
    • H10P72/74—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support
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    • H10W74/111—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed
    • H10W74/114—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed by a substrate and the encapsulations
    • H10W74/117—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed by a substrate and the encapsulations the substrate having spherical bumps for external connection
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  • Wire Bonding (AREA)
  • Physics & Mathematics (AREA)
  • Geometry (AREA)
CNA2006101562406A 2006-01-06 2006-12-27 半导体器件及其制造方法 Pending CN1996584A (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2006001027 2006-01-06
JP2006001027A JP4881620B2 (ja) 2006-01-06 2006-01-06 半導体装置及びその製造方法

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CN1996584A true CN1996584A (zh) 2007-07-11

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US (4) US7889513B2 (enExample)
JP (1) JP4881620B2 (enExample)
KR (1) KR101286874B1 (enExample)
CN (1) CN1996584A (enExample)
TW (3) TWI531016B (enExample)

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CN103367337A (zh) * 2012-03-30 2013-10-23 富士通天株式会社 半导体装置以及半导体装置的制造方法
CN104143518A (zh) * 2013-05-10 2014-11-12 瑞萨电子株式会社 制造半导体器件的方法以及半导体器件
CN105990167A (zh) * 2014-09-16 2016-10-05 株式会社东芝 导线键合装置及半导体装置
US11417625B2 (en) 2017-02-22 2022-08-16 Murata Manufacturing Co., Ltd. Semiconductor device having an electrical connection between semiconductor chips established by wire bonding, and method for manufacturing the same

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JP4397408B2 (ja) * 2007-09-21 2010-01-13 株式会社新川 半導体装置及びワイヤボンディング方法
JP5205173B2 (ja) * 2008-08-08 2013-06-05 ルネサスエレクトロニクス株式会社 半導体装置及びその製造方法
TWM356216U (en) * 2008-12-12 2009-05-01 Kun Yuan Technology Co Ltd Memory chip packaging module
JP5411553B2 (ja) * 2009-03-31 2014-02-12 セミコンダクター・コンポーネンツ・インダストリーズ・リミテッド・ライアビリティ・カンパニー 半導体装置の製造方法
US8692370B2 (en) 2009-02-27 2014-04-08 Semiconductor Components Industries, Llc Semiconductor device with copper wire ball-bonded to electrode pad including buffer layer
US8384228B1 (en) * 2009-04-29 2013-02-26 Triquint Semiconductor, Inc. Package including wires contacting lead frame edge
KR101746614B1 (ko) 2011-01-07 2017-06-27 삼성전자 주식회사 발광소자 패키지 및 그 제조방법
JP5893266B2 (ja) * 2011-05-13 2016-03-23 ルネサスエレクトロニクス株式会社 半導体装置およびその製造方法
US10535812B2 (en) * 2017-09-04 2020-01-14 Rohm Co., Ltd. Semiconductor device
TWI767243B (zh) * 2020-05-29 2022-06-11 矽品精密工業股份有限公司 電子封裝件
JP2023082337A (ja) * 2021-12-02 2023-06-14 ローム株式会社 半導体装置
TWI810963B (zh) * 2022-06-07 2023-08-01 華東科技股份有限公司 增進打線接合承受力之晶片封裝結構
CN116884862B (zh) * 2023-09-07 2023-11-24 江苏长晶科技股份有限公司 一种基于3d打印的凸点制作方法及芯片封装结构
WO2025219055A1 (en) * 2024-04-19 2025-10-23 Ams-Osram International Gmbh Optoelectronic package and method for manufacturing an optoelectronic package

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US7889513B2 (en) 2011-02-15
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US20070158392A1 (en) 2007-07-12
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US10515934B2 (en) 2019-12-24
KR101286874B1 (ko) 2013-07-16
KR20070074489A (ko) 2007-07-12
JP4881620B2 (ja) 2012-02-22
TWI404148B (zh) 2013-08-01
TWI598971B (zh) 2017-09-11
US9991229B2 (en) 2018-06-05

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