JP4881620B2 - 半導体装置及びその製造方法 - Google Patents

半導体装置及びその製造方法 Download PDF

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Publication number
JP4881620B2
JP4881620B2 JP2006001027A JP2006001027A JP4881620B2 JP 4881620 B2 JP4881620 B2 JP 4881620B2 JP 2006001027 A JP2006001027 A JP 2006001027A JP 2006001027 A JP2006001027 A JP 2006001027A JP 4881620 B2 JP4881620 B2 JP 4881620B2
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Japan
Prior art keywords
semiconductor chip
main surface
wiring board
wires
wire
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP2006001027A
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English (en)
Japanese (ja)
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JP2007184385A (ja
JP2007184385A5 (enExample
Inventor
好彦 嶋貫
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Renesas Electronics Corp
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Renesas Electronics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Renesas Electronics Corp filed Critical Renesas Electronics Corp
Priority to JP2006001027A priority Critical patent/JP4881620B2/ja
Priority to US11/606,027 priority patent/US7889513B2/en
Priority to TW102125650A priority patent/TWI531016B/zh
Priority to TW095144886A priority patent/TWI404148B/zh
Priority to TW105106184A priority patent/TWI598971B/zh
Priority to CNA2006101562406A priority patent/CN1996584A/zh
Priority to KR1020070001430A priority patent/KR101286874B1/ko
Publication of JP2007184385A publication Critical patent/JP2007184385A/ja
Publication of JP2007184385A5 publication Critical patent/JP2007184385A5/ja
Priority to US12/985,815 priority patent/US20110159644A1/en
Application granted granted Critical
Publication of JP4881620B2 publication Critical patent/JP4881620B2/ja
Priority to US14/820,282 priority patent/US9991229B2/en
Priority to US15/990,750 priority patent/US10515934B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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    • H10P72/70—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping
    • H10P72/74—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support
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    • H10W70/62—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their interconnections
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    • H10W74/111—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed
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    • H10W74/111—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed
    • H10W74/114—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed by a substrate and the encapsulations
    • H10W74/117—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed by a substrate and the encapsulations the substrate having spherical bumps for external connection
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    • H10P72/7416—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support used during dicing or grinding
    • H10P72/7418—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support used during dicing or grinding of passive members, e.g. a chip mounting substrate
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    • H10W72/07504—Connecting or disconnecting of bond wires using an auxiliary member the auxiliary member being temporary, e.g. a sacrificial coating
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    • H10W72/07531—Techniques
    • H10W72/07532—Compression bonding, e.g. thermocompression bonding
    • H10W72/07533—Ultrasonic bonding, e.g. thermosonic bonding
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    • H10W72/5434—Dispositions of bond wires the connected ends being on auxiliary connecting means on bond pads, e.g. on other bond wires
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    • H10W72/5522—Materials of bond wires comprising metals or metalloids, e.g. silver comprising gold [Au]
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    • H10W72/5525—Materials of bond wires comprising metals or metalloids, e.g. silver comprising copper [Cu]
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  • Wire Bonding (AREA)
  • Physics & Mathematics (AREA)
  • Geometry (AREA)
JP2006001027A 2006-01-06 2006-01-06 半導体装置及びその製造方法 Expired - Lifetime JP4881620B2 (ja)

Priority Applications (10)

Application Number Priority Date Filing Date Title
JP2006001027A JP4881620B2 (ja) 2006-01-06 2006-01-06 半導体装置及びその製造方法
US11/606,027 US7889513B2 (en) 2006-01-06 2006-11-30 Semiconductor device
TW102125650A TWI531016B (zh) 2006-01-06 2006-12-04 Semiconductor device and manufacturing method thereof
TW095144886A TWI404148B (zh) 2006-01-06 2006-12-04 Semiconductor device and manufacturing method thereof
TW105106184A TWI598971B (zh) 2006-01-06 2006-12-04 Semiconductor device
CNA2006101562406A CN1996584A (zh) 2006-01-06 2006-12-27 半导体器件及其制造方法
KR1020070001430A KR101286874B1 (ko) 2006-01-06 2007-01-05 반도체 장치 및 그 제조 방법
US12/985,815 US20110159644A1 (en) 2006-01-06 2011-01-06 Semiconductor device and a method of manufacturing the same
US14/820,282 US9991229B2 (en) 2006-01-06 2015-08-06 Semiconductor device
US15/990,750 US10515934B2 (en) 2006-01-06 2018-05-28 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2006001027A JP4881620B2 (ja) 2006-01-06 2006-01-06 半導体装置及びその製造方法

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP2011170871A Division JP5266371B2 (ja) 2011-08-04 2011-08-04 半導体装置及びその製造方法

Publications (3)

Publication Number Publication Date
JP2007184385A JP2007184385A (ja) 2007-07-19
JP2007184385A5 JP2007184385A5 (enExample) 2009-02-19
JP4881620B2 true JP4881620B2 (ja) 2012-02-22

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Application Number Title Priority Date Filing Date
JP2006001027A Expired - Lifetime JP4881620B2 (ja) 2006-01-06 2006-01-06 半導体装置及びその製造方法

Country Status (5)

Country Link
US (4) US7889513B2 (enExample)
JP (1) JP4881620B2 (enExample)
KR (1) KR101286874B1 (enExample)
CN (1) CN1996584A (enExample)
TW (3) TWI531016B (enExample)

Families Citing this family (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4397408B2 (ja) * 2007-09-21 2010-01-13 株式会社新川 半導体装置及びワイヤボンディング方法
JP5205173B2 (ja) * 2008-08-08 2013-06-05 ルネサスエレクトロニクス株式会社 半導体装置及びその製造方法
TWM356216U (en) * 2008-12-12 2009-05-01 Kun Yuan Technology Co Ltd Memory chip packaging module
JP5411553B2 (ja) * 2009-03-31 2014-02-12 セミコンダクター・コンポーネンツ・インダストリーズ・リミテッド・ライアビリティ・カンパニー 半導体装置の製造方法
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US8384228B1 (en) * 2009-04-29 2013-02-26 Triquint Semiconductor, Inc. Package including wires contacting lead frame edge
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