CN1776911A - 半导体装置 - Google Patents

半导体装置 Download PDF

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Publication number
CN1776911A
CN1776911A CNA2005101254519A CN200510125451A CN1776911A CN 1776911 A CN1776911 A CN 1776911A CN A2005101254519 A CNA2005101254519 A CN A2005101254519A CN 200510125451 A CN200510125451 A CN 200510125451A CN 1776911 A CN1776911 A CN 1776911A
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CN
China
Prior art keywords
mos transistor
source
source electrode
semiconductor device
electrode
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CNA2005101254519A
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English (en)
Chinese (zh)
Inventor
柳田正道
万代忠男
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sanyo Electric Co Ltd
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Sanyo Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sanyo Electric Co Ltd filed Critical Sanyo Electric Co Ltd
Publication of CN1776911A publication Critical patent/CN1776911A/zh
Pending legal-status Critical Current

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/7801DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
    • H01L29/7816Lateral DMOS transistors, i.e. LDMOS transistors
    • H01L29/7825Lateral DMOS transistors, i.e. LDMOS transistors with trench gate electrode
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/0203Particular design considerations for integrated circuits
    • H01L27/0248Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection
    • H01L27/0251Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices
    • H01L27/0266Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices using field effect transistors as protective elements
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554External layer
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554External layer
    • H01L2224/0556Disposition
    • H01L2224/05568Disposition the whole external layer protruding from the surface
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554External layer
    • H01L2224/05573Single external layer
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/06Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
    • H01L2224/0601Structure
    • H01L2224/0603Bonding areas having different sizes, e.g. different heights or widths
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16245Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0684Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape, relative sizes or dispositions of the semiconductor regions or junctions between the regions
    • H01L29/0692Surface layout
    • H01L29/0696Surface layout of cellular field-effect devices, e.g. multicellular DMOS transistors or IGBTs
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/417Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions carrying the current to be rectified, amplified or switched
    • H01L29/41725Source or drain electrodes for field effect devices
    • H01L29/41758Source or drain electrodes for field effect devices for lateral devices with structured layout for source or drain region, i.e. the source or drain region having cellular, interdigitated or ring structure or being curved or angular
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/00014Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/13Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304Transistor
    • H01L2924/1306Field-effect transistor [FET]
    • H01L2924/13091Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Ceramic Engineering (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
CNA2005101254519A 2004-11-17 2005-11-17 半导体装置 Pending CN1776911A (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2004333225A JP2006147700A (ja) 2004-11-17 2004-11-17 半導体装置
JP333225/04 2004-11-17

Publications (1)

Publication Number Publication Date
CN1776911A true CN1776911A (zh) 2006-05-24

Family

ID=35880956

Family Applications (1)

Application Number Title Priority Date Filing Date
CNA2005101254519A Pending CN1776911A (zh) 2004-11-17 2005-11-17 半导体装置

Country Status (6)

Country Link
US (1) US20060118866A1 (ko)
EP (1) EP1659635A3 (ko)
JP (1) JP2006147700A (ko)
KR (1) KR100643831B1 (ko)
CN (1) CN1776911A (ko)
TW (1) TWI278114B (ko)

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103918084A (zh) * 2011-11-02 2014-07-09 株式会社电装 半导体装置
CN108122898A (zh) * 2016-11-29 2018-06-05 英飞凌科技奥地利有限公司 包括双向开关的半导体器件
CN108461447A (zh) * 2012-05-29 2018-08-28 瑞萨电子株式会社 半导体器件和半导体器件的制造方法
CN109564941A (zh) * 2016-08-02 2019-04-02 松下知识产权经营株式会社 半导体装置、半导体模块、以及半导体封装装置
CN109585557A (zh) * 2017-09-28 2019-04-05 瑞萨电子株式会社 半导体器件及其制造方法
CN112786591A (zh) * 2016-09-30 2021-05-11 罗姆股份有限公司 半导体器件
CN113035865A (zh) * 2018-06-19 2021-06-25 新唐科技日本株式会社 半导体装置
CN113690956A (zh) * 2021-07-09 2021-11-23 东莞新能安科技有限公司 一种开关电路、电池管理系统及电池包
CN116438662A (zh) * 2021-10-15 2023-07-14 新唐科技日本株式会社 半导体装置

Families Citing this family (11)

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JP5261636B2 (ja) * 2006-10-27 2013-08-14 セミコンダクター・コンポーネンツ・インダストリーズ・リミテッド・ライアビリティ・カンパニー 半導体装置
TW200945555A (en) * 2008-04-22 2009-11-01 Ptek Technology Co Ltd Chip with trench type power metal oxide semiconductor transistor and controller unit
US8269263B2 (en) * 2008-05-12 2012-09-18 Vishay-Siliconix High current density power field effect transistor
JP5532631B2 (ja) * 2009-03-02 2014-06-25 株式会社リコー 半導体装置、半導体装置の制御方法及び二次電池の保護回路
JP2012079992A (ja) 2010-10-05 2012-04-19 Elpida Memory Inc 半導体装置
CN104350602B (zh) * 2012-05-29 2017-03-15 三菱电机株式会社 绝缘栅型双极晶体管
JP6941502B2 (ja) * 2016-09-30 2021-09-29 ローム株式会社 半導体装置および半導体パッケージ
JP2019057534A (ja) 2017-09-19 2019-04-11 株式会社東芝 半導体装置及び制御システム
WO2020129786A1 (ja) * 2018-12-19 2020-06-25 パナソニックセミコンダクターソリューションズ株式会社 半導体装置
CN109698195B (zh) * 2018-12-28 2021-03-02 江南大学 一种小回滞双向瞬态电压抑制器及其应用
CN110824326A (zh) * 2019-11-15 2020-02-21 南京宏泰半导体科技有限公司 一种mosfet的测试方法

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JP4961658B2 (ja) * 2003-02-17 2012-06-27 富士電機株式会社 双方向素子および半導体装置
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JP3917144B2 (ja) * 2004-04-09 2007-05-23 株式会社東芝 半導体装置

Cited By (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103918084A (zh) * 2011-11-02 2014-07-09 株式会社电装 半导体装置
CN108461447A (zh) * 2012-05-29 2018-08-28 瑞萨电子株式会社 半导体器件和半导体器件的制造方法
CN109564941A (zh) * 2016-08-02 2019-04-02 松下知识产权经营株式会社 半导体装置、半导体模块、以及半导体封装装置
CN109564941B (zh) * 2016-08-02 2022-05-13 新唐科技日本株式会社 半导体装置、半导体模块、以及半导体封装装置
CN112271178A (zh) * 2016-08-02 2021-01-26 松下半导体解决方案株式会社 半导体装置以及半导体模块
CN112271178B (zh) * 2016-08-02 2022-05-13 新唐科技日本株式会社 半导体装置以及半导体模块
CN112786591B (zh) * 2016-09-30 2024-04-23 罗姆股份有限公司 半导体器件
CN112786591A (zh) * 2016-09-30 2021-05-11 罗姆股份有限公司 半导体器件
CN108122898B (zh) * 2016-11-29 2021-07-20 英飞凌科技奥地利有限公司 包括双向开关的半导体器件
US11923276B2 (en) 2016-11-29 2024-03-05 Infineon Technologies Austria Ag Semiconductor device including a bidirectional switch
US11217510B2 (en) 2016-11-29 2022-01-04 Infineon Technologies Austria Ag Semiconductor device including a bidirectional switch
US11605577B2 (en) 2016-11-29 2023-03-14 Infineon Technologies Austria Ag Semiconductor device including a bidirectional switch
CN108122898A (zh) * 2016-11-29 2018-06-05 英飞凌科技奥地利有限公司 包括双向开关的半导体器件
CN109585557A (zh) * 2017-09-28 2019-04-05 瑞萨电子株式会社 半导体器件及其制造方法
CN109585557B (zh) * 2017-09-28 2024-07-12 瑞萨电子株式会社 半导体器件及其制造方法
CN113035865B (zh) * 2018-06-19 2021-10-08 新唐科技日本株式会社 半导体装置
CN113035865A (zh) * 2018-06-19 2021-06-25 新唐科技日本株式会社 半导体装置
CN113690956A (zh) * 2021-07-09 2021-11-23 东莞新能安科技有限公司 一种开关电路、电池管理系统及电池包
CN116438662B (zh) * 2021-10-15 2023-09-29 新唐科技日本株式会社 半导体装置
CN116438662A (zh) * 2021-10-15 2023-07-14 新唐科技日本株式会社 半导体装置

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TW200618286A (en) 2006-06-01
JP2006147700A (ja) 2006-06-08
TWI278114B (en) 2007-04-01
EP1659635A3 (en) 2008-03-19
EP1659635A2 (en) 2006-05-24
US20060118866A1 (en) 2006-06-08
KR20060055338A (ko) 2006-05-23
KR100643831B1 (ko) 2006-11-10

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