CN1512513A - 高速高效地变更现场可编程门阵列功能的非易失存储装置 - Google Patents
高速高效地变更现场可编程门阵列功能的非易失存储装置 Download PDFInfo
- Publication number
- CN1512513A CN1512513A CNA031548822A CN03154882A CN1512513A CN 1512513 A CN1512513 A CN 1512513A CN A031548822 A CNA031548822 A CN A031548822A CN 03154882 A CN03154882 A CN 03154882A CN 1512513 A CN1512513 A CN 1512513A
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- China
- Prior art keywords
- data
- node
- circuit
- program
- memory device
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Classifications
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/02—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements
- G11C11/16—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C14/00—Digital stores characterised by arrangements of cells having volatile and non-volatile storage properties for back-up when the power is down
- G11C14/0054—Digital stores characterised by arrangements of cells having volatile and non-volatile storage properties for back-up when the power is down in which the volatile element is a SRAM cell
- G11C14/0081—Digital stores characterised by arrangements of cells having volatile and non-volatile storage properties for back-up when the power is down in which the volatile element is a SRAM cell and the nonvolatile element is a magnetic RAM [MRAM] element or ferromagnetic cell
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
- H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
- H03K19/177—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
- H03K19/17748—Structural details of configuration resources
- H03K19/17752—Structural details of configuration resources for hot reconfiguration
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
- H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
- H03K19/177—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
- H03K19/17748—Structural details of configuration resources
- H03K19/17756—Structural details of configuration resources for partial configuration or partial reconfiguration
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
- H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
- H03K19/177—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
- H03K19/17748—Structural details of configuration resources
- H03K19/1776—Structural details of configuration resources for memories
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
- H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
- H03K19/177—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
Landscapes
- Physics & Mathematics (AREA)
- Mathematical Physics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Computing Systems (AREA)
- General Engineering & Computer Science (AREA)
- Logic Circuits (AREA)
- Mram Or Spin Memory Techniques (AREA)
- Static Random-Access Memory (AREA)
- Design And Manufacture Of Integrated Circuits (AREA)
- Semiconductor Memories (AREA)
- Read Only Memory (AREA)
Abstract
Description
Claims (10)
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP377151/02 | 2002-12-26 | ||
JP2002377151A JP4294307B2 (ja) | 2002-12-26 | 2002-12-26 | 不揮発性記憶装置 |
JP377151/2002 | 2002-12-26 |
Publications (2)
Publication Number | Publication Date |
---|---|
CN1512513A true CN1512513A (zh) | 2004-07-14 |
CN100354976C CN100354976C (zh) | 2007-12-12 |
Family
ID=32652718
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CNB031548822A Expired - Fee Related CN100354976C (zh) | 2002-12-26 | 2003-08-19 | 高速高效地变更现场可编程门阵列功能的非易失存储装置 |
Country Status (3)
Country | Link |
---|---|
US (2) | US6992935B2 (zh) |
JP (1) | JP4294307B2 (zh) |
CN (1) | CN100354976C (zh) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN103824580A (zh) * | 2012-11-19 | 2014-05-28 | 三星电子株式会社 | 逻辑设备、包括逻辑设备的数字滤波器和该设备控制方法 |
Families Citing this family (20)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP4294307B2 (ja) * | 2002-12-26 | 2009-07-08 | 株式会社ルネサステクノロジ | 不揮発性記憶装置 |
US20050083743A1 (en) * | 2003-09-09 | 2005-04-21 | Integrated Magnetoelectronics Corporation A California Corporation | Nonvolatile sequential machines |
KR100835275B1 (ko) * | 2004-08-12 | 2008-06-05 | 삼성전자주식회사 | 스핀 주입 메카니즘을 사용하여 자기램 소자를 구동시키는방법들 |
US7369428B2 (en) | 2003-09-29 | 2008-05-06 | Samsung Electronics Co., Ltd. | Methods of operating a magnetic random access memory device and related devices and structures |
US7372722B2 (en) * | 2003-09-29 | 2008-05-13 | Samsung Electronics Co., Ltd. | Methods of operating magnetic random access memory devices including heat-generating structures |
KR100615089B1 (ko) * | 2004-07-14 | 2006-08-23 | 삼성전자주식회사 | 낮은 구동 전류를 갖는 자기 램 |
JP4770432B2 (ja) * | 2005-12-01 | 2011-09-14 | Tdk株式会社 | 磁気メモリデバイス |
US7728622B2 (en) * | 2007-03-29 | 2010-06-01 | Qualcomm Incorporated | Software programmable logic using spin transfer torque magnetoresistive random access memory |
US7911830B2 (en) | 2007-05-17 | 2011-03-22 | Integrated Magnetoelectronics | Scalable nonvolatile memory |
JP5201487B2 (ja) | 2007-12-06 | 2013-06-05 | 日本電気株式会社 | 不揮発性ラッチ回路 |
US8243502B2 (en) | 2007-12-14 | 2012-08-14 | Nec Corporation | Nonvolatile latch circuit and logic circuit using the same |
JP4516137B2 (ja) * | 2008-03-27 | 2010-08-04 | 株式会社東芝 | 半導体集積回路 |
WO2010150637A1 (ja) * | 2009-06-22 | 2010-12-29 | 日本電気株式会社 | 再構成可能な半導体デバイス |
KR101611416B1 (ko) | 2009-12-09 | 2016-04-12 | 삼성전자주식회사 | 비휘발성 논리 회로, 상기 비휘발성 논리 회로를 포함하는 집적 회로 및 상기 집적 회로의 동작 방법 |
KR101802945B1 (ko) * | 2011-06-27 | 2017-12-29 | 삼성전자주식회사 | 논리 장치 및 이를 포함하는 반도체 패키지 |
US8670266B2 (en) * | 2012-01-30 | 2014-03-11 | Qualcomm Incorporated | Non-volatile flip-flop |
US9147454B2 (en) * | 2013-01-14 | 2015-09-29 | Qualcomm Incorporated | Magnetic tunneling junction non-volatile register with feedback for robust read and write operations |
US9741923B2 (en) | 2015-09-25 | 2017-08-22 | Integrated Magnetoelectronics Corporation | SpinRAM |
CN111448613A (zh) * | 2017-12-12 | 2020-07-24 | 索尼半导体解决方案公司 | 半导体电路和半导体电路系统 |
EP3675126A1 (en) * | 2018-12-28 | 2020-07-01 | IMEC vzw | A circuit cell for a memory device or logic device |
Family Cites Families (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5784313A (en) * | 1995-08-18 | 1998-07-21 | Xilinx, Inc. | Programmable logic device including configuration data or user data memory slices |
US6269027B1 (en) | 1998-04-14 | 2001-07-31 | Honeywell, Inc. | Non-volatile storage latch |
US6317359B1 (en) | 1999-07-07 | 2001-11-13 | Iowa State University Research Foundation, Inc. | Non-volatile magnetic circuit |
US6542000B1 (en) * | 1999-07-30 | 2003-04-01 | Iowa State University Research Foundation, Inc. | Nonvolatile programmable logic devices |
JP2001298357A (ja) | 2000-04-13 | 2001-10-26 | Seiko Epson Corp | フィールド・プログラマブル・ゲートアレイ |
US6324093B1 (en) | 2000-09-15 | 2001-11-27 | Hewlett-Packard Company | Write-once thin-film memory |
TW584976B (en) * | 2000-11-09 | 2004-04-21 | Sanyo Electric Co | Magnetic memory device |
JP4667594B2 (ja) * | 2000-12-25 | 2011-04-13 | ルネサスエレクトロニクス株式会社 | 薄膜磁性体記憶装置 |
US6304477B1 (en) | 2001-01-31 | 2001-10-16 | Motorola, Inc. | Content addressable magnetic random access memory |
US6924663B2 (en) * | 2001-12-28 | 2005-08-02 | Fujitsu Limited | Programmable logic device with ferroelectric configuration memories |
JP4294307B2 (ja) * | 2002-12-26 | 2009-07-08 | 株式会社ルネサステクノロジ | 不揮発性記憶装置 |
-
2002
- 2002-12-26 JP JP2002377151A patent/JP4294307B2/ja not_active Expired - Fee Related
-
2003
- 2003-06-16 US US10/461,417 patent/US6992935B2/en not_active Expired - Lifetime
- 2003-08-19 CN CNB031548822A patent/CN100354976C/zh not_active Expired - Fee Related
-
2005
- 2005-09-15 US US11/226,235 patent/US20060007755A1/en not_active Abandoned
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN103824580A (zh) * | 2012-11-19 | 2014-05-28 | 三星电子株式会社 | 逻辑设备、包括逻辑设备的数字滤波器和该设备控制方法 |
US10051265B2 (en) | 2012-11-19 | 2018-08-14 | Samsung Electronics Co., Ltd. | Logic devices, digital filters and video codecs including logic devices, and methods of controlling logic devices |
CN103824580B (zh) * | 2012-11-19 | 2018-12-14 | 三星电子株式会社 | 逻辑设备、包括逻辑设备的数字滤波器和该设备控制方法 |
US10554994B2 (en) | 2012-11-19 | 2020-02-04 | Samsung Electronics Co., Ltd. | Logic devices, digital filters and video codecs including logic devices, and methods of controlling logic devices |
Also Published As
Publication number | Publication date |
---|---|
US20060007755A1 (en) | 2006-01-12 |
CN100354976C (zh) | 2007-12-12 |
US6992935B2 (en) | 2006-01-31 |
JP4294307B2 (ja) | 2009-07-08 |
JP2004206835A (ja) | 2004-07-22 |
US20040125660A1 (en) | 2004-07-01 |
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Owner name: RENESAS ELECTRONICS CORPORATION Free format text: FORMER OWNER: RENESAS TECHNOLOGY CORP. Effective date: 20101019 |
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Free format text: CORRECT: ADDRESS; FROM: TOKYO TO, JAPAN TO: KAWASAKI CITY, KANAGAWA PREFECTURE, JAPAN |
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TR01 | Transfer of patent right |
Effective date of registration: 20101019 Address after: Kawasaki, Kanagawa, Japan Patentee after: Renesas Electronics Corporation Address before: Tokyo, Japan, Japan Patentee before: Renesas Technology Corp. |
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Granted publication date: 20071212 Termination date: 20140819 |
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