CN1394359A - 电子元件的气密密封方法 - Google Patents
电子元件的气密密封方法 Download PDFInfo
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- NJPPVKZQTLUDBO-UHFFFAOYSA-N novaluron Chemical compound C1=C(Cl)C(OC(F)(F)C(OC(F)(F)F)F)=CC=C1NC(=O)NC(=O)C1=C(F)C=CC=C1F NJPPVKZQTLUDBO-UHFFFAOYSA-N 0.000 claims description 8
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- B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
- B23K35/00—Rods, electrodes, materials, or media, for use in soldering, welding, or cutting
- B23K35/22—Rods, electrodes, materials, or media, for use in soldering, welding, or cutting characterised by the composition or nature of the material
- B23K35/24—Selection of soldering or welding materials proper
- B23K35/30—Selection of soldering or welding materials proper with the principal constituent melting at less than 1550 degrees C
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Abstract
本发明提供了电子元件的气密密封方法,它包括用焊料将装有半导体元件的基座与封盖接合的步骤,其中使用含有78-79.5重量%的Au和其余为Sn的焊料作为所述的焊料进行接合。特别优选使用包含78-79重量%的Au和其余为Sn的焊料作为所述的焊料并且在封盖上镀金来进行接合。
Description
技术领域
本发明涉及以焊料将装有半导体元件的容器(基座)和封盖接合的电子元件的气密密封方法。特别涉及渗漏发生率能降低到不大于以前方法的1/10的气密密封方法。
背景技术
SAW滤波器、石英晶体振子等各种半导体元件处于本身状态时,恐怕会因空气中的氧气和湿气而使导电晶格和衬垫腐蚀和特性变差。因此,为了完全隔离半导体元件和外界空气,通常以气密密封在内部真空或填充He或N2的金属制或陶瓷制的容器(封装件)中的状态将半导体元件安装到电子仪器上。
这里,作为半导体元件的气密密封技术(hermetic seal技术),已知有焊料密封法、缝焊法、激光密封法等,根据制造的电子元件的规模、要求的气密性等分别使用这些方法。其中,焊料密封法是在装有半导体元件的基座上焊接封盖和盖住半导体元件而密封的方法。这种焊料密封法不像缝焊法,对容器材料和薄度没有特别的限制,而且不需要激光密封法所用的高价接合装置,所以它作为能用适当的成本实现高水平气密状态的方法而被广泛使用。
而且,对于需要上述密封状态的电子元件,不用说,要求内部的半导体元件和外界空气完全隔断和能够不担心发生渗漏地使用。在使用这种气密密封技术的电子元件的制造过程中,应测量制品的泄漏率,进行称为微量泄漏试验的实验,捕捉到不大于10-6大气压/厘米3·秒的极微量泄漏,并除去那些不符合标准的次品,保证电子元件的稳定性。
此外,即使用焊料密封法能以不大于0.2%的泄漏发生率(密封不良率)有效地制成需要高气密性的电子元件,但为降低电子元件的成本,希望进一步降低泄漏发生率。
另一方面,近年来不断要求电子仪器的小型化,因此需要安装在这些仪器上的电子元件也进一步小型化。但是,为了符合这些需要而使电子元件小型化,它们的气密密封变得困难。如果除此以外还要求降低密封不良率,可以说即使是焊料密封法,也要求气密不良发生率少的方法更为简易。
本发明是考虑了以上情况而完成的,其目的是提供一种电子元件的气密密封技术,它由焊料密封法以比以前方法更低的泄漏率有效地进行气密密封,它即使在符合今后电子元件小型化的需要时也不发生泄漏。
发明内容
本发明人为解决上述课题进行了认真研究,选择对以前的焊料密封法中使用的焊料进行了重新认识。因为如果仅改变焊料的材料,就能直接使用已有设备而无需增加新的设备了。
作为焊料密封法中所用的焊料材料,大多使用Sn-Pb基的焊料(Sn-37重量%Pb),有时使用Au-Sn基的焊料(Au-20重量%Sn)。在此,本发明人首先决定用Au-Sn基焊料作为焊料材料的基本组成。这是因为Pb是可能对人体有影响的元素,从对操作者的安全性和近来的环境保护观点考虑并不是好材料。
而且,本发明人认为,用Au-Sn基焊料(Au-20重量%Sn)作为焊料材料时,为了以比以前更高的稳定性进行密封,必须要改变它的组成。这是因为Au-20重量%Sn焊料的熔点较低,为280℃,虽然具有密封时对半导体元件的接合部位没有影响的优点,但在使用此种焊料时,有时会发生泄漏。
并且,本发明人对使用Au-20重量%Sn焊料时的接合部位进行了详细的考查,发现由这种焊料材料获得的接合部位基本虽然呈Au-Sn共晶组织,但部分生成Au浓度高的Au-Sn合金相(以下称为Au富集相)。由于这种Au富集相是一种金属间化合物,它质硬,熔点也比周围的Au-Sn共晶相更高,因此在封盖的接合温度下不会熔融而残留固相。此外,由于这样的Au富集相大小不同,即使将封盖通过均匀加压而接合到基座上,封盖或基座的接合面也会粘附大小不同的Au富集相,结果由于这种大小不同生成了焊料层薄的部位和焊料层厚的部位,从而使焊料层的厚度不均匀。
这种焊料层厚度的不均匀不是泄漏的直接原因。但是,在焊料层厚度的不均匀性显著的情况下,认为是由于因电子元件的长期使用而产生的焊料层劣化或由于在泄漏试验时在电子元件内外产生压差,使焊料层薄的部位产生泄漏。此外,如果要使今后的电子元件趋于小型化,所用的焊料量也要减少,认为因此Au富集相的影响会变大,在这种情况下,恐怕会形成接合不良的部位,生成即使在刚接合后也不能保持气密状态的接合部位。
在考虑到这种Au富集相的影响时,认为应将封盖的接合温度即焊料的加热温度升至Au富集相也可能熔融即焊料熔融并完全成为液相的高温。但是,使接合温度上升会对内部的半导体元件产生不良影响,因此很难说这是合适的方法。所以为了使接合温度在和以前相同的范围内且在熔融凝固过程中不生成Au富集相,有必要从根本上重新认识焊料组成,本发明人对此进行了研究,结果完成了本发明。
本发明提供了电子元件的气密密封方法,它包括用焊料将装有半导体元件的基座与封盖接合的步骤,其中使用含有78-79.5重量%的Au和其余为Sn的焊料作为所述的焊料进行接合。
本发明中,从以前所用的Au-Sn基焊料中略微改变了Au的含量,因此在凝固时的焊料组织能大部分成为Au-Sn共晶组织。结果,接合时焊料层中不生成Au富集相,并使焊料层能生成均匀的厚度。结果,长期使用或泄漏试验时不发生泄漏。从而比以前更能降低接合部位的泄漏率(次品率),并能有效地制造电子元件。
因此,本发明所用的焊料的Au含量限定在78-79.5重量%的狭窄范围内,因为如果Au的含量不小于79.5重量%,就会生成许多Au富集晶;如果不大于78重量%,会开始生成Sn富集晶并且它生成时会对接合部位产生不良影响。虽然即使是本发明的组成也会出现少量Sn富集晶,但这种Sn富集晶是细微的,因此如果少量存在不会使焊料层的厚度不均匀。
此外,焊料密封法中使用焊料的接合技术中,要增加焊料的湿润性以确保接合部位的接合强度。特别是在电子元件中所用的封盖的材质大多使用Kovar(54重量%Fe-29重量%Ni-17重量%Co合金的商品名),由于Kovar未被焊料所润湿,因此对Kovar制的封盖直接施用焊料而进行接合时,会产生接合不良和焊料剥离。所以,为了确保焊料的湿润性,并防止焊料中产生Au富集相而使焊料层的厚度均匀,优选像权利要求2那样在封盖上镀金和使用含有78-79重量%的Au和其余为Sn的焊料作为所述的焊料来进行接合。
在封盖上镀金而且所述的焊料组成比权利要求1中所述的范围窄是因为通过对封盖镀金,增加了封盖的湿润性,同时能抑制这样镀金引起的焊料中Au富集相的生成。也就是说,当对封盖进行镀金时,焊料和镀金层相互接触,且金扩散入焊料中,会使其中的金浓度增加,所以有时会形成Au富集相。因此,通过使焊料的Au含量在78.5-79重量%范围内,因此来自镀层的Au扩散入少量形成的Sn富集相中,使焊料的组织成为Au-Su共晶组织。
因此,根据权利要求2所述的发明,通过改进对封盖的湿润性,能确保接合强度,同时抑制Au富集相的生成,并能使焊料层的厚度均匀。
附图简述
图1所示的是本实施方式的IC封装件制造步骤的略图。
图2所示的是本实施方式制造的IC封装件的剖面图。
图3和图4分别显示了本实施例和比较例的接合部位的组织的SEM(扫描电镜)照片。
发明的实施方式
以下参照附图,说明本发明的实施方式。
实施例
将熔融铸造法制成的78.5重量%Au-21.5重量%Sn的铸块压延成片,然后通过冲孔加工制成方环状的焊料。接着,用此焊料将封盖接合到装有IC芯片的基座上,制成IC封装件。如图1所示,在上述加工后,装有IC1的陶瓷制基座2和预先镀Au的Kovar制封盖3之间夹有焊料4,将它们在传送式加热炉中加热到300℃,使焊料4熔化而接合,形成IC封装件5。此时接合后的IC封装件的剖面图示于图2。
比较例
和本实施方式不用,制造80重量%Au-20重量%Sn的钎焊材料,并制成IC封装件。这种钎焊材料的制造方法和加工方法以及IC封装件的制造方法和上述实施方式相同。
实施例1
(泄漏率的测定)
以上的实施方式和比较例制成的IC封装件进行作为细微泄漏试验的氦泄漏试验。比较和检查两者制造的IC封装件的泄漏率。氦泄漏试验的进行方式是:在氦探漏仪上放置制成的IC封装件,通过在IC封装件外部抽真空而使内部氦分子泄漏出来,计算漏出的氦分子。
结果,比较例的使用80重量%Au-20重量%Sn的钎焊材料的IC封装件的泄漏率(密封不良率)为0.2%。与此相对地,本实施方式制成的IC封装件的泄漏率为0.1%,确定它比比较例的气密密封方法更能改进泄漏率。
实施例2
(接合部位组织的观察)
然后,为了确认实施方式和比较例制成的IC封装件的接合部位(焊料层)的组织,对双方的接合部位用SEM(扫描电镜)进行观察。实施方式和比较例的接合部位的SEM照片示于图3和图4。从这些SEM照片,确认本实施方式的接合部位有细微的共晶组织。另一方面,确认比较例的接合部位存在粗大的Au富集相(图4中的白色部分)。由于这些Au富集相的大小不同,认为这是接合时焊料层的厚度稍有不均匀因此会产生泄漏。
工业实用性
通过以上说明,本发明能将电子元件气密密封而不会因接合后焊料层生成Au富集相而造成厚度不均匀。这能使电子元件的泄漏发生率比以前更低,并能高效地制造电子元件。因此,本发明符合今后的电子元件小型化的需要。
Claims (2)
1.电子元件的气密密封方法,它包括用焊料将装有半导体元件的基座与封盖接合的步骤,其中使用含有78-79.5重量%的Au和其余为Sn的焊料作为所述的焊料进行接合。
2.如权利要求1所述的电子元件的气密密封方法,其特征在于它在封盖上镀金并使用包含78-79重量%的Au和其余为Sn的焊料作为所述的焊料进行接合。
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EP (1) | EP1341229A4 (zh) |
JP (1) | JP2001176999A (zh) |
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CN107039355A (zh) * | 2015-10-29 | 2017-08-11 | 三菱电机株式会社 | 半导体装置 |
CN111448643A (zh) * | 2018-01-24 | 2020-07-24 | 三菱综合材料株式会社 | 半导体模块的接合层、半导体模块及其制造方法 |
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CN107039355A (zh) * | 2015-10-29 | 2017-08-11 | 三菱电机株式会社 | 半导体装置 |
CN111448643A (zh) * | 2018-01-24 | 2020-07-24 | 三菱综合材料株式会社 | 半导体模块的接合层、半导体模块及其制造方法 |
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TW508683B (en) | 2002-11-01 |
KR100501505B1 (ko) | 2005-07-18 |
WO2002043141A1 (fr) | 2002-05-30 |
EP1341229A1 (en) | 2003-09-03 |
JP2001176999A (ja) | 2001-06-29 |
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