EP1341229A1 - Method for hermetic sealing of electronic parts - Google Patents
Method for hermetic sealing of electronic parts Download PDFInfo
- Publication number
- EP1341229A1 EP1341229A1 EP01997845A EP01997845A EP1341229A1 EP 1341229 A1 EP1341229 A1 EP 1341229A1 EP 01997845 A EP01997845 A EP 01997845A EP 01997845 A EP01997845 A EP 01997845A EP 1341229 A1 EP1341229 A1 EP 1341229A1
- Authority
- EP
- European Patent Office
- Prior art keywords
- solder
- electronic parts
- bonding
- cap
- sealing
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
- 238000000034 method Methods 0.000 title claims abstract description 33
- 238000007789 sealing Methods 0.000 title claims abstract description 30
- 229910000679 solder Inorganic materials 0.000 claims abstract description 72
- 239000010931 gold Substances 0.000 claims abstract description 42
- 229910052737 gold Inorganic materials 0.000 claims abstract description 14
- 239000004065 semiconductor Substances 0.000 claims abstract description 12
- 239000000203 mixture Substances 0.000 claims abstract description 11
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 claims abstract description 10
- 238000007747 plating Methods 0.000 claims abstract description 5
- 239000012071 phase Substances 0.000 description 20
- 239000010410 layer Substances 0.000 description 15
- 239000000463 material Substances 0.000 description 12
- 229910015363 Au—Sn Inorganic materials 0.000 description 9
- 230000000052 comparative effect Effects 0.000 description 9
- 238000012360 testing method Methods 0.000 description 8
- 229910052718 tin Inorganic materials 0.000 description 8
- 239000013078 crystal Substances 0.000 description 6
- 230000002950 deficient Effects 0.000 description 6
- 230000000694 effects Effects 0.000 description 5
- 230000005496 eutectics Effects 0.000 description 5
- 239000001307 helium Substances 0.000 description 5
- 229910052734 helium Inorganic materials 0.000 description 5
- SWQJXJOGLNCZEY-UHFFFAOYSA-N helium atom Chemical compound [He] SWQJXJOGLNCZEY-UHFFFAOYSA-N 0.000 description 5
- 238000004519 manufacturing process Methods 0.000 description 5
- 238000005219 brazing Methods 0.000 description 4
- 229910000833 kovar Inorganic materials 0.000 description 4
- 230000015572 biosynthetic process Effects 0.000 description 3
- 230000008859 change Effects 0.000 description 3
- 238000002844 melting Methods 0.000 description 3
- 230000008018 melting Effects 0.000 description 3
- 230000002411 adverse Effects 0.000 description 2
- 239000000919 ceramic Substances 0.000 description 2
- 239000011247 coating layer Substances 0.000 description 2
- 238000007796 conventional method Methods 0.000 description 2
- 238000002474 experimental method Methods 0.000 description 2
- 238000011835 investigation Methods 0.000 description 2
- 230000008569 process Effects 0.000 description 2
- 238000012552 review Methods 0.000 description 2
- 238000007711 solidification Methods 0.000 description 2
- 230000008023 solidification Effects 0.000 description 2
- 238000003466 welding Methods 0.000 description 2
- 229910000531 Co alloy Inorganic materials 0.000 description 1
- 229910020816 Sn Pb Inorganic materials 0.000 description 1
- 229910020922 Sn-Pb Inorganic materials 0.000 description 1
- 229910008783 Sn—Pb Inorganic materials 0.000 description 1
- 229910000905 alloy phase Inorganic materials 0.000 description 1
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 1
- 230000008901 benefit Effects 0.000 description 1
- 238000005266 casting Methods 0.000 description 1
- 239000012611 container material Substances 0.000 description 1
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- 238000005516 engineering process Methods 0.000 description 1
- 230000007613 environmental effect Effects 0.000 description 1
- 238000004299 exfoliation Methods 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 229910000765 intermetallic Inorganic materials 0.000 description 1
- 229910052745 lead Inorganic materials 0.000 description 1
- 239000007791 liquid phase Substances 0.000 description 1
- 238000005259 measurement Methods 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 239000001301 oxygen Substances 0.000 description 1
- 229910052760 oxygen Inorganic materials 0.000 description 1
- 238000004080 punching Methods 0.000 description 1
- 230000009467 reduction Effects 0.000 description 1
- 238000005476 soldering Methods 0.000 description 1
Images
Classifications
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
- B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
- B23K35/00—Rods, electrodes, materials, or media, for use in soldering, welding, or cutting
- B23K35/22—Rods, electrodes, materials, or media, for use in soldering, welding, or cutting characterised by the composition or nature of the material
- B23K35/24—Selection of soldering or welding materials proper
- B23K35/30—Selection of soldering or welding materials proper with the principal constituent melting at less than 1550 degrees C
- B23K35/3013—Au as the principal constituent
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- H—ELECTRICITY
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
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- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/02—Containers; Seals
- H01L23/10—Containers; Seals characterised by the material or arrangement of seals between parts, e.g. between cap and base of the container or between leads and walls of the container
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
- B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
- B23K2101/00—Articles made by soldering, welding or cutting
- B23K2101/36—Electric or electronic devices
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- H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
- H01L2224/48465—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
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- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
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Definitions
- the present invention relates to a method of hermetically sealing electronic parts by which a container (base) having semiconductor devices placed thereon and a cap are bonded together via a solder. More particularly, it relates to a method of hermetic sealing that can reduce the leak rate to not more than one tenth of levels under conventional methods.
- solder sealing method As the hermetic sealing technology of semiconductor devices, the solder sealing method, seam welding method, laser sealing method, etc., are known, and these methods are appropriately used according to the scale of electronic parts to be manufactured, required sealing performance, etc.
- the solder sealing method involves soldering a cap to a base on which semiconductor devices are mounted, and sealing the semiconductor devices by covering them. Because it is unnecessary to limit container materials and their thickness unlike the seam welding method and because expensive bonding devices required by the laser sealing method are unnecessary, this solder sealing method has come into widespread use as a method that allows a high-level sealed state to be realized at appropriate cost.
- the invention was made in consideration of a situation as mentioned above, and it is the object of the invention to provide a hermetic sealing technique of electronic parts, which permits hermetic sealing by the solder sealing method at a lower leak rate and more efficiently than with conventional methods, and which does not cause leakage even in the trend toward smaller-size electronic parts in the future.
- the present inventors has made intensive investigations to solve the above-described problem and decided to review solder materials used in the conventional solder sealing method. This is because existing equipment can be used without a modification and addition of new equipment is unnecessary if a change is made only in the solder materials.
- solder materials used in the solder sealing method Sn-Pb-based solders (Sn-37 wt.% Pb) are mostly used and Au-Sn-based solders (Au-20 wt.% Sn) are sometimes used.
- the present inventors decided to use Au-Sn-based solders as the basic composition of solder materials. This is based on the conception that Pb, which is an element that presents a danger to the human body, is not a desirable material in view of the safety to workers and the standpoint of environmental conservation of the recent times.
- Au-Sn-based solders Au-20 wt. % Sn
- the inventors closely examined the bonded portions obtained by Au-20 wt.% Sn solders, and found out that the bonded portions obtained by the solder materials basically show an Au-Sn eutectic microstructure with a partial mixture of an Au-Sn alloy phase having a high concentration of Au (hereinafter referred to as an Au rich phase) . Because this Au rich phase is a kind of intermetallic compound and is hard, it has a higher melting point than the surrounding Au-Sn eutectic phase. At temperatures below the bonding temperature of a cap, therefore, this Au rich phase does not melt and remains as a hard phase.
- This nonuniformity of the solder layer is not a direct cause of leakage.
- the nonuniformity of the solder layer is remarkable, it might be thought that leakage occurs from portions of small solder layer thickness due to the deterioration of the solder layer resulting from use of electronic parts for a long time or due to a pressure difference that occurs in and outside electronic parts during a leak test.
- the amount of solder used also decreases and hence the effect of an Au rich phase becomes great. In this case, there is a fear that portions of defective bonding might be formed and that bonded portions whose air-tight state cannot be maintained even immediately after bonding might be formed.
- a method of hermetically sealing electronic parts that includes the step of bonding a base, on which semiconductor devices are mounted, and a cap together via a solder, in which this solder consists, by weight, of 78% or more but less than 79.5% Au, and the balance Sn.
- the Au content was slightly changed from those of conventionally used Au-Sn-based solders and by this slight change the microstructure of the solder during solidification can be almost converted to an Au-Sn eutectic structure.
- an Au rich phase is not formed in the solder layer during bonding and uniform thickness can be given to the solder layer.
- leakage does not occur during use for a long period or during a leak test.
- the content of Au of the solder to be used is limited to a narrow range of 78 wt.% or more but less than 79.5 wt.% is as follows.
- Au rich crystals are formed in large amounts when the Au content is not less than 79.5 wt.%, whereas Sn rich crystals begin to be formed when the Au content is less than 78 wt.% and, also in this case, the formation of Sn rich crystals has an adverse effect on bonded portions.
- Sn rich crystals are formed in small amounts. However, because the Sn rich crystals are fine, they do not make the solder layer thickness nonuniform if they are formed in small amounts.
- solder composition composed, by weight, of 78% or more but 79% or less Au, and the balance Sn, as the solder described in a second aspect of the present invention.
- the reason why the cap is plated with gold and why besides the solder composition is made narrower than the range described in Claim 1 is that the wettability of the cap is improved by plating the cap with gold and that, at the same time, the formation of an Au rich phase caused by this plating with gold is suppressed. That is, when the cap is plated with gold, the solder and the gold coating layer come into contact with each other and gold is diffused in the solder, resulting in an increase in the gold content of the solder. As a result, an Au rich phase may sometimes be formed.
- the Au coming from the coating layer is diffused into an Sn rich phase that is formed in a small amount due to this composition, whereby the microstructure of the solder is formed as an Au-Sn eutectic structure.
- the second aspect of the invention it is possible to ensure bonding strength by improving the wettability to the cap and, at the same time, it is possible to ensure a uniform solder layer thickness by suppressing the formation of an Au rich phase.
- Embodiment A 78.5 wt.% Au-21.5 wt.% Sn ingot obtained by a melting-casting process was rolled into a sheet and after that, a solder in square ring form was obtained through punching. This solder was employed to bond a cap to a base on which IC chips are mounted, whereby an IC package was produced.
- a base 2 made of ceramics, on which an IC 1 is mounted, and a cap 3 made of Kovar and previously plated with Au was sandwiched a solder 4 after the above-described working, and they were heated in a conveyor furnace to 300°C, whereby the solder 4 was melted and bonded to obtain an IC package 5.
- the section of the IC package after bonding is shown in Fig. 2.
- Comparative example In contrast to the embodiment, an 80 wt.%-Au-20 wt.% Sn brazing material was produced and an IC package was produced.
- the method of producing the brazing material, method of working the brazing material and method of producing the IC package were the same as in the above embodiment.
- Example of experiment 1 (measurement of leak rate) :
- the IC packages produced in the above-described embodiment and comparative example were subjected to a helium leak test, which is a fine leak test.
- the leak rates of the IC packages produced in the embodiment and comparative example were compared and examined.
- the helium leak test was conducted by applying the IC packages thus produced to a helium detector, causing the helium molecules in the interior to leak out through drawing a vacuum in the exterior of the IC packages, and counting the leaking helium molecules.
- the leak rate (fraction defective) was 0.2% in the IC package produced with the use of the 80 wt.%-Au-20 wt.% Sn brazing material of the comparative example.
- the leak rate of the IC package produced in the embodiment was 0.1% and it was confirmed that the leak rate is improved from that of the hermetic sealing method of comparative example.
- Example of experiment 2 observation of microstructures of bonded portions
- the two bonded portions were observed under an SEM.
- the SEM photographs of the bonded portions of embodiment and comparative example are shown in Fig.s 3 and 4, respectively. From these SEM photographs it was ascertained that the bonded portion of the embodiment has a fine eutectic structure.
- coarse Au rich phases the white parts in Fig. 4 are present in the bonded portion of the comparative example. Because these Au rich phases have different sizes, it might be thought that they make the solder layer thickness during bonding nonuniform, though slightly, thereby causing leakage.
- the present invention makes it possible to hermetically seal electronic parts without generating an Au rich phase that makes the solder layer thickness after bonding non-uniform. This enables the leak rate of electronic parts to be lowered from levels of conventional ones, making it possible to efficiently manufacture electronic parts. Further in the future, the invention is adaptable for the miniaturization of electronic parts.
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Mechanical Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Piezo-Electric Or Mechanical Vibrators, Or Delay Or Filter Circuits (AREA)
- Wire Bonding (AREA)
- Ceramic Products (AREA)
Abstract
There is provided a method of hermetically sealing
electronic parts, comprising the step of bonding a base
having semiconductor devices mounted thereon and a cap
together via a solder. The solder is composed, by weight,
of 78% or more but less than 79.5% Au, and the balance Sn.
It is particularly preferred that the bonding is performed
with the use of a solder composition composed, by weight,
of 78% or more but 79% or less Au, and the balance Sn as the
solder and furthermore through plating the cap with gold.
Description
- The present invention relates to a method of hermetically sealing electronic parts by which a container (base) having semiconductor devices placed thereon and a cap are bonded together via a solder. More particularly, it relates to a method of hermetic sealing that can reduce the leak rate to not more than one tenth of levels under conventional methods.
- In various semiconductor devices, such as SAW filters and quartz-crystal oscillators, if they are kept as they are, there is a fear that due to the oxygen and humidity in the air, their conductive patterns and pads might be corroded, resulting in poor properties. Therefore, in order to completely cut off these semiconductor devices from the outside air, usually they are mounted on eleotronic apparatus while being hermetically sealed in a metal or ceramic container (package), the interior of which is in a vacuum or is filled with He or N2.
- As the hermetic sealing technology of semiconductor devices, the solder sealing method, seam welding method, laser sealing method, etc., are known, and these methods are appropriately used according to the scale of electronic parts to be manufactured, required sealing performance, etc. Among others, the solder sealing method involves soldering a cap to a base on which semiconductor devices are mounted, and sealing the semiconductor devices by covering them. Because it is unnecessary to limit container materials and their thickness unlike the seam welding method and because expensive bonding devices required by the laser sealing method are unnecessary, this solder sealing method has come into widespread use as a method that allows a high-level sealed state to be realized at appropriate cost.
- Incidentally, for electronic parts for which the above-described sealed state is required, needless to say, it is necessary that the semiconductor devices in the interior be completely cut off from the outside air and be used without a fear of the generation of leakage. In the manufacturing processes of electronic parts by use of these hermetic sealing techniques, a test called the fine leak test is conducted in order to measure the leak rate of products. This test enables even very minutes leaks of not more than 10-6 atm/cc·sec to be captured and defective parts that do not meet this standard are rejected to guarantee the reliability of electronic parts.
- And even for electronic parts of which such a high sealing property is required, through the use of the solder sealing method it is possible to efficiently manufacture electronic parts at a leak rate (fraction defective) of not more than 0.2%. However, in order to further reduce the cost of electronic parts, it is desirable that this leak rate be capable of further reduced.
- On the other hand, due to the continuing requirement for smaller-size electronic apparatus of the recent years, it is required that electronic parts to be mounted on these electronic apparatus be also smaller in size. However, when the size of electronic parts is reduced to meet this requirement, the hermetically sealing the electronic parts becomes difficult. When the requirement for a reduction in the fraction defective is considered in addition to this requirement for small size design, it can be said that also for the solder sealing method, a method with a low rate of poor sealing is sought for more readily.
- The invention was made in consideration of a situation as mentioned above, and it is the object of the invention to provide a hermetic sealing technique of electronic parts, which permits hermetic sealing by the solder sealing method at a lower leak rate and more efficiently than with conventional methods, and which does not cause leakage even in the trend toward smaller-size electronic parts in the future.
- The present inventors has made intensive investigations to solve the above-described problem and decided to review solder materials used in the conventional solder sealing method. This is because existing equipment can be used without a modification and addition of new equipment is unnecessary if a change is made only in the solder materials.
- As the solder materials used in the solder sealing method, Sn-Pb-based solders (Sn-37 wt.% Pb) are mostly used and Au-Sn-based solders (Au-20 wt.% Sn) are sometimes used. The present inventors decided to use Au-Sn-based solders as the basic composition of solder materials. This is based on the conception that Pb, which is an element that presents a danger to the human body, is not a desirable material in view of the safety to workers and the standpoint of environmental conservation of the recent times.
- And the inventors considered that in using Au-Sn-based solders (Au-20 wt. % Sn) as solder materials, it is necessary to change their compositions in order to ensure higher-reliability sealing than before. This is because although Au-20 wt. % Sn solders have the advantage that they have no effect of sealing on the bonded portions of semiconductor devices, leakage may sometimes occur, though not frequently, because of their relatively low melting points of about 280°C.
- And the inventors closely examined the bonded portions obtained by Au-20 wt.% Sn solders, and found out that the bonded portions obtained by the solder materials basically show an Au-Sn eutectic microstructure with a partial mixture of an Au-Sn alloy phase having a high concentration of Au (hereinafter referred to as an Au rich phase) . Because this Au rich phase is a kind of intermetallic compound and is hard, it has a higher melting point than the surrounding Au-Sn eutectic phase. At temperatures below the bonding temperature of a cap, therefore, this Au rich phase does not melt and remains as a hard phase. And because of diverse sizes of this Au rich phase, even if a cap is bonded to a base under uniform pressure, Au rich phases of various sizes adhere to the bonded surfaces of the cap or base, with the result that areas of small solder layer thickness and those of large solder layer thickness are formed, leading to a nonuniform thickness of the solder layer.
- This nonuniformity of the solder layer is not a direct cause of leakage. However, when the nonuniformity of the solder layer is remarkable, it might be thought that leakage occurs from portions of small solder layer thickness due to the deterioration of the solder layer resulting from use of electronic parts for a long time or due to a pressure difference that occurs in and outside electronic parts during a leak test. Also, it might be thought that when the sizes of electronic parts are reduced in the future, the amount of solder used also decreases and hence the effect of an Au rich phase becomes great. In this case, there is a fear that portions of defective bonding might be formed and that bonded portions whose air-tight state cannot be maintained even immediately after bonding might be formed.
- When this effect of an Au rich phase is considered, it is also conceivable that a high temperature at which the Au rich phase can also be melted and at which the solder is a complete liquid phase is used as the bonding temperature of the cap, i.e., the heating temperature of the solder. However, raising the bonding temperature results in an adverse effect on the semiconductor devices in the interior and, therefore, it cannot be said that this is an appropriate means. Therefore, considering that a drastic review of solder compositions is necessary for preventing an Au rich phase from being formed in the melting and solidification processes while keeping the bolding temperature in the same range as before, the inventors conducted an investigation and, as a result, they reached the present invention.
- In the invention there is provided a method of hermetically sealing electronic parts that includes the step of bonding a base, on which semiconductor devices are mounted, and a cap together via a solder, in which this solder consists, by weight, of 78% or more but less than 79.5% Au, and the balance Sn.
- In the invention, the Au content was slightly changed from those of conventionally used Au-Sn-based solders and by this slight change the microstructure of the solder during solidification can be almost converted to an Au-Sn eutectic structure. As a result, an Au rich phase is not formed in the solder layer during bonding and uniform thickness can be given to the solder layer. As a result, leakage does not occur during use for a long period or during a leak test. As a result, it becomes possible to lower the leak ratio (fraction defective) of bonded portions from conventional levels and to efficiently manufacture electronic parts.
- The reason why in the invention the content of Au of the solder to be used is limited to a narrow range of 78 wt.% or more but less than 79.5 wt.% is as follows. Au rich crystals are formed in large amounts when the Au content is not less than 79.5 wt.%, whereas Sn rich crystals begin to be formed when the Au content is less than 78 wt.% and, also in this case, the formation of Sn rich crystals has an adverse effect on bonded portions. Also with the composition of the invention, Sn rich crystals are formed in small amounts. However, because the Sn rich crystals are fine, they do not make the solder layer thickness nonuniform if they are formed in small amounts.
- Incidentally, in bonding techniques using solders as in the solder sealing method, it is desirable to improve the wettability of solders in order to ensure the bonding strength of bonded members. In particular, as a material for caps used in electronic parts, Kovar (brand name of a 54 wt.% Fe-29 wt.% Ni-17 wt.% Co alloy) is often used. However, because Kovar is not wetted by solders, bonding defects and solder exfoliation might occur if bonding is performed by directly applying solders to a cap made of Kovar. Therefore, in order to ensure the wettability of solders and a uniform solder layer thickness by preventing the generation of an Au rich phase in solders, it is desirable to perform bonding by plating the cap with gold and by using a solder composition composed, by weight, of 78% or more but 79% or less Au, and the balance Sn, as the solder described in a second aspect of the present invention.
- The reason why the cap is plated with gold and why besides the solder composition is made narrower than the range described in
Claim 1 is that the wettability of the cap is improved by plating the cap with gold and that, at the same time, the formation of an Au rich phase caused by this plating with gold is suppressed. That is, when the cap is plated with gold, the solder and the gold coating layer come into contact with each other and gold is diffused in the solder, resulting in an increase in the gold content of the solder. As a result, an Au rich phase may sometimes be formed. For this reason, by using an Au content of solder in the range, by weight, of 78.5% or more and 79% or less, the Au coming from the coating layer is diffused into an Sn rich phase that is formed in a small amount due to this composition, whereby the microstructure of the solder is formed as an Au-Sn eutectic structure. - Therefore, according to the second aspect of the invention, it is possible to ensure bonding strength by improving the wettability to the cap and, at the same time, it is possible to ensure a uniform solder layer thickness by suppressing the formation of an Au rich phase.
-
- Fig. 1 is a schematic representation of the steps of an IC package fabrication process in this embodiment;
- Fig. 2 is a sectional view of an IC package fabricated in this embodiment;
- Fig. 3 shows a SEM photograph of the microstructure of a bonded portion in this embodiment; and
- Fig. 4 shows a SEM photograph of the microstructure of a bonded portion in a comparative example.
-
- The embodiment of the invention will be described below in connection with the drawings.
- Embodiment: A 78.5 wt.% Au-21.5 wt.% Sn ingot obtained by a melting-casting process was rolled into a sheet and after that, a solder in square ring form was obtained through punching. This solder was employed to bond a cap to a base on which IC chips are mounted, whereby an IC package was produced. As shown in Fig. 1, between a
base 2 made of ceramics, on which anIC 1 is mounted, and acap 3 made of Kovar and previously plated with Au was sandwiched asolder 4 after the above-described working, and they were heated in a conveyor furnace to 300°C, whereby thesolder 4 was melted and bonded to obtain anIC package 5. The section of the IC package after bonding is shown in Fig. 2. - Comparative example: In contrast to the embodiment, an 80 wt.%-Au-20 wt.% Sn brazing material was produced and an IC package was produced. The method of producing the brazing material, method of working the brazing material and method of producing the IC package were the same as in the above embodiment.
- Example of experiment 1 (measurement of leak rate) : The IC packages produced in the above-described embodiment and comparative example were subjected to a helium leak test, which is a fine leak test. The leak rates of the IC packages produced in the embodiment and comparative example were compared and examined. Incidentally, the helium leak test was conducted by applying the IC packages thus produced to a helium detector, causing the helium molecules in the interior to leak out through drawing a vacuum in the exterior of the IC packages, and counting the leaking helium molecules.
- As a result, the leak rate (fraction defective) was 0.2% in the IC package produced with the use of the 80 wt.%-Au-20 wt.% Sn brazing material of the comparative example. In contrast to this, the leak rate of the IC package produced in the embodiment was 0.1% and it was confirmed that the leak rate is improved from that of the hermetic sealing method of comparative example.
- Example of experiment 2 (observation of microstructures of bonded portions): Next, in order to investigate the microstructures (solder layers) of the IC packages produced in the embodiment and comparative example, the two bonded portions were observed under an SEM. The SEM photographs of the bonded portions of embodiment and comparative example are shown in Fig.s 3 and 4, respectively. From these SEM photographs it was ascertained that the bonded portion of the embodiment has a fine eutectic structure. On the other hand, it was ascertained that coarse Au rich phases (the white parts in Fig. 4) are present in the bonded portion of the comparative example. Because these Au rich phases have different sizes, it might be thought that they make the solder layer thickness during bonding nonuniform, though slightly, thereby causing leakage.
- As described above, the present invention makes it possible to hermetically seal electronic parts without generating an Au rich phase that makes the solder layer thickness after bonding non-uniform. This enables the leak rate of electronic parts to be lowered from levels of conventional ones, making it possible to efficiently manufacture electronic parts. Further in the future, the invention is adaptable for the miniaturization of electronic parts.
Claims (2)
- A method of hermetically sealing electronic parts, said method comprising the step of bonding a base having semiconductor devices mounted thereon and a cap together via a solder, wherein said bonding is performed with the use of said solder composition composed, by weight, of 78% or more but less than 79.5% Au, and the balance Sn.
- The method of hermetically sealing electronic parts according to Claim 1, wherein said bonding is performed through plating the cap with gold and with the use of said solder composition composed, by weight, of 78% or more but less than 79% Au, and the balance Sn.
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2000358744A JP2001176999A (en) | 2000-11-27 | 2000-11-27 | Method of sealing electronic component |
JP2000358744 | 2000-11-27 | ||
PCT/JP2001/010302 WO2002043141A1 (en) | 2000-11-27 | 2001-11-27 | Method for hermetic sealing of electronic parts |
Publications (2)
Publication Number | Publication Date |
---|---|
EP1341229A1 true EP1341229A1 (en) | 2003-09-03 |
EP1341229A4 EP1341229A4 (en) | 2005-08-24 |
Family
ID=18830592
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
EP01997845A Withdrawn EP1341229A4 (en) | 2000-11-27 | 2001-11-27 | Method for hermetic sealing of electronic parts |
Country Status (7)
Country | Link |
---|---|
US (1) | US6691911B2 (en) |
EP (1) | EP1341229A4 (en) |
JP (1) | JP2001176999A (en) |
KR (1) | KR100501505B1 (en) |
CN (1) | CN1394359A (en) |
TW (1) | TW508683B (en) |
WO (1) | WO2002043141A1 (en) |
Cited By (1)
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CN102267022A (en) * | 2011-07-27 | 2011-12-07 | 重庆群崴电子材料有限公司 | Lead-free tin-gold alloy solder for photoelectric packaging and method for manufacturing lead-free tin-gold alloy solder |
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US6820797B2 (en) * | 2002-11-27 | 2004-11-23 | Agilent Technologies, Inc. | System and method for seal formation |
JP4769469B2 (en) * | 2004-02-20 | 2011-09-07 | 田中貴金属工業株式会社 | Bonding method using Au-Sn brazing material |
EP1591191B1 (en) * | 2004-02-20 | 2008-04-02 | Tanaka Kikinzoku Kogyo K.K. | Joining method by Au-Sn brazing material, its thickness being i.a. dependent on the Sn-content |
JP4285753B2 (en) * | 2004-06-21 | 2009-06-24 | 田中貴金属工業株式会社 | Hermetic seal cover and method for manufacturing the same |
JP4560830B2 (en) * | 2004-06-28 | 2010-10-13 | 三菱マテリアル株式会社 | Au-Sn alloy powder for solder paste |
JP2007142054A (en) * | 2005-11-16 | 2007-06-07 | Sumitomo Metal Mining Co Ltd | Seal cover and its manufacturing method |
JP4826735B2 (en) | 2005-11-21 | 2011-11-30 | 三菱マテリアル株式会社 | Manufacturing method of Au-Sn alloy bump without incorporating large voids |
US7910945B2 (en) * | 2006-06-30 | 2011-03-22 | Cree, Inc. | Nickel tin bonding system with barrier layer for semiconductor wafers and devices |
US7855459B2 (en) * | 2006-09-22 | 2010-12-21 | Cree, Inc. | Modified gold-tin system with increased melting temperature for wafer bonding |
JPWO2008140033A1 (en) * | 2007-05-11 | 2010-08-05 | Tanakaホールディングス株式会社 | Lid or case for sealed package and manufacturing method thereof |
JP5145964B2 (en) * | 2008-01-18 | 2013-02-20 | 株式会社大真空 | Electronic component body housing member, electronic component, and method of manufacturing electronic component |
CN101819076B (en) * | 2010-04-21 | 2011-07-27 | 中国电子科技集团公司第二十四研究所 | Sn/Au eutectic based chip partial vacuum packaging method of resonance type pressure sensor |
JP5906811B2 (en) * | 2012-02-29 | 2016-04-20 | 沖電気工業株式会社 | Package and power amplifier |
JP6477421B2 (en) | 2015-10-29 | 2019-03-06 | 三菱電機株式会社 | Semiconductor device |
JP6915556B2 (en) * | 2018-01-24 | 2021-08-04 | 三菱マテリアル株式会社 | Bonding layer of semiconductor module, semiconductor module and its manufacturing method |
US10574025B2 (en) * | 2018-01-26 | 2020-02-25 | Lightwave Logic Inc. | Hermetic capsule and method for a monolithic photonic integrated circuit |
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- 2001-11-27 US US10/149,746 patent/US6691911B2/en not_active Expired - Lifetime
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Also Published As
Publication number | Publication date |
---|---|
TW508683B (en) | 2002-11-01 |
US6691911B2 (en) | 2004-02-17 |
JP2001176999A (en) | 2001-06-29 |
US20020190106A1 (en) | 2002-12-19 |
WO2002043141A1 (en) | 2002-05-30 |
KR20020063596A (en) | 2002-08-03 |
EP1341229A4 (en) | 2005-08-24 |
KR100501505B1 (en) | 2005-07-18 |
CN1394359A (en) | 2003-01-29 |
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