CN111448643A - 半导体模块的接合层、半导体模块及其制造方法 - Google Patents

半导体模块的接合层、半导体模块及其制造方法 Download PDF

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Publication number
CN111448643A
CN111448643A CN201980006292.0A CN201980006292A CN111448643A CN 111448643 A CN111448643 A CN 111448643A CN 201980006292 A CN201980006292 A CN 201980006292A CN 111448643 A CN111448643 A CN 111448643A
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electronic component
substrate
bonding layer
semiconductor module
bonding
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CN201980006292.0A
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岩田广太郎
樋上晃裕
村冈弘树
山口朋彦
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Mitsubishi Materials Corp
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Mitsubishi Materials Corp
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Publication of CN111448643A publication Critical patent/CN111448643A/zh
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    • H01L23/373—Cooling facilitated by selection of materials for the device or materials for thermal expansion adaptation, e.g. carbon
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Abstract

本发明的半导体模块(10)的接合层(13)夹在电子组件(14)与基板(15)之间，且由CuSn金属间化合物构成。构成为从该接合层(13)的中心部(13a)往电子组件(14)的端部(14a，14b)的接合部(13b，13c)，Sn的组成比例增加。通过如下方法制造半导体模块(10)：使含有Cu核Sn壳粉末的膏体夹在电子组件(14)与基板(15)之间，以该夹在电子组件与基板之间的状态，在不活泼气氛或还原性气氛下，对电子组件(14)和/或基板(15)施加1MPa～30MPa的压力，并且以250℃～350℃的温度加热1分钟～10分钟，以将电子组件(14)接合于基板(15)。

Description

半导体模块的接合层、半导体模块及其制造方法
技术领域
本发明涉及一种夹在半导体芯片元件、LED芯片元件等的电子组件与基板之间的半导体模块的接合层。而且，涉及使用该接合层的半导体模块及其制造方法。并且，本国际申请主张基于在2018年1月24日申请的日本专利申请第2018-009471号(专利申请2018-009471)的优先权，将专利申请2018-009471的全部内容援用于本国际申请中。
背景技术
近年来，即使在超过200℃的高温下也操作的如SiC般的宽带隙半导体受到关注。作为在高温下操作的半导体芯片元件的接合方法，有如下称作过渡液相烧结法(TransientLiquid Phase Sintering：TLP法)的接合方法受到关注：该过渡液相烧结法使包含Cu和Sn的接合材夹在半导体芯片元件与基板之间，以比Sn的熔点高的温度进行加热，将所述接合材设为包含Cu6Sn5或Cu3Sn的组成的金属间化合物(Inter-Metallic Compound：IMC)。公开有使用通过该接合方法形成的连接层或接合剂的半导体模块的制造方法(例如，参考专利文献1及2)。
在专利文献1的半导体模块的制造方法中，以规定压力互相加压并贴合两个含Cu焊接母材和被配置在这两个含Cu焊接母材之间的含Sn焊料层，并且使这些焊料熔融，在经过规定时间之后，从该液状的焊料扩散的Cu及Sn形成包含金属间化合物CuSn相的连接层。即，在该制造方法中，将表面施予Cu金属化的接合母材彼此用含Sn焊料层夹住而形成接合层。根据该制造方法，能够改善功率半导体模块对伴随在操作中产生的高温变动的频繁温度变化的耐性(以下，称为高温耐性)。
专利文献2的半导体模块的制造方法具有如下工序：在半导体芯片元件或基板的接合面，涂布包含Cu粒子和Sn粒子的接合剂；使接合剂夹在半导体芯片元件的接合面与基板的接合面并进行贴合；以比Sn的熔点高的温度进行加热，使接合剂的Cu和Sn进行过渡性液相烧结，以使该接合剂成为包含Cu6Sn5和Cu3Sn的组成；进一步加热而使接合剂的Cu6Sn5变化成Cu3Sn，从而增加接合剂中的Cu3Sn的比率。即，在该制造方法中，混合粉末状的Cu和粉末状的Sn，在该混合物中添加溶剂或助焊剂制成膏体化，并将该膏体印刷在半导体芯片元件的电极和基板的电极。根据该制造方法，能够解决如下问题：在高温下操作的半导体芯片元件的接合中采用使用现有的焊料的方法的情况下，由于在高温下的操作时焊料的再熔融或在界面形成金属间化合物(IMC)等，使得半导体芯片元件的性能劣化。
专利文献1：日本特开2012-74726号公报(摘要)
专利文献2：日本特开2014-199852号公报(权利要求1、说明书第[0005]段、第[0006]段)。
关于记载于专利文献1的连接层或记载于专利文献2的接合剂(以下，称为接合层)，接合层的组成均以金属间化合物Cu6Sn5相或Cu3Sn从搭载于基板的半导体芯片元件的接合面的一侧的端部至另一侧的端部均匀地形成。这样的CuSn金属间化合物层虽然强度高，但是由于以脆性材料制作，因此，在半导体模块重复开启关闭操作而使得半导体芯片元件和/或基板反复发热和冷却的情况下，如图5所示，在半导体模块1中，夹着由CuSn金属间化合物层构成的接合层3而被接合的半导体芯片元件4及基板5，无法充分地缓和因两者的热膨胀差而产生的对接合层的应力，从接合层3的端部起在水平方向上产生裂纹C。该裂纹C可能成为使从半导体芯片元件4产生的热散热至基板5时的热阻因素。有时会有该裂纹C扩展而产生半导体芯片元件4的剥离的情况，即，使电子组件受损的情况。
发明内容
本发明的目的在于解决上述课题，提供一种半导体模块的接合层，该半导体模块的接合层在接合时与电子组件及基板的密合性优异，接合强度高，即使在接合后曝露于高温气氛也不会再熔融，另外不会因在电子组件和/或基板反复发热和冷却时产生的裂纹而使电子组件受损。本发明的另外的目的在于提供即使半导体模块重复开启关闭操作也不会使电子组件受损的半导体模块及其制造方法。
本发明的第1观点为一种半导体模块10的接合层13，如图3所示，其夹在电子组件14与基板15之间，通过CuSn金属间化合物构成，其特征在于，构成为从接合层13的中心部13a往电子组件14的端部14a、14b的接合部13b、13c，Sn的组成比例增加。
本发明的第2观点是根据第1观点的发明的半导体模块10的接合层13，其中，在接合层13的中心部13a中的Sn的组成比例为20质量％～50质量％，Cu的组成比例为其剩余部分，在电子组件14的端部14a、14b的接合部13b、13c中的Sn的组成比例为60质量％～80质量％，Cu的组成比例为其剩余部分。
本发明的第3观点是根据第1或第2观点的发明，其中，接合层13的厚度为10μm～200μm。
本发明的第4观点为一种半导体模块10，其中，第1至第3观点中的任一观点的接合层13夹在电子组件14与基板15之间。
本发明的第5观点是一种半导体模块10的制造方法，其通过如下方法制造半导体模块10：使含有Cu核Sn壳粉末11的膏体12a夹在电子组件14与基板15之间，以该夹在电子组件与基板之间的状态，在不活泼气氛或还原性气氛下，对电子组件14和/或基板15施加1MPa～30MPa的压力，并且以250℃～350℃的温度加热1分钟～10分钟，以将电子组件14接合于基板15。
本发明的第6观点是根据第5观点的发明的半导体模块10的制造方法，其中，Cu核Sn壳粉末11中，Sn的组成比例为40质量％～60质量％，Cu的组成比例为其剩余部分。
如图3所示，本发明的第1观点的接合层13由于构成为从其中心部13a往电子组件14的端部14a、14b的接合部13b、13c，Sn的组成比例增加(参考图3的放大图)，因此，中心部13a成为Cu组成多的CuSn金属间化合物，接合部13b、13c成为Sn组成多的CuSn金属间化合物。由此，接合层13的中心部13a的高温耐性强，且散热性优异。并且，接合部13b、13c的脆性相较于现有的接合部减少，即使半导体模块10重复开启关闭操作使得电子组件14和/或基板15反复发热和冷却而对接合层13施加冷热冲击，在制造时被施加比较大的应力的电子组件14的端部14a、14b也伸长收缩。而且，如图4所示，即使因电子组件14及基板15的热膨胀差而从接合部13的端部13b、13c起在水平方向上产生裂纹C，也能够缓和对接合部13b、13c的应力，使裂纹C难以扩展。其结果，能够使从半导体芯片元件14发生的热流畅地散热至基板15而防止电子组件的损伤。
在本发明的第2观点的接合层13中，由于如图3的放大图所示，在接合层13的中心部13a中的Sn的组成比例为20质量％～50质量％，Cu的组成比例为其剩余部分，在电子组件14的端部14a、14b的接合部13b、13c中的Sn的组成比例为60质量％～80质量％，Cu的组成比例为其剩余部分，因此，除了具有与电子组件及基板的高密合性、高接合强度及高温耐性以外，接合层13的接合部13a、13b的脆性更确实地减少，即使对接合层13施加冷热冲击，从而如图4所示，从接合部13的端部13b、13c起在水平方向上产生裂纹C，也能够缓和对接合部13b、13c的应力，裂纹C更难以扩展。
在本发明的第3观点的接合层13中，其厚度为10μm～200μm，因此，除了具有高接合强度且不会再熔融的特长以外，对冷热冲击的耐久性更高。
本发明的第4观点的半导体模块10中，由CuSn金属间化合物构成的接合层13具备第1至第3观点的特征，因此，即使半导体模块10重复开启关闭操作而从接合部13的端部13b、13c起在水平方向上产生裂纹C，也能够缓和对接合部13b、13c的应力，裂纹C难以扩展。其结果，能够使从半导体芯片元件14产生的热顺畅地散热至基板15而防止电子组件的损伤。
在本发明的第5观点的半导体模块10的制造方法中，如图1所示，使含有Cu核Sn壳粉末11的膏体12a夹在电子组件14与基板15之间，如图2所示，以该夹在电子组件与基板之间的状态，在不活泼气氛或还原性气氛下，对电子组件14和/或基板15施加1MPa～30MPa的压力并且以250℃～350℃的温度加热1分钟～10分钟。由此，如在图1的放大图及图2的放大图中分别所示，通过加热，构成壳的熔点232℃的Sn熔融，壳结构崩塌使得相邻的粉末的Sn彼此成为一体而成为液状。另外，构成膏体中的Cu核Sn壳粉末11的核的熔点1085℃的Cu不会熔融，通过与上述液状的Sn的一部分扩散反应，开始形成CuSn金属间化合物。通过加压，液状的Sn从电子组件14的下面中心部朝端部14a及14b移动，成为在电子组件14的下面中心部未熔融的Cu(图中，以实线的圆形表示，以下相同)和仅形成少量的CuSn金属间化合物停留在热压前的状态的接合层前体12b。进行规定时间的热压成型后，若在加压状态下进行冷却，则如图3所示，电子组件14与基板15之间的接合层前体12b成为其中心部包含Cu及CuSn金属间化合物且其两端部包含Sn及CuSn金属化合物的接合层13(图中，熔融的Cu以虚线的圆形表示)。由此，电子组件14通过接合层13接合于基板15，接合层13成为从其接合层13的中心部13a往电子组件14的端部14a、14b的接合部13b、13c而Sn的组成比例增加的CuSn金属间化合物(参考图3的放大图)。
在本发明的第6观点中，Cu核Sn壳粉末11中的Sn的组成比例为规定比例，因此，容易将在接合层13的中心部13a中的Sn的组成比例设为20质量％～50质量％，将在接合部13b、13c中的Sn的组成比例设为60质量％～80质量％。
附图说明
图1是在本实施方式的半导体模块的制造工序中使含有Cu核Sn壳粉末的膏体夹在电子组件与基板之间的图。
图2是在本实施方式的半导体模块的制造工序中对电子组件和/或基板进行热压成型的图。
图3是在本实施方式的半导体模块的制造工序中将对电子组件和/或基板进行热压成型之后的电子组件接合于基板的状态的图。
图4是在本实施方式的半导体模块的接合层产生裂纹时的示意图。
图5是在现有的半导体模块的接合层产生裂纹时的示意图。
具体实施方式
以下，根据附图对用以实施本发明的方式进行说明。
[半导体模块的制造方法]
＜Cu核Sn壳粉末＞
如图1的放大图所示，本实施方式的Cu核Sn壳粉末11中，核(中心核)11a包含Cu或Cu和Sn的金属间化合部，壳(外壳)11b包含Sn。因此，具有若以250℃～350℃的温度进行加热，则壳的Sn熔融，但核的Cu不熔融的特征。
该Cu核Sn壳粉末优选平均粒径为1μm～10μm。在小于1μm的情况下，粉末容易凝聚，难以膏体化，且Sn壳的厚度变薄，因此，由于接合时的Cu/Sn的扩散而Sn液相不足，因此有成为稀疏的接合组织的不良状况。当超过10μm时，Sn壳的厚度变厚，因此，由于接合时的Cu/Sn的扩散而生成CuSn金属间化合物需要时间。并且，存在粉末间的填充不足且成为稀疏的接合组织的不良状况。该平均粒径是由使用激光衍射散射法的粒度分布测定装置(HORIBA,Ltd.制，激光衍射/散射式粒子径分布测定装置LA-950)测定的体积累积中位径(Median直径，D50)。
并且，该Cu核Sn壳粉末优选为Sn的组成比例为40质量％～60质量％，Cu的组成比例为其剩余部分。更优选Sn的组成比例为45质量％～55质量％。在Sn的组成比例小于40质量％的情况下，后述的与电子组件及基板的密合性及接合性不够强，在电子组件和/或基板的热压成型时熔融的Sn的量少，电子组件的端部的接合层的Sn的组成比例难以增加。当Sn的组成比例超过60质量％时，在进行热压成型后残留的Sn变多，耐热性差。
对本实施方式的Cu核Sn壳粉末的制造方法进行说明。首先，通过分别添加并混合含Cu的化合物、含Sn化合物和分散剂，制备溶解液，该含Cu的化合物例如为氯化铜(II)、硫酸铜(II)或醋酸铜或者Cu粉末，该含Sn化合物例如为氯化锡(II)、硫酸锡(II)、醋酸锡(II)或草酸锡(II)。关于在溶解液中的含锡的化合物及含铜的化合物的比例，在Cu核Sn壳粉末的制造后，调整成Sn及Cu的组成比例成为上述范围。
作为溶剂，可举出水、醇、醚、酮、酯等。并且，作为分散剂，可举出纤维素类、乙烯基类、多元醇等，除此之外能够使用明胶、酪蛋白等。所制备的溶解液调整成pH为0～2.0的范围。考虑所生成的焊接粉末的再熔解等，pH优选调整至0～2.0的范围。
接着，制备熔解了还原剂而成的水溶液，将该水溶液的pH调整成与上述所制备的溶解液相同的程度。作为还原剂，可举出四氢硼酸钠、二甲胺硼烷等硼氢化物、肼等氮化合物、三价钛离子或二价铬离子等金属离子等。
接着，通过在上述溶解液添加并混合还原剂水溶液，溶解液中的Sn离子及Cu离子被还原，获得Sn粉末及Cu粉末分散在液中的分散液。在该还原反应中，使用上述含Cu的化合物及含Sn的化合物溶解的溶解液的情况下，首先，比Sn贵重的Cu被还原，最后Sn被还原。由此，形成由包含Cu的核(中心核)和包含覆盖该核的Sn的壳(外壳)构成的Cu核Sn壳粉末的前体。
而且，接着将该分散液通过倾析法等进行固液分离，以水或将pH调整成0.5～2的盐酸水溶液、硝酸水溶液、硫酸水溶液或甲醇、乙醇、丙酮等清洗所回收的固形物。清洗后，再次进行固液分离而回收固形物。优选重复2次～5次从清洗至固液分离为止的工序。由此，可获得Cu核Sn壳粉末。
＜膏体＞
将所获得的Cu核Sn壳粉末以规定比例与接合用助焊剂混合而制成膏体。用于该膏体的制备的接合用助焊剂并无特别限定，能够使用混合公知的通用溶剂、松香、触变剂及活性剂等各成分而制备的助焊剂。另外，本实施方式的膏体不含如专利文献2所示的Cu粉末和Sn粉末混合于助焊剂而制备的膏体。
＜使膏体夹在电子组件与基板之间＞
接着，如图1所示，使所获得的膏体12a夹在本实施方式的半导体芯片元件、LED芯片元件等的电子组件14与基板15之间。例如，使开口有用于安装电子组件的部分的金属遮罩与水平放置的基板重叠，在金属遮罩上配置膏体，使用刮板使膏体流入金属遮罩的开口部之后，在维持金属遮罩的状态下使基板下降，由此，使膏体残留在基板的相当于上述开口部的位置。接着，通过使电子组件载置于该膏体，使获得的膏体夹在电子组件与基板之间。通过使金属遮罩的厚度成为20μm～300μm，能够使后述的接合层的厚度成为10μm～200μm。
＜热压成型＞
接着，在使电子组件14载置于膏体12a的状态，即，使膏体12a夹在电子组件14与基板15之间的状态下，如图2所示，通过无图示的下压力机和上压力机，在不活泼气氛或还原性气氛下，进行热压成型。关于热压成型条件，对电子组件和/或基板施加1MPa～30MPa的压力，同时施加1分钟～100分钟250℃～350℃的温度。通过该加热，如图2的放大图所示，膏体中的Cu核Sn壳粉末11的壳11b的Sn熔融，壳结构崩塌，相邻的粉末的Sn彼此成为一体而成为液状。通过加压，成为液状的Sn从电子组件14的下面中心部移动至端部14a及14b，成为在电子组件14的下面中心部未熔融的Cu停留在热压前的状态的接合层前体12b。
为了防止所获得的接合层的氧化，在真空气体、氮气、氩气或氮和氩的混合气体等不活泼气氛或氮和氢的混合气体或者甲酸气体等还原性气氛下进行该热压成型。在压力小于1Mpa的情况下，将加压所致的液状化的Sn向电子组件14的端部14a、14b的接合部13b、13c挤压的挤压力不足，不会引起在接合部13b、14b增加Sn组成。当压力超过30MPa时，电子组件受损。优选的压力为2MPa～20MPa，更优选的压力为5MPa～15MPa。并且，通过以规定压力进行加压，能够使膏体的厚度和后述的接合层的厚度成为10μm～200μm。
在进行热压成型时的温度低于250℃的情况下，Cu核Sn壳粉末的壳的Sn熔融不足，与电子组件和基板的密合性及接合性差。当超过350℃时，冷却接合层前体12b时接合层前体12b的热应力所致的变形增大，并且对半导体模块的热性负荷增大。优选的温度为280℃～320℃。
在进行热压成型时的时间少于1分钟的情况下，Cu核Sn壳粉末的Sn和/或Cu的相互扩散所致的CuSn金属间化核物的生成不足，接合层的高温耐性差。将加热时间的上限值设为10分钟是因为上述CuSn金属间化合物的生成几乎在10分钟内结束，因此，加热时间超过10分钟为浪费热能，并且生产率下降。优选的时间为3分钟～5分钟。
[半导体模块]
进行规定时间的热压成型后，在加压状态下进行冷却，则如图3所示，获得通过包含CuSn金属间化合物的接合层13而电子组件14与基板15接合的半导体模块30。即，在冷却后，电子组件14与基板15之间的接合层前体12b完全成为CuSn金属间化合物的接合层13。由此，电子组件14通过接合层13接合于基板15，接合层13成为从其接合层13的中心部13a往电子组件14的端部14a、14b的接合部13b、13c而Sn的组成比例增加的CuSn金属间化合物。
接合层13由熔点高的金属间化合物Cu3Sn(凝固开始温度为676℃)或Cu6Sn5(凝固开始温度为415℃)的CuSn金属间化合物而构成，因此，对电子组件14及基板15的接合强度高，即使在接合后曝露于高温气氛，或在接合后曝露于高温气氛，也不会再熔融，高温耐性优异。
接合层13优选为如下半导体模块10的接合层13：在其中心部13a中的Sn的组成比例为20质量％～50质量％，优选为30质量％～40质量％，Cu的组成比例为其剩余部分，在电子组件14的端部14a、14b的接合部13b、13c中的Sn的组成比例为60质量％～80质量％，优选为60质量％～70质量％，Cu的组成比例为其剩余部分。
关于在接合层13的中心部13a中的Sn的组成比例，在小于20质量％的情况下，在接合层13的中心部13a，与电子组件14及基板15的密合性及接合性容易下降。并且，当超过50质量％时，导热性不好的Cu6Sn5的比例变多，散热性容易变差。
关于在电子组件14的端部14a、14b的接合部13b、13c中的Sn的组成比例，在小于60质量％的情况下，观察不到接合层13的接合部13b、13c的脆性下降，在对接合部13b、13c施加冷热冲击时，难以发现应力缓和。并且，当超过80质量％时，Sn相即使在接合后仍残留多量，高温耐性容易下降。
接合层13的厚度为10μm～200μm，优选为20μm～100μm。如前述，通过图1所示的膏体11的厚度及进行热压成型时的加压力来调整该厚度。在该厚度小于10μm的情况下，接合层13与电子组件14及基板15的密合性及接合性容易下降。当超过200μm时，接合层13的热阻增大，接合层的散热特性容易下降。
本实施方式的半导体模块10中，接合层13包含具有以凝固开始温度415℃的Cu6Sn5和/或凝固开始温度676℃的Cu3Sn为代表的高凝固开始温度的CuSn金属间化合物。由此，接合层13的耐热性大幅提高，能够防止再熔融及接合强度下降，尤其适合曝露在高温气氛的电子组件安装于基板。并且，因接合层13中的端部13b、13c的Sn组成比例高，因此，即使在电子组件14和/或基板15反复发热和冷却时，延长缩收而缓和应力，并且如图4所示，即使因电子组件14与基板15的各热膨胀差而从接合部13的端部13b、13c起在水平方向上产生裂纹C，也能够缓和对端部13b、13c的应力，裂纹C难以扩展。其结果，能够使从半导体芯片元件14发生的热流畅地散热至基板15而防止电子组件的损伤。
实施例
接着，详细说明本发明的实施例与比较例。
＜实施例1＞
将添加有平均粒径5μm的Cu核Sn壳粉末(Cu：50质量％，Sn：50质量％)和弱活性剂的弱活性化助焊剂(RMA助焊剂)混合成助焊剂的比例成为13质量％而制备膏体。将所获得的膏体以厚度50μm涂布在0.5mm厚的边长为20mm的方形(□)的科伐合金(Fe-N i-Co类合金)基板上。接着，在该膏体上，搭载背面被溅镀Au的边长为2.5mm的方形(□)的半导体芯片元件。接着，将搭载半导体元件的科伐合金基板导入到加压加热炉内，于是在氮气氛中，对半导体芯片元件和科伐合金基板施加10MPa的压力，以300℃的温度维持5分钟而进行热压成型。由此，获得了半导体芯片元件接合于科伐合金基板上的模拟半导体模块。将实施例1的热压成型前的膏体条件和对模拟半导体模块进行热压成型的条件示于表1中。
[表1]
Figure BDA0002528123980000091
＜实施例2～11、比较例2～7＞
设定成表1所示的热压成型前的膏体的条件和对模拟半导体模块进行热压成型的条件，与实施例1相同，获得实施例2～11及比较例2～7的模拟半导体模块。在实施例4中，将加压成型时的气氛设为包含5体积％的氢气的氮气的气氛。
＜比较例1＞
以Cu：50质量％、Sn：50质量％的比例混合平均粒径10μm的Sn粉末和平均粒径10μm的Cu粉末而制作出混合粉末。将RMA助焊剂以助焊剂的比例成为13质量％的方式混合至该混合粉末而制备膏体。以下，与实施例1相同，获得半导体元件接合于科伐合金基板的模拟半导体模块。表1表示比较例1的热压成型前的膏体条件和对模拟半导体模块进行热压成型的条件。
＜比较评估＞
针对实施例1～11及比较例1～7的18种类的模拟半导体模块，以接着叙述的方法测定了(1)半导体模块的接合层的厚度和(2)该接合层的Cu和Sn的组成比(质量比)。并且，以下面叙述的方法进行(3)冷热冲击试验。将这些结果示于表2。
(1)半导体模块的接合层的厚度
使用光学显微镜(KEYENCE CORPORATION.制，型号VHX-1000)，以倍率150倍观察五处半导体模块的接合层的剖面，以平均值求出接合层的厚度。
(2)接合层的Cu和Sn的组成比(质量比)
通过扫描型电子显微镜-能量-分散型X射线分析法(SEM-EDX)求出接合层的Cu和Sn的组成比(质量比)。
(3)冷热冲击试验
使用冷热冲击试验机(ESPEC Corp.制TSB-51)，在液相(Fluorinert)下，对由通过接合层接合的科伐合金基板及半导体芯片元件构成的模拟半导体模块，实施2000次在-40℃下5分钟及在200℃下5分钟的冷热循环。在该冷热冲击试验之后，遵照记载于JIS Z3198-7中的无铅焊料试验方法-第7部的“芯片组件的焊料接合的剪切强度测定方法”，在室温下分别测定18种模拟半导体模块的剪切强度。将其结果示于表2。若剪切强度为40MPa以上，则视为“优”，若为20MPa～40MPa，则视为“良”，若为10MPa～20MPa，则视为“合格”，若为低于10MPa，则视为“不合格”。
[表2]
Figure BDA0002528123980000111
从表2比较实施例1～11和比较例1～7，可知如下。可知在构成为从接合层的中心部往所述电子组件的端部的接合部而Sn的组成比例增加的接合层中，在实施例1、2、3、8、10中，冷热冲击试验后的剪切强度均为20MPa以上，维持良好的接合状态。并且，在实施例4、5、6、7、9、11中，冷热冲击试验后的剪切强度均为10～20MPa以上。虽然维持接合，但表示比较低的强度，确认到接合层的厚度或Sn的组成比例存在优选的范围。
另外，与实施例1～11进行比较，在从接合层的中心部往端部的接合部而Sn的组成比例的变化不大的比较例1中，剪切强度下降至10MPa以下。可考虑到，这是因为由于Sn的组成比例变化不大而在热冲击试验中因施加于接合层的应力发生的裂纹扩展，从而产生了接合层的剥离。并且，相较于比较例1而Sn的组成比例增加的比较例2～7中，剪切强度也下降至10MPa以下。可考虑到，这是因为加压不足所致的接合层与基板或元件的密合性不足(比较例2)、过大的压力所致的基板或元件的部分性破坏(比较例3)、由低温所致的Sn液相的生成不足引起的密合性不足(比较例4)、由从高温冷却至室温时的各部件的热膨胀差所致的过大应力变形引起的部分性破坏(比较例5)、因加热不足而Sn-Cu互相扩散所致的金属间化合物生成不足(比较例6)、过加热所致的Sn-Cu互相扩散引起的柯肯达尔空洞(Kirkendallvoid)的生成(比较例7)等。
产业上的可利用性
本发明能够利用于在基板接合曝露于高温气氛的电子组件而构成且重复冷热的半导体模块。

Claims (6)

1.一种半导体模块的接合层，夹在电子组件与基板之间，且由CuSn金属间化合物构成，其特征在于，
构成为从所述接合层的中心部往所述电子组件的端部的接合部，Sn的组成比例增加。
2.根据权利要求1所述的半导体模块的接合层，其中，
在所述接合层的中心部中的Sn的组成比例为20质量％～50质量％，Cu的组成比例为其剩余部分，在所述电子组件的端部的接合部中的Sn的组成比例为60质量％～80质量％，Cu的组成比例为其剩余部分。
3.根据权利要求1或2所述的半导体模块的接合层，其中，
所述接合层的厚度为10μm～200μm。
4.一种半导体模块，其中，
权利要求1至3中的任一项所述的接合层夹在电子组件与基板之间。
5.一种制造半导体模块的方法，通过如下方法制造半导体模块：
使含有Cu核Sn壳粉末的膏体夹在电子组件与基板之间，以该夹在电子组件与基板之间的状态，在不活泼气氛或还原性气氛下，对所述电子组件和/或所述基板施加1MPa～30MPa的压力，并且以250℃～350℃的温度加热1分钟～10分钟，以将所述电子组件接合于所述基板。
6.根据权利要求5所述的半导体模块的制造方法，其中，
所述Cu核Sn壳粉末中，Sn的组成比例为40质量％～60质量％，Cu的组成比例为其剩余部分。
CN201980006292.0A 2018-01-24 2019-01-22 半导体模块的接合层、半导体模块及其制造方法 Pending CN111448643A (zh)

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