CN1262785A - 半导体装置及其制造方法、电路基板和电子装置 - Google Patents
半导体装置及其制造方法、电路基板和电子装置 Download PDFInfo
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- CN1262785A CN1262785A CN99800381A CN99800381A CN1262785A CN 1262785 A CN1262785 A CN 1262785A CN 99800381 A CN99800381 A CN 99800381A CN 99800381 A CN99800381 A CN 99800381A CN 1262785 A CN1262785 A CN 1262785A
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Abstract
本发明的目的在于提供这样一种半导体装置及其制造方法、电路基板和电子装置,其中,一边可确保连接可靠性而不需要进行基板材料的选择及在连接后附加工序,一边能直接连接到基板上,可进一步实现电子装置的小型化、轻量化。半导体装置包括:具有电极(104)的半导体元件(100);与电极(104)连接的布线层(120);在避开电极(104)的位置上设置在布线层(120)上的导通层(122);以超过导通层(122)的外周轮廓的大小设置在导通层(122)之上且比导通层(122)容易变形的基底金属层(124);设置在基底金属层(124)之上的凸点(200);以及设置在导通层(122)的周围的树脂层(126)。
Description
技术领域
本发明涉及半导体装置及其制造方法、电路基板和电子装置。
背景技术
现有的焊锡凸点的基底金属由在电极(通常是铝)的正上方以大致相同的尺寸形成的阻挡金属薄膜和在其正上方以大致相同的尺寸形成且容易润湿焊锡的金属薄膜构成。此外,即使是在半导体芯片上设置布线层的结构,也是同样的结构。
近年来,伴随电子装置的小型化,直接将具有焊锡凸点的半导体装置连接到基板上以便使电子装置进一步实现小型化、轻量化的动向越来越活跃。在这样的状况下,对于连接到与半导体元件的热膨胀系数差别大的基板上的可靠性的要求越来越高。例如,如在特公平7-105586号公报中公开的那样,提出了将尺寸与焊锡凸点大致相同的基底金属作成多层金属层来谋求缓和应力的结构。
但是,在与半导体装置实际进行连接时,存在下述问题:安装到热膨胀系数被限定于接近半导体芯片的基板上、或限定半导体芯片的尺寸、或在连接后附加工序以注入树脂等,工序变得复杂,或者材料成本提高。
本发明是为了解决该问题而完成的,其目的在于,提供这样一种半导体装置及其制造方法、电路基板和电子装置,其中,一边可确保连接可靠性而不需要进行基板材料的选择及在连接后附加工序,一边能直接连接到基板上,可进一步实现电子装置的小型化、轻量化。
发明的公开
(1)与本发明有关的半导体装置包括:
具有电极的半导体元件;
与上述电极连接的布线层;
在避开上述电极的位置上设置在上述布线层上的导通层;
以超过上述导通层的外周轮廓的大小设置在上述导通层之上且比上述导通层容易变形的基底金属层;
设置在上述基底金属层之上的凸点;以及
设置在上述导通层的周围的树脂层(绝缘保护层)。
按照本发明,导通层由于热应力而变形,同时基底金属层也变形。由于在导通层的周围设置了树脂层,故大部分热应力施加到基底金属层上而不是施加到导通层上,由于基底金属层可有较大的变形,故可吸收热应力。其结果,可减轻热应力施加到导通层上的力,可抑制因导通层的剪断引起的导通不良。
(2)在该半导体装置中,上述凸点以超过上述导通层的外周轮廓的大小来形成,上述凸点与上述基底金属层接触的区域的投影面积可比上述基底金属层与上述导通层接触的区域的投影面积大。
(3)在该半导体装置中,上述树脂层可与上述基底金属层的下表面的至少一部分接触。
(4)在该半导体装置中,上述树脂层可离开上述基底金属层的下表面而被设置。
(5)在该半导体装置中,可在上述基底金属层的下表面与上述树脂层之间设置粘接剂。
(6)在该半导体装置中,上述导通层的高度可以约为12~300μm,直径约为20~100μm。
按照这一点,由于导通层容易变形,故可高效率地吸收热应力。
(7)在与本发明有关的电路基板上安装了上述半导体装置。
(8)与本发明有关的电子装置具备上述半导体装置。
(9)与本发明有关的半导体装置的制造方法包括:
准备形成了电极和与上述电极连接的布线层的半导体元件的工序;
在避开上述电极的位置上且在上述布线层上设置导通层的工序;
在上述导通层之上设置其大小超过上述导通层的外周轮廓且比上述导通层容易变形的基底金属层的工序;
在上述基底金属层之上设置凸点的工序;以及
在上述导通层的周围设置树脂层的工序。
按照用本发明制造的半导体装置,导通层由于热应力而变形,同时基底金属层也变形。由于在导通层的周围设置了树脂层,故大部分热应力施加到基底金属层上而不是施加到导通层上,由于基底金属层可有较大的变形,故可吸收热应力。其结果,可减轻热应力施加到导通层上的力,可抑制因导通层的剪断引起的导通不良。
(10)在该半导体装置的制造方法中,设置上述导通层和上述树脂层的工序也可包括:
在上述布线上使上述导通层的形成区域开口作为开口部,形成上述树脂层的第1工序;
利用印刷法在上述开口部中填充在粘合剂中分散导电填充剂而构成的导电糊剂的第2工序;以及
加热上述导电糊剂使上述粘合剂硬化、使其与上述布线密接的第3工序。
按照这一点,可利用印刷法简单地将导电糊剂填充到树脂层的开口部中。
(11)在该半导体装置的制造方法中,在上述第3工序中可使上述导电填充剂熔化、使其与上述布线密接。
按照这一点,由于使导电填充剂熔融,故可形成与布线密接的导通层。
(12)在该半导体装置的制造方法中,设置上述基底金属层的工序可包括:
第1工序,在设置了上述导通层和上述树脂层之后,避开与上述导通层的接触部分、在真空下将设置了粘接剂的金属箔粘接在上述导通层和上述树脂层上,在大气压下使上述导通层与上述金属箔之间的空间成为真空,使上述导通层与上述金属箔密接;以及
第2工序,对上述金属箔进行图形刻蚀,使其成为上述基底金属层的形状。
按照这一点,通过粘接金属箔并对其进行图形刻蚀,可简单地形成基底金属层。
(13)在该半导体装置的制造方法中,设置上述导通层和上述基底金属层的工序可包括:
第1工序,在包含上述导通层的形成区域的区域中设置第1导电材料;
第2工序,形成第1抗蚀剂层,在该第1抗蚀剂层中形成了与上述导通层的形成区域相对应的,同时位于上述第1导电材料上的第1开口部;
第3工序,在上述第1开口部内且在上述第1导电材料上设置第2导电材料;
第4工序,在上述第1抗蚀剂层上形成第2抗蚀剂层,在该第2抗蚀剂层中形成了与上述基底金属层的形成区域对应的第2开口部;
第5工序,在上述第2开口部中设置金属材料以形成上述基底金属层;以及
第6工序,除去上述第1和第2抗蚀剂层,对上述第1导电材料进行图形刻蚀,由上述第1导电材料的一部分和上述第2导电材料来形成上述导通层。
附图的简单说明
图1是示出与本发明的第1实施形态有关的半导体装置的图,图2是示出与本发明的第1实施形态的变形例有关的半导体装置的图,图3是示出与本发明的第1实施形态的变形例有关的半导体装置的图,图4A~图4C是示出与本发明的第2实施形态有关的半导体装置的制造方法的图,图5A~图5C是示出与本发明的第2实施形态有关的半导体装置的制造方法的图,图6A~图6B是示出与本发明的第2实施形态有关的半导体装置的制造方法的图,图7A~图7C是示出与本发明的第3实施形态有关的半导体装置的制造方法的图,图8A~图8C是示出与本发明的第3实施形态有关的半导体装置的制造方法的图,图9是示出安装了与本实施形态有关的半导体装置的电路基板的图,图10是示出具备与本实施形态有关的半导体装置的电子装置的图。
用于实施发明的最佳形态
以下,参照附图说明本发明的优选实施形态。
(第1实施形态)
图1是示出与本发明的第1实施形态有关的半导体装置的图。在图1中示出的半导体装置在半导体元件(半导体芯片)100上经应力缓和功能的部件设置了凸点200。该形态可称为具有应力缓和功能的倒装芯片,但也可分类为CSP(芯片尺寸/比例封装体)。
半导体元件100具有由门等构成的元件组(未图示)。在半导体元件100中形成了多个电极104。在半导体元件100中的形成了电极104的面上避开电极104形成了绝缘层106。可用硅的氧化膜形成绝缘层106。再有,作为另一例,也可使用硅的氮化膜或聚酰亚胺等。将布线层120连接到电极104上,布线层120延伸到避开电极104的区域。在绝缘层106上形成了布线层120。
在布线层120中的避开电极104的位置(部分或区域)上设置了导通层122。导通层122可用包含Ni的合金、包含Cu的合金、Cu、Ni、Sn、焊锡、Au、Ag、Fe、Zn、Cr和Co中的任一种来形成。导通层122的高度约为12μm以上、较为理想是在约15μm以上、更为理想是20μm。导通层122的高度约为300μm以下、较为理想是在约200μm以下、如果是约100μm以下,则可用简单的方法来制造。导通层122可作成圆柱状,其直径最好约为20~100μm。导通层122可以是直径约为60μm、高度约为50μm的圆柱状。通过导通层122作成容易变形的形状,可消除因其剪断而引起的导通不良。作为导通层122的制造方法,可应用电解电镀。
在导通层122之上例如用铜等设置了基底金属层124。基底金属层124以超过导通层122的外周轮廓的大小来形成,比导通层122容易变形(弹性系数低)。为了容易变形,基底金属层124最好是比导通层122薄(高度低)的形状。或者,也可用容易变形的材料来形成基底金属层124。基底金属层124也可作成为圆柱状,此时,直径可以约为60μm、高度可以约为50μm。作为基底金属层124的制造方法,可应用电解电镀。
在布线层120上形成了例如由聚酰亚胺树脂构成的树脂层126。树脂层126是成为布线层120的保护膜的绝缘保护层。在导通层122的周围设置了树脂层126。树脂层126也可形成为与基底金属层124的下表面的整个面接触。此时,施加到基底金属层124上的热应力在基底金属层124的下表面的整个面上被树脂层126吸收。
或者,如图2中示出的变形例那样,树脂层125可以离开基底金属层124而被设置。此时,基底金属层124容易变形。再有,在图2中,在绝缘层106上形成了另外的绝缘层108。也可利用氧化硅膜形成绝缘层106,利用聚酰亚胺树脂形成绝缘层108。
或者,如图3中示出的变形例那样,树脂层127可与基底金属层124的一部分接触。此时,可以是树脂层127与基底金属层124的下表面上的与导通层122接合的部分的周围接触、树脂层127不与基底金属层124的外周端部接触的结构。这样,按照树脂层127与基底金属层124的下表面的一部分接触的结构,可谋求因树脂层127产生的热应力的吸收和基底金属层124的容易变形的协调。
在基底金属层124之上设置凸点200。凸点200大多是焊锡凸点。例如,将膏状焊锡等的焊锡放置在基底金属层124上并加热,使焊锡熔融,可形成球状的凸点200。在膏状焊锡的供给方面,可应用焊锡印刷的方式。凸点200大多以超过导通层122的外周轮廓的大小来形成。凸点200与基底金属层124接触的区域的投影面积大多比基底金属层124与导通层122接触的区域的投影面积大。
按照本实施形态,导通层122由于热应力而变形,同时基底金属层124也变形。由于在导通层122的周围设置了树脂层126,故大部分热应力施加到基底金属层124上而不是施加到导通层122上,由于基底金属层124可有较大的变形,故可吸收热应力。其结果,可减轻热应力施加到导通层122上的力,可抑制因导通层122的剪断引起的导通不良。
(第2实施形态)
图4A~图6B是示出与本发明的第2实施形态有关的半导体装置的制造方法的图。在本实施形态中,如图4A中所示,准备形成了电极104和与该电极104连接的布线层120的半导体元件100。再有,在半导体元件100上形成了绝缘层106,在绝缘膜106上形成了布线层120。
其次,在避开电极104的位置上,在布线层120上设置导通层,在导通层上设置基底金属层。详细地说,进行以下的第1~第6工序。
(第1工序)
如图4A中所示,至少在布线层120上且至少在包含导通层的形成区域的区域上形成第1导电材料130。第1导电材料130也可在半导体元件100中的形成了电极104的面的整个面上形成。作为形成金属膜130的方法,可应用蒸镀法或无电解电镀法等,但最好用溅射法。
(第2工序)
如图4B中所示,形成第1抗蚀剂层134,在该第1抗蚀剂层134中形成了第1开口部132,该第1开口部132与导通层的形成区域相对应,同时位于第1导电材料130上。作为第1抗蚀剂层134,可使用感光性树脂(光致抗蚀剂)。此外,作为形成第1开口部132的方法,可应用通过掩模进行曝光、显影的光刻。或者,也可利用丝网印刷或转移印刷法,形成第1抗蚀剂层134,在该第1抗蚀剂层134中形成了第1开口部132。
(第3工序)
如图4C中所示,在第1开口部132内且在第1导电材料130上设置第2导电材料136。例如,通过将第1导电材料130作为电极,将第1开口部132的内表面浸于电镀液中,可形成第2导电材料136。此时,作为电极的引出方法,有将接触针触到第1开口部132的内表面上的方法、以戳破第1抗蚀剂层134的方式来接触接触针的方法等。或者,也可利用溅射法或无电解电镀法来设置第2导电材料136。
(第4工序)
如图5A中所示,在第1抗蚀剂层134上形成第2抗蚀剂层144,在该第2抗蚀剂层144中形成了与基底金属层的形成区域对应的第2开口部142。第2抗蚀剂层144可从能作为第1抗蚀剂层134使用的材料中进行选择。关于第2开口部142的形成方法,可应用第1抗蚀剂层134的第1开口部132的形成方法。
(第5工序)
如图5B中所示,在第2开口部142中设置金属材料,形成基底金属层146。关于形成基底金属层146的方法,可应用在设置第2导电材料136时的方法。
(第6工序)
如图5C中所示,除去第1和第2抗蚀剂层134、144,对第1导电材料130进行图形刻蚀,由第1导电材料130的一部分和第2导电材料136来形成导通层148。作为对第1导电材料130进行图形刻蚀的方法,有使用溶剂的方法、使用剥离液的方法、等离子体的方法、刻蚀的方法、或将这些方法组合起来的方法。
如果以上的工序结束,则如图6A中所示,在导通层148的周围设置树脂层150。树脂层150可用聚酰亚胺、环氧、硅、苯环丁烯等的树脂来形成。作为其形成方法,可应用浸渍法、旋转涂敷法、喷射法、蒸镀法、浇注法等,但最好用旋转涂敷法。此外,在树脂不应附着的部位、例如基底金属层146的上表面等处附着了的情况下,可通过溶剂、等离子体、刻蚀等,有选择地将树脂除去。或者,也可在一度用树脂覆盖基底金属层146的整个表面之后除去树脂,直到基底金属层146的上表面露出为止。或者,也可以机械方式对树脂进行研磨、切削,使基底金属层146的表面露出。
其次,如图6B中所示,在基底金属层146上设置凸点200。例如,可用丝网印刷或个别供给的方法将膏状焊锡放置在基底金属层146上,对其进行加热,形成球状的凸点200。或者,也可个别地供给熔融焊锡,或供给球状的焊锡并进行加热。
按照利用以上的工序制造半导体装置,导通层148由于热应力而变形,同时基底金属层146也变形。由于在导通层148的周围设置了树脂层150,故大部分热应力施加到基底金属层146上而不是施加到导通层148上,由于基底金属层146可有较大的变形,故可吸收热应力。其结果,可减轻热应力施加到导通层148上的力,可抑制因导通层148的剪断引起的导通不良。
(第3实施形态)
图7A~图8C是示出与本发明的第3实施形态有关的半导体装置的制造方法的图。
(设置导通层和上述树脂层的工序)
(第1工序)
如图7A中所示,在布线层120上使导通层的形成区域开口作为开口部162,形成树脂层160。
(第2工序)
如图7A和图7B中所示,使模版的开口部与开口部162相一致,利用刮板(squeegee)166将导电糊剂168充填到开口部162中。即,进行丝网印刷。在此,导电糊剂168是将导电填充剂分散在粘合剂中而构成。按照丝网印刷,可一并地将导电糊剂168充填到多个开口部162中。或者,也可进行散布(dispense)印刷。散布印刷在开口部162较深时是适合的。
(第3工序)
如图7C中所示,对导电糊剂168进行加热,使粘合剂硬化。此外,可对粘合剂进行烧固,也可使导电填充剂熔融。例如,也可对导电糊剂168照射激光。由此,由于导电糊剂168与布线120进行面接触,故形成密接于布线120上的导通层170。按照以上的工序,可形成导通层170而不使用电镀的工艺。
(设置基底金属层的工序)
(第1工序)
如图8A中所示,将避开与导通层170的接触部分设置了粘接剂的金属箔172粘接到导通层170和树脂层160上。在真空下进行该工序。其次,使气压成为大气压,如图8B中所示,使导通层170与金属箔172之间的空间成为真空,使导通层170与金属箔172密接。通过这样做,导通层170与金属箔172之间的电阻值下降。
(第2工序)
如图8C中所示,对金属箔172进行图形刻蚀,使其成为基底金属层176的形状。其后,在基底金属层176之上设置凸点。导通层170由导电糊剂构成,但由于介入基底金属层176,故导电糊剂不直接与凸点接触。因而,例如使用银糊剂作为导电糊剂、使用焊锡作为凸点的材料,即使两者由于热而熔融,也不会混合在一起。按照本实施形态,通过粘接金属箔172并对其进行图形刻蚀,可简单地形成基底金属层176。
图9中示出了安装了与本实施形态有关的半导体装置1的电路基板1000。在电路基板1000中,一般使用例如玻璃环氧基板等有机类基板。在电路基板1000上,形成了例如由铜构成的布线图形1100,使之成为所希望的电路,通过以机械方式来连接这些布线图形与半导体装置1的成为外部端子的凸点200,谋求这两者的电导通。半导体装置1具备缓和因电路基板1000的热膨胀系数与半导体元件的热膨胀系数之差产生的热应力的功能。
作为具有应用了本发明的半导体装置1的电子装置1200,在图10中示出了笔记本型个人计算机。
再有,也可将上述本发明的构成要素「半导体元件」置换为「电子元件」,与半导体芯片同样地将电子元件(不问其是有源元件还是无源元件)安装在基板上来制造电子部件。作为使用这样的电子元件制造的电子部件,例如,有:电阻器、电容器、线圈、振荡器、滤波器、温度传感器、热敏电阻、变阻器、电位器或熔断器等。
Claims (22)
1.一种半导体装置,其特征在于,包括:
具有电极的半导体元件;
与上述电极连接的布线层;
在避开上述电极的位置上设置在上述布线层上的导通层;
以超过上述导通层的外周轮廓的大小设置在上述导通层之上且比上述导通层容易变形的基底金属层;
设置在上述基底金属层之上的凸点;以及
设置在上述导通层的周围的树脂层。
2.如权利要求1中所述的半导体装置,其特征在于:
上述凸点以超过上述导通层的外周轮廓的大小来形成,
上述凸点与上述基底金属层接触的区域的投影面积比上述基底金属层与上述导通层接触的区域的投影面积大。
3.如权利要求1中所述的半导体装置,其特征在于:
上述树脂层与上述基底金属层的下表面的至少一部分接触。
4.如权利要求2中所述的半导体装置,其特征在于:
上述树脂层与上述基底金属层的下表面的至少一部分接触。
5.如权利要求1中所述的半导体装置,其特征在于:
上述树脂层离开上述基底金属层的下表面而被设置。
6.如权利要求2中所述的半导体装置,其特征在于:
上述树脂层离开上述基底金属层的下表面而被设置。
7.如权利要求1至6的任一项中所述的半导体装置,其特征在于:
在上述基底金属层的下表面与上述树脂层之间设置了粘接剂。
8.如权利要求1至6的任一项中所述的半导体装置,其特征在于:
上述导通层的高度约为12~300μm,直径约为20~100μm。
9.如权利要求7中所述的半导体装置,其特征在于:
上述导通层的高度约为12~300μm,直径约为20~100μm。
10.一种电路基板,其特征在于:
安装了如权利要求1至6的任一项中所述的半导体装置。
11.一种电路基板,其特征在于:
安装了如权利要求7中所述的半导体装置。
12.一种电路基板,其特征在于:
安装了如权利要求8中所述的半导体装置。
13.一种电路基板,其特征在于:
安装了如权利要求9中所述的半导体装置。
14.一种电子装置,其特征在于:
具备如权利要求1至6的任一项中所述的半导体装置。
15.一种电子装置,其特征在于:
具备如权利要求7中所述的半导体装置。
16.一种电子装置,其特征在于:
具备如权利要求8中所述的半导体装置。
17.一种电子装置,其特征在于:
具备如权利要求9中所述的半导体装置。
18.一种半导体装置的制造方法,其特征在于,包括:
准备形成了电极和与上述电极连接的布线层的半导体元件的工序;
在避开上述电极的位置上且在上述布线层上设置导通层的工序;
在上述导通层之上设置其大小超过上述导通层的外周轮廓且比上述导通层容易变形的基底金属层的工序;
在上述基底金属层之上设置凸点的工序;以及
在上述导通层的周围设置树脂层的工序。
19.如权利要求18中所述的半导体装置的制造方法,其特征在于,设置上述导通层和上述树脂层的工序包括:
在上述布线上使上述导通层的形成区域开口作为开口部,形成上述树脂层的第1工序;
利用印刷法在上述开口部中填充在粘合剂中分散导电填充剂而构成的导电糊剂的第2工序;以及
加热上述导电糊剂使上述粘合剂硬化、使其与上述布线密接的第3工序。
20.如权利要求19中所述的半导体装置的制造方法,其特征在于:
在上述第3工序中使上述导电填充剂熔化、使其与上述布线密接。
21.如权利要求18至20的任一项中所述的半导体装置的制造方法,其特征在于:
设置上述基底金属层的工序包括:
第1工序,在设置了上述导通层和上述树脂层之后,避开与上述导通层的接触部分、在真空下将设置了粘接剂的金属箔粘接在上述导通层和上述树脂层上,在大气压下使上述导通层与上述金属箔之间的空间成为真空,使上述导通层与上述金属箔密接;以及
第2工序,对上述金属箔进行图形刻蚀,使其成为上述基底金属层的形状。
22.如权利要求18中所述的半导体装置的制造方法,其特征在于,设置上述导通层和上述基底金属层的工序包括:
第1工序,在包含上述导通层的形成区域的区域中,设置第1导电材料;
第2工序,形成第1抗蚀剂层,在该第1抗蚀剂层中形成了与上述导通层的形成区域相对应的,同时位于上述第1导电材料上的第1开口部;
第3工序,在上述第1开口部内且在上述第1导电材料上设置第2导电材料;
第4工序,在上述第1抗蚀剂层上形成第2抗蚀剂层,在该第2抗蚀剂层中形成了与上述基底金属层的形成区域对应的第2开口部;
第5工序,在上述第2开口部中设置金属材料以形成上述基底金属层;以及
第6工序,除去上述第1和第2抗蚀剂层,对上述第1导电材料进行图形刻蚀,由上述第1导电材料的一部分和上述第2导电材料来形成上述导通层。
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1999
- 1999-03-19 EP EP99909275A patent/EP1005082A4/en not_active Withdrawn
- 1999-03-19 WO PCT/JP1999/001410 patent/WO1999050907A1/ja active IP Right Grant
- 1999-03-19 KR KR1019997011032A patent/KR100552988B1/ko not_active IP Right Cessation
- 1999-03-19 CN CNB998003816A patent/CN1236489C/zh not_active Expired - Fee Related
- 1999-03-19 US US09/424,484 patent/US6181010B1/en not_active Expired - Lifetime
- 1999-03-22 TW TW088104506A patent/TW452868B/zh not_active IP Right Cessation
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Publication number | Priority date | Publication date | Assignee | Title |
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CN104952743A (zh) * | 2015-05-19 | 2015-09-30 | 南通富士通微电子股份有限公司 | 晶圆级芯片封装方法 |
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US6181010B1 (en) | 2001-01-30 |
WO1999050907A1 (en) | 1999-10-07 |
KR100552988B1 (ko) | 2006-02-15 |
EP1005082A4 (en) | 2001-08-16 |
US20010000080A1 (en) | 2001-03-29 |
KR20010013055A (ko) | 2001-02-26 |
US6414390B2 (en) | 2002-07-02 |
EP1005082A1 (en) | 2000-05-31 |
CN1236489C (zh) | 2006-01-11 |
TW452868B (en) | 2001-09-01 |
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