CN1252838C - 具有辐射外延层序列的发光二极管芯片及其制造方法 - Google Patents
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Abstract
发光二极管芯片(1),具有一个基于GaN的进行辐射的外延层序列(3),该外延层序列具有一个有源区(19)、一个n掺杂层(4)和一个p掺杂层(5)。所述p掺杂层(5)在其背向有源区(19)的主面(9)上设有进行反射的接触金属敷层(6),该接触金属敷层具有一个能穿透辐射的接触层(15)和一个进行反射的层(16),所述穿透辐射的接触层(15)被布置在所述p掺杂层(5)和所述反射层(16)之间,而且所述接触层(15)是一个非闭合层。另外还给出了一种用薄膜技术制造这种发光二极管芯片的方法以及一种具有这种发光二极管芯片的发光二极管器件。
Description
技术领域
本发明涉及一种具有基于GaN的辐射外延层序列的发光二极管芯片,该发光二极管芯片的制造方法,以及具有这种发光二极管芯片的发光二极管器件。
背景技术
“基于GaN”在下文尤其被理解为所有三元和四元的、基于GaN的混合晶体,譬如AlN、InN、AlGaN、InGaN、InAlN和AlInGaN,以及GaN本身。
在制造基于GaN的发光二极管芯片时存在一个基本问题,即:p掺杂层、尤其是p掺杂GaN或AlGaN层所能达到的最高导电率不足以用常规的前侧接触金属敷层来在芯片的整个横截面上实现电流扩张,其中所述的金属层在其它材料系的发光二极管芯片中是公知的(为尽可能更高地进行辐射耦合输出,这种金属层只覆盖了前侧的一小部分)。
p导电层在导电衬底上的生长-由此也许可以在p导电层的整个横截面上实现电流注入-不会导致经济上合理的结果。其原因可以描述如下。首先,制造导电且晶格匹配的衬底(譬如GaN衬底)以便生长基于GaN的层,这是与高技术费用联系在一起的;其次,在适合于非掺杂和n掺杂GaN化合物的非晶格匹配的衬底上,生长p掺杂的基于GaN的层会导致不能充分满足发光二极管的晶体质量。
在用于克服上述问题的已知解决方案中,在所述p导电层的与衬底相对的那一侧整个平面地敷设一个能穿透辐射的接触层,或敷设一个附加的导电性能良好的电流扩张层,该层设有一个焊接接触。
但所述的第一种建议具有以下缺点,即辐射的绝大部分被所述的接触层吸收。在第二种建议中需要附加的处理步骤,这便大大增加了制造费用。
发明内容
本发明的首要任务在于,以更好的电流扩张性来改进本文开头所述的那种发光二极管芯片,而且使其附加的制造成本保持较低。另外,还提供一种有源区具有改善的导热性的发光二极管器件。
根据本发明的发光二极管芯片,具有:一个基于GaN的进行辐射的外延层序列,该外延层序列具有一个有源区、一个n掺杂层和一个p掺杂层、一个分配给所述p掺杂层的进行反射的接触金属敷层,该接触金属敷层具有一个能穿透辐射的接触层和一个进行反射的层,而且所述穿透辐射的接触层被布置在所述p掺杂层和所述反射层之间,以及所述接触层是一个非闭合层。
在本发明的发光二极管中,p掺杂层在其背向有源层的主面上设有一个进行反射的接触金属敷层。进行反射的合适金属层譬如是基于Ag的金属层。“基于Ag”可以理解为其电和光特性主要由Ag确定的所有金属。尤其是含有大部分Ag的金属。
所述的接触金属敷层有利地实现了一方面与通往外延层序列的低过渡电阻进行良好的欧姆接触。另一方面它还有利地具有较高的反射能力和在上述频谱范围内具有低吸收性。由此可以把射向它的电磁波辐射以较高的反射率返回到芯片中。该被返回的辐射然后可以通过芯片的敞露侧面而从该芯片输出去。
在一种优选实施方案中,所述进行反射的接触金属敷层至少部分地由PtAg和/或PdAg合金组成。
所述进行反射的接触金属敷层优选地覆盖了大于所述p掺杂层的背向所述有源层的主面的50%,尤其是覆盖了其100%。由此实现给有源区的整个横截面提供电流。
为了使所述进行反射的接触金属敷层在p掺杂层上达到所需的附着强度,优选地在所述的两个层之间设立一个穿透辐射的接触层,该接触层譬如主要具有金属群Pt、Pd、Cr中的至少一种。
由此,所述进行反射的接触金属敷层可以简单地在其电特性和反射特性方面得到优化。
所述类型的接触层的厚度优选地小于或等于10nm。从而使该层中的光损耗有利地被保持得较低。
特别有利的是,所述接触层具有一个非闭合的、尤其是一种岛形或网形的结构。由此可以有利地实现:所述基于Ag的反射层至少部分地与所述的p掺杂层具有直接接触,以便正面地影响电和光特性。
在另一优选实施方案中,所述的接触层基本由铟锡氧化物(ITO)和/或ZnO组成,并优选地具有大于或等于10nm的厚度。利用这种接触层可以有利地实现非常好的电流扩张,同时使辐射吸收很低。
另外优选的是,在所述的反射层上设有一个具有焊接能力的层,它尤其是基本上包括一个由Ti/Pt或TiWN和由Au或Al组成的扩散屏障,由此改善了进行反射的接触金属敷层的可焊性。
在本发明的另一种发光二极管芯片中,所述的芯片只具有外延层,该外延层的总厚度小于或等于30μm。为此,在所述外延层序列进行外延生长之后把生长衬底去掉。所述p掺杂外延层在其背向所述n掺杂的外延层的主面上整个平面地设有进行反射的接触金属敷层。所述n掺杂的外延层在其背向所述p掺杂的外延层的主面上有一个n接触金属敷层,该敷层只覆盖了所述主面的一部分。光耦合输出是从所述芯片经所述n导电外延层的主面的敞露区域和经芯片边缘实现的。
在这种类型的发光二极管芯片中,生长衬底既可以是电绝缘的,也可以是不穿透辐射的,因此优选地只在最佳的生长条件方面对其进行选择。这类所谓的薄膜发光二极管芯片的特殊优点在于,在衬底内不会发生光损耗,并实现了改善的辐射输出。
本发明的发光二极管芯片还具有以下优点,即:可以把进行辐射的有源区-在该区域中把工作时导入芯片的大部分电能转换成热能-安置到非常靠近于散热器;所述的外延层序列实际上可以直接地-中间只有p掺杂的外延层-热耦合到散热器上。因此可以非常有效地冷却芯片,提高所发出的辐射的波长稳定性。
在本发明的发光二极管芯片中,由于接触是整个平面的,所以有利地降低了正向电压。
在具有本发明发光二极管芯片的本发明发光二极管器件中,芯片利用其p侧、也即利用进行反射的接触金属敷层被安装到LED外壳的芯片安装面上,尤其是LED外壳的导体框或导轨上。
根据本发明的具有上述发光二极管芯片的发光二极管器件,其中:所述外延层序列通过进行反射的接触金属敷层被导热地连接到一个散热器上。
根据本发明的具有上述发光二极管芯片的发光二极管器件,其中:所述的芯片被安装到LED外壳的一个导热的芯片安装区上,尤其是被安装到所述LED外壳的一个导体框或导轨上,而且所述进行反射的接触金属敷层位于所述的芯片安装面上。
本发明还涉及用于制造上述发光二极管芯片的方法,其中:
(a)在一个生长衬底上生长外延层序列,使得p掺杂层背向所述的生长衬底,
(b)在所述的p掺杂层上敷设进行反射的接触金属敷层,以及
(c)使所述的生长衬底变薄。
根据本发明的另一种用于制造上述发光二极管芯片的方法,其中:
(a)在一个生长衬底上生长外延层序列,使得p掺杂层背向所述的生长衬底,
(b)在所述的p掺杂层上敷设进行反射的接触金属敷层,以及
(c)去掉所述的生长衬底。
附图说明
本发明的其他优选改进方案由下面结合附图1a-2所讲述的实施例中得出。其中:
图1a简要地示出了第一实施例的剖面图;
图1b简要地示出了有利的反射接触金属敷层;
图2简要地示出了第二实施例的剖面图。
在不同实施例的附图中,相同的或起相同作用的部件分别用相同的参考符号表示。
具体实施方式
在图1a的发光二极管芯片1中,在SiC衬底2上敷设一个辐射的外延层序列3。该外延层序列由一个n导电掺杂的GaN-或AlGaN-外延层4和一个p导电掺杂的GaN-或AlGaN-外延层5组成。同样,譬如可以设立一个基于GaN的外延层序列3,它具有一个双异质结构、一个单量子阱(SQW)结构或一个多量子阱(MQW)结构,其具有一个或多个譬如由InGaN或InGaAlN组成的非掺杂层19。
所述的SiC衬底2是导电的,并且对从外延层序列3的有源区19发出的辐射是可以穿透的。
在其与SiC衬底2向背的p-侧9上,在所述外延层序列3上整个平面地敷设了一个进行反射而又具有焊接能力的基于Ag的接触金属敷层6。该金属层譬如基本由Ag、PtAg和/或PdAg合金组成。
但接触金属敷层6也可以象图1b所示的那样,从外延层序列3出发由一个穿透辐射的第一层15和一个进行反射的第二层16构成。
所述的第一层15譬如基本上由Pt,Pd和/或Cr组成,而且厚度小于或等于10nm,以便使辐射吸收保持得较低。可选地,它可以由铟锡氧化物(ITO)和/或ZnO组成。于是它优选地具有大于或等于10nm的厚度,因为该材料只表现出非常低的辐射吸收性。较大的厚度对电流扩张是有利的。
第二层16譬如基本上由Ag、PtAg和/或PdAg合金组成。
为了改善可焊性,在基于Ag的层上敷设另一金属层20。该金属层譬如由Au或Al组成。作为第二层16和所述另一金属层20之间的扩散屏障24可设立一个由Ti/Pt或TiWN组成的层。
在其背向外延层序列3的主面10上给所述的SiC衬底2装设了一个接触金属敷层7,它只覆盖了该主面10的一部分,并被构造为用于金属线焊接的焊接盘。所述的接触金属敷层7譬如由一个涂敷在SiC衬底2上的、随后再跟随一个Au层的Ni层组成。
芯片1借助管芯焊接而利用其p侧、也即利用反射接触金属敷层6被安装到发光二极管(LED)外壳的接线框11(导线框)的芯片安装面12上。所述的n接触金属敷层7通过金属焊丝17被连接到接线框11的连接部分18上。
芯片1的光输出通过所述SiC衬底2的主面10的敞露区域和芯片边缘14来实现。
可选地,芯片1具有一个在所述外延层序列3生长后变薄的SiC衬底2,以便在辐射吸收和辐射输出方面优化所述衬底2的厚度。
图2所示的实施例与图1a的不同之处一方面在于,芯片1只具有外延层、也即外延层序列3而没有衬底层。后者在所述外延层生长之后已经譬如借助腐蚀和/或研磨而被去掉。芯片高度约为25μm。
就这类所谓的薄膜LED芯片的优点而言,可以参见本说明书的一般描述。另一方面,所述的外延层序列3具有双异质结构、单量子阱(SQW)结构或多量子阱(MQW)结构,其具有一个或多个非掺杂的层19,譬如由InGaN或InGaAlN组成。
芯片1借助管芯焊接而利用其p侧、也即利用反射接触金属敷层6被安装到发光二极管(LED)外壳21的导轨22的芯片安装面12上。所述的n接触金属敷层7通过金属焊丝17被连接到另一导轨23上。
本发明借助上述实施例所进行的阐述显然不应理解为是对本发明的限制。本发明尤其还可以应用于所有的发光二极管芯片,其中远离生长衬底的外延层具有不足的导电性能。
Claims (19)
1.发光二极管芯片(1),具有
-一个基于GaN的进行辐射的外延层序列(3),该外延层序列具有一个有源区(19)、一个n掺杂层(4)和一个p掺杂层(5),
-一个分配给所述p掺杂层(5)的进行反射的接触金属敷层(6),该接触金属敷层具有一个能穿透辐射的接触层(15)和一个进行反射的层(16),而且所述穿透辐射的接触层(15)被布置在所述p掺杂层(5)和所述反射层(16)之间,以及
-所述接触层(15)是一个非闭合层。
2.按照权利要求1所述的发光二极管芯片(1),其中:
所述的接触层(15)具有金属Pt、Pd、Cr中的至少一种。
3.按照权利要求2所述的发光二极管芯片(1),其中:
所述接触层(15)的厚度小于或等于10nm。
4.按照上述权利要求中任一项所述的发光二极管芯片,其中:
所述接触层(15)具有一种岛形或网形结构,或具有一种由这些结构组合而成的结构。
5.按照权利要求1所述的发光二极管芯片(1),其中:
所述的接触层(15)基本具有来自一个包含铟锡氧化物(ITO)和ZnO材料的材料群中的至少一种材料。
6.按照权利要求5所述的发光二极管芯片(1),其中:
所述接触层的厚度大于或等于10nm。
7.按照权利要求1所述的发光二极管芯片,其中:
所述反射层(16)含有Ag。
8.按照权利要求7所述的发光二极管芯片(1),其中:
所述反射层(16)至少部分地由来自一个包含PtAg合金和PdAg合金材料的材料群中的一种材料组成。
9.按照权利要求1所述的发光二极管芯片(1),其中:
所述反射层(16)覆盖了大于所述p掺杂层(5)的背向所述有源区(19)的主面(9)的50%。
10.按照权利要求9所述的发光二极管芯片(1),其中:
所述反射层(16)覆盖了所述p掺杂层(5)的背向所述有源区(19)的整个主面(9)。
11.按照权利要求1所述的发光二极管芯片,其中:
所述进行反射的接触金属敷层(6)在其背向所述进行辐射的外延层序列(3)的那一侧具有另一个金属层(20)。
12.按照权利要求11所述的发光二极管芯片,其中:
该另一个金属层(20)具有Au或Al。
13.按照权利要求1所述的发光二极管芯片,其中:
n掺杂层(4)在其背向p掺杂层(5)的主面上设有一个n接触金属敷层(7),该接触金属敷层只覆盖了所述主面的一部分,而且
光耦合输出是从所述芯片(1)经所述n掺杂层(4)的主面的敞露区域和经芯片边缘(14)实现的。
14.按照权利要求1所述的发光二极管芯片,其中:
所述的芯片(1)只具有一个外延层序列(4,5,19),该外延层序列具有一个进行反射的接触金属敷层(6)和另一个接触金属敷层(7)。
15.按照权利要求14所述的发光二极管芯片(1),其中:
所述外延层序列的厚度小于或等于30μm。
16.具有权利要求1所述的发光二极管芯片的发光二极管器件,其中:
所述外延层序列(3;4,5,19)通过进行反射的接触金属敷层(6)被导热地连接到一个散热器上。
17.具有权利要求1所述的发光二极管芯片的发光二极管器件,其中:
所述的芯片(1)被安装到LED外壳(21)的一个导热的芯片安装区(12)上,尤其是被安装到所述LED外壳(21)的一个导体框(11)或导轨(22)上,
而且所述进行反射的接触金属敷层(6)位于所述的芯片安装面(12)上。
18.用于制造权利要求1所述的发光二极管芯片的方法,其中:
(a)在一个生长衬底(2)上生长外延层序列(4,5,19),使得p掺杂层(5)背向所述的生长衬底(2),
(b)在所述的p掺杂层(5)上敷设进行反射的接触金属敷层(6),以及
(c)使所述的生长衬底(2)变薄。
19.用于制造权利要求14所述的发光二极管芯片的方法,其中:
(a)在一个生长衬底(2)上生长外延层序列(4,5,19),使得p掺杂层(5)背向所述的生长衬底(2),
(b)在所述的p掺杂层(5)上敷设进行反射的接触金属敷层(6),以及
(c)去掉所述的生长衬底(2)。
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-
2001
- 2001-05-24 TW TW090112492A patent/TWI292227B/zh not_active IP Right Cessation
- 2001-05-24 TW TW094143365A patent/TWI289944B/zh not_active IP Right Cessation
- 2001-05-28 EP EP01953777A patent/EP1284026A1/de not_active Withdrawn
- 2001-05-28 JP JP2001587491A patent/JP2003534668A/ja active Pending
- 2001-05-28 WO PCT/DE2001/002010 patent/WO2001091195A1/de active Application Filing
- 2001-05-28 CN CNB2006101003144A patent/CN100426544C/zh not_active Expired - Lifetime
- 2001-05-28 CN CNB200510051675XA patent/CN100411205C/zh not_active Expired - Lifetime
- 2001-05-28 CN CNB018129153A patent/CN1252838C/zh not_active Expired - Lifetime
- 2001-05-28 US US10/296,596 patent/US7265392B2/en not_active Expired - Lifetime
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2007
- 2007-05-30 US US11/755,284 patent/US7939844B2/en not_active Expired - Lifetime
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US7265392B2 (en) | 2007-09-04 |
CN1645639A (zh) | 2005-07-27 |
US20030168664A1 (en) | 2003-09-11 |
TWI289944B (en) | 2007-11-11 |
CN100411205C (zh) | 2008-08-13 |
JP2003534668A (ja) | 2003-11-18 |
TW200618361A (en) | 2006-06-01 |
US20070221936A1 (en) | 2007-09-27 |
CN100426544C (zh) | 2008-10-15 |
WO2001091195A1 (de) | 2001-11-29 |
TWI292227B (en) | 2008-01-01 |
CN1443374A (zh) | 2003-09-17 |
US8436393B2 (en) | 2013-05-07 |
JP2012028828A (ja) | 2012-02-09 |
CN1881634A (zh) | 2006-12-20 |
US7939844B2 (en) | 2011-05-10 |
EP1284026A1 (de) | 2003-02-19 |
US20110175058A1 (en) | 2011-07-21 |
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