CN1213174A - 一种芯片封装型半导体器件及其生产方法 - Google Patents
一种芯片封装型半导体器件及其生产方法 Download PDFInfo
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- CN1213174A CN1213174A CN98119391A CN98119391A CN1213174A CN 1213174 A CN1213174 A CN 1213174A CN 98119391 A CN98119391 A CN 98119391A CN 98119391 A CN98119391 A CN 98119391A CN 1213174 A CN1213174 A CN 1213174A
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- lead
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Geometry (AREA)
- Wire Bonding (AREA)
- Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
- Lead Frames For Integrated Circuits (AREA)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
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JP262106/97 | 1997-09-26 | ||
JP9262106A JP2954110B2 (ja) | 1997-09-26 | 1997-09-26 | Csp型半導体装置及びその製造方法 |
Publications (1)
Publication Number | Publication Date |
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CN1213174A true CN1213174A (zh) | 1999-04-07 |
Family
ID=17371129
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
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CN98119391A Pending CN1213174A (zh) | 1997-09-26 | 1998-09-25 | 一种芯片封装型半导体器件及其生产方法 |
Country Status (3)
Country | Link |
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US (1) | US6268652B1 (ja) |
JP (1) | JP2954110B2 (ja) |
CN (1) | CN1213174A (ja) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN1320619C (zh) * | 2002-06-10 | 2007-06-06 | 日东电工株式会社 | 制作半导体器件和其中所用耐热压敏粘结带的方法 |
CN101170071B (zh) * | 2006-10-27 | 2011-08-03 | 三星Techwin株式会社 | 半导体封装和形成半导体封装的导线环的方法 |
CN101202254B (zh) * | 2006-12-13 | 2012-03-28 | 雅马哈株式会社 | 半导体装置及其制造方法 |
Families Citing this family (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP3501281B2 (ja) * | 1999-11-15 | 2004-03-02 | 沖電気工業株式会社 | 半導体装置 |
US7148561B2 (en) * | 2001-03-29 | 2006-12-12 | Siliconware Precision Industries Co., Ltd. | Ball grid array substrate strip with warpage-preventive linkage structure |
JP3920629B2 (ja) * | 2001-11-15 | 2007-05-30 | 三洋電機株式会社 | 半導体装置 |
US7132314B2 (en) * | 2004-05-28 | 2006-11-07 | Texas Instruments Incorporated | System and method for forming one or more integrated circuit packages using a flexible leadframe structure |
DE102004057485B4 (de) * | 2004-11-29 | 2007-10-18 | Infineon Technologies Ag | Leistungshalbleiterbauelement und Verfahren zu dessen Herstellung |
US8269324B2 (en) * | 2008-07-11 | 2012-09-18 | Stats Chippac Ltd. | Integrated circuit package system with chip on lead |
USD934452S1 (en) | 2017-12-04 | 2021-10-26 | Signature Systems Group Llc | Modular flooring tile with cable channels |
CN116441752B (zh) * | 2023-04-27 | 2023-11-21 | 广州丰江微电子有限公司 | 高精度定位引线框架切割系统 |
Family Cites Families (17)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5949416A (en) * | 1991-05-28 | 1999-09-07 | Borland International, Inc. | Method for providing help information for nested functions |
KR930014916A (ko) * | 1991-12-24 | 1993-07-23 | 김광호 | 반도체 패키지 |
JPH0637136A (ja) * | 1992-05-22 | 1994-02-10 | Nec Ic Microcomput Syst Ltd | 半導体装置 |
EP0595021A1 (en) * | 1992-10-28 | 1994-05-04 | International Business Machines Corporation | Improved lead frame package for electronic devices |
KR100292036B1 (ko) * | 1993-08-27 | 2001-09-17 | 윤종용 | 반도체패키지의제조방법및그에 따른반도체패키지 |
US5976912A (en) * | 1994-03-18 | 1999-11-02 | Hitachi Chemical Company, Ltd. | Fabrication process of semiconductor package and semiconductor package |
KR0179803B1 (ko) * | 1995-12-29 | 1999-03-20 | 문정환 | 리드노출형 반도체 패키지 |
JP2859194B2 (ja) * | 1996-01-30 | 1999-02-17 | 九州日本電気株式会社 | プラスチックパッケージ型半導体集積回路及びその製造 方法 |
KR980006174A (ko) * | 1996-06-18 | 1998-03-30 | 문정환 | 버틈 리드 패키지 |
JP3679199B2 (ja) * | 1996-07-30 | 2005-08-03 | 日本テキサス・インスツルメンツ株式会社 | 半導体パッケージ装置 |
JP3012816B2 (ja) * | 1996-10-22 | 2000-02-28 | 松下電子工業株式会社 | 樹脂封止型半導体装置およびその製造方法 |
KR100237051B1 (ko) * | 1996-12-28 | 2000-01-15 | 김영환 | 버텀리드 반도체 패키지 및 그 제조 방법 |
JP3793628B2 (ja) * | 1997-01-20 | 2006-07-05 | 沖電気工業株式会社 | 樹脂封止型半導体装置 |
KR100214561B1 (ko) * | 1997-03-14 | 1999-08-02 | 구본준 | 버틈 리드 패키지 |
US6271582B1 (en) * | 1997-04-07 | 2001-08-07 | Micron Technology, Inc. | Interdigitated leads-over-chip lead frame, device, and method for supporting an integrated circuit die |
US6054754A (en) * | 1997-06-06 | 2000-04-25 | Micron Technology, Inc. | Multi-capacitance lead frame decoupling device |
KR100246587B1 (ko) * | 1997-09-19 | 2000-03-15 | 유무성 | 볼 그리드 어레이 반도체 팩키지 |
-
1997
- 1997-09-26 JP JP9262106A patent/JP2954110B2/ja not_active Expired - Fee Related
-
1998
- 1998-08-31 US US09/144,345 patent/US6268652B1/en not_active Expired - Fee Related
- 1998-09-25 CN CN98119391A patent/CN1213174A/zh active Pending
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN1320619C (zh) * | 2002-06-10 | 2007-06-06 | 日东电工株式会社 | 制作半导体器件和其中所用耐热压敏粘结带的方法 |
CN101170071B (zh) * | 2006-10-27 | 2011-08-03 | 三星Techwin株式会社 | 半导体封装和形成半导体封装的导线环的方法 |
CN101202254B (zh) * | 2006-12-13 | 2012-03-28 | 雅马哈株式会社 | 半导体装置及其制造方法 |
Also Published As
Publication number | Publication date |
---|---|
US6268652B1 (en) | 2001-07-31 |
JPH11102928A (ja) | 1999-04-13 |
JP2954110B2 (ja) | 1999-09-27 |
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