CN1104742C - 底部引线半导体封装及其制造方法 - Google Patents

底部引线半导体封装及其制造方法 Download PDF

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CN1104742C
CN1104742C CN97117011A CN97117011A CN1104742C CN 1104742 C CN1104742 C CN 1104742C CN 97117011 A CN97117011 A CN 97117011A CN 97117011 A CN97117011 A CN 97117011A CN 1104742 C CN1104742 C CN 1104742C
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金明基
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SK Hynix Inc
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Abstract

一种底部引线半导体封装，包括多根底部引线，并有从相应一根底部引线向上延伸弯曲或倾斜的内引线。半导体芯片借助不导体粘合剂贴装于每根底部引线的上表面上，多根导线电连接芯片上的多个芯片焊盘与内引线。模制化合物模制成封装体，该封装体具有多个开口，以使每根底部引线的下表面外露。制造方法包括模制步骤，密封式模制封装，但暴露出底部引线及从相应一根底部引线向上弯曲延伸的内引线的下表面。

Description

底部引线半导体封装及其制造方法
技术领域
本发明涉及一种芯片封装，特别涉及一种改进的底部引线半导体封装(BLP)及其制造方法。
背景技术
普通的现有半导体芯片封装中，有小外形封装(SOP)和其用作电连接通路的外引线穿过封装体侧面暴露出的小外形J引线封装(SOJ)。这种上述常规半导体封装中，封装占印刷电路板的面积变得增加的主要原因是安装过程中从封装体突出的外引线，并由此会在其操作及输送过程中产生质量问题。
图1是安装于印刷电路板上的常规底部引线半导体封装的剖面图。题为“底部引线半导体封装(BLP)”的美国专利5428248(1995年6月27日授权)公开了这种封装，解决了上述问题，该专利已共同转让给本发明的受让人。该封装包括具有多根底部引线11的引线框13。每根引线11的底面与印刷电路板20接触。多根内引线12从相应的一根底部引线11延伸并分别向下弯曲。
半导体芯片15借助粘结剂14贴装在每根底部引线11的上表面上，多根导线16电连接芯片15的芯片焊盘(未示出)与引线框13的内引线12。模制树脂模制导线16、半导体芯片15和引线框13的各引线11，12，形成封装体17。此时，通过封装体17的底面暴露出每根底部引线11的部分，然后用铅(未示出)镀敷底部引线11暴露出的下表面。
该底部引线半导体封装减小了基片占据的面积，省略了会受损伤的外引线。然而，在通过在每根底部引线11的下表面上形成焊料25把封装安装于印刷电路板20上时，因为由于焊料25的缘故底部引线11下表面和封装体17的下表面几乎彼此等平面地形成，所以存在焊料接点(通过焊料给底部引线和印刷电路板间提供电接触)可靠性可题，而且，安装在印刷电路板上的封装可以无需升高焊料25的高度那么高。
这里引入上述参考文献作参考，适于提示附加的或另外的细节、特征和/或技术背景。
发明内容
本发明的目的在于至少解决现有技术中的该问题。
本发明的另一目的是改善焊料接点的可靠性。
本发明再一目的是使安装的封装高度最小化。
为了实现上述目的、优点、和/或特征，本发明提供一种底部引线半导体封装的制造方法，该方法包括以下步骤：利用不导电粘结剂把半导体芯片贴装于引线框的多根底部引线中每根的上表面上，以形成半导体封装，所述引线框包括弯曲和从底部引线向上延伸的多根内引线；利用导线连接芯片与内引线；在每根底部引线和内引线的下表面上贴不导电胶带；模制除了底部引线和内引线的下表面的半导体封装，从而暴露底部引线的和内引线的下表面；及去掉每根底部引线和内引线上的不导电胶带。
还可以由以下封装部分或完全实现本发明，所述封装包括：具有多个键合焊盘的芯片；多根引线，每根皆含具有第一和第二表面的第一和第二部分；把芯片贴装到多根引线上的粘结剂；连接相应键合焊盘与相应引线的多个导电介质；模制芯片、多个导电介质、粘结剂、及多根引线的封装体，其中第一部分的第二表面从封装体暴露出来，封装体包括多个开口，以使第二部分的第二表面从封装体暴露出来。
还可以由另一如下所述器件部分或完全实现本发明，所述器件包括：具有多个键合焊盘的芯片；所述多根引线的每根皆含具有第一和第二表面的第一和第二部分；把芯片贴装到所述多根引线上的粘结剂；连接相应键合焊盘与相应引线的多个导电介质；模制所述芯片、所述多个导电介质、所述粘结剂及所述多根引线的封装体，其中第一部分的第二表面从所述封装体暴露出来，每个开口暴露所述第二部分的所述第二表面。
本发明的其它特点和优点如以下的说明所述，对于本领域的技术人员来说，部分可从说明书中显现，或可以实施本发明获知。特别是所附权利要求书指出的结构将会实现和获得本发明的目的和优点。
附图说明
下面将结合附图详细说明本发明，各附图中类似的标号表示类似的部件，其中：
图1是安装于印刷电路板上的常规底部引线半导体封装的剖面示图；
图2是本发明底部引线半导体封装的剖面示图；
图3是本发明底部引线半导体封装的侧视图；及
图4是安装于印刷电路板上的本发明底部引线半导体封装的剖面示图。
具体实施方式
图2和3分别是本发明底部引线半导体封装的剖面图和侧视图。该封装包括：多根底部引线31，和多根从各底部引线31延伸向上弯曲或倾斜的内引线32。利用不导电粘结剂34，半导体芯片35安装于底部引线31的上表面上。芯片35和内引线32优选通过导线36彼此电连接。可以理解到，也可以使用焊料凸点。环氧树脂模制芯片35，由此形成封装体37。开口38形成于封装体37每侧，以使每根底部引线31和从底部引线31延伸向上弯曲的内引线32的下表面从封装体37中暴露出来。
为了形成该封装，首先制备具有底部引线31和从各底部引线31向上延伸的内引线的引线框33。然后，利用不导电粘结剂34作粘结介质，把半导体芯片35贴装于引线框33的底部引线31的上表面上。导电线36从芯片35电连接到内引线32，并给每根底部引线31上和从底部引线31延伸向上弯曲的内引线32的下表面上贴装不导电胶带(未示出)。
接着，整个封装插入模具(未示出)中，用如环氧树脂等模制材料填满装着该封装的模具，从而形成封装体37。此时，重要的是，不管形成封装体37的模具如何，每根底部引线31和内引线32的下表面皆应外露。下模具表面，即要模制期间其中装有封装的下表面上具有突出结构，这样每根弯曲的内引线32的下表面之下的空间无法填充模制材料。因此，形成了弯曲内引线32之下且沿该引线的开口38。
在模制工艺后，从模具中取出完成的封装体37，从每根底部引线31各下表面上去掉不导电胶带。将内引线32和每根引线31和32下表面去毛刺，从而完成本发明的底部引线半导体封装。
图4是本发明底部引线半导体封装的剖面图，如该图所示，每根底部引线31的下表面皆设置于印刷电路板40上。焊料45流到用于暴露每根内引线32下表面的开口38中，于是内引线32与印刷电路板40借助焊料45接触，从而完成封装在印刷电路板40的安装过程。
如上所述，通过本发明制造底部引线半导体封装的方法，从相应底部引线向上弯曲或倾斜的内引线通过形成于向上弯曲内引线之下的开口暴露出来。焊料45流进该开口中，形成内引线与印刷电路板间的电连接。这种焊料接点在焊料和引线之间具有很宽的接触面积，以用于用焊料填充该开口，在安装于印刷电路板上时封装的高度可以最小化。
上述实施例只是示例性的，并不用于限制本发明。本发明提示容易应用于其它类型的装置中。本发明的说明书只是说明性的，并不用于限定权利要求书的范围。对于本领域的普通技术人员来说，很显然，本发明可以有许多替代、变形和变化。

Claims (15)

1.一种底部引线半导体封装的制造方法，该方法包括以下步骤：
利用不导电粘结剂把半导体芯片贴装于引线框的多根底部引线中每根的上表面上，以形成半导体封装，所述引线框包括弯曲且从底部引线向上延伸的多根内引线；
利用导线连接芯片与内引线；
在每根底部引线和内引线的下表面上贴不导电胶带；
模制除了底部引线的和内引线的下表面以外的半导体封装，从而暴露底部引线和内引线的下表面；及
去掉每根底部引线和内引线上的不导电胶带。
2.一种封装，包括：
具有多个键合焊盘的芯片；
多根引线，每根皆含具有第一和第二表面的第一和第二部分；
把芯片贴装到多根引线上的粘结剂；
连接相应键合焊盘与相应引线的多个导电介质；
模制所述芯片、所述多个导电介质、所述粘结剂及所述多根引线的封装体，其中第一部分的第二表面从封装体暴露出来，所述封装体包括多个开口，以使第二部分的第二表面从封装体暴露出来。
3.如权利要求2的封装，其特征在于，所述第一和第二部分的所述第二表面基本平行。
4.如权利要求2的封装，其特征在于，所述多个导电介质包括金属丝。
5.如权利要求2的封装，其特征在于，所述芯片借助所述粘结剂贴装于所述多根引线的所述第一部分上。
6.如权利要求5的封装，其特征在于，所述多个导电介质连接相应的键合焊盘与所述多根引线的第二部分。
7.如权利要求2的封装，其特征在于，所述多根引线的每根还包括连接所述第一和第二部分的倾斜部分，这样便使所述第一和第二部分是非平面的，所述倾斜部分具有第一和第二表面。
8.如权利要求7的封装，其特征在于，所述封装体模制倾斜部分的第一表面，倾斜部分的第二表面通过每个开口从封装体暴露出来，所述封装体包封所述芯片。
9.一种器件，包括：
具有多个焊盘的印刷电路板；
具有多根引线的芯片封装，所述封装具有多个开口，以暴露所述多根引线的第一和第二部分的下表面；
形成于所述多个开口中的多个焊料接点，用于把所述芯片封装的所述多根引线贴装到印刷电路板的多个焊盘上。
10.如权利要求9的器件，其特征在于，所述芯片封装包括：
具有多个键合焊盘的芯片；
所述多根引线的每根皆含具有第一和第二表面的第一和第二部分；
把芯片贴装到所述多根引线上的粘结剂；
连接相应键合焊盘与相应引线的多个导电介质；
模制所述芯片、所述多个导电介质、所述粘结剂及所述多根引线的封装体，其中第一部分的第二表面从所述封装体暴露出来，每个开口暴露所述第二部分的所述第二表面。
11.如权利要求10的器件，其特征在于，所述焊料接点还形成于所述第一部分的第二表面上。
12.如权利要求10的器件，其特征在于，所述多个导电介质包括金属丝。
13.如权利要求10的器件，其特征在于，所述多根引线的每根还包括连接所述第一和第二部分的倾斜部分，以使所述第一和第二部分是非平面的，所述倾斜部分具有第一和第二表面。
14.如权利要求13的器件，其特征在于，所述封装体模制倾斜部分的第一表面，倾斜部分的第二表面通过每个开口从封装体暴露出来。
15.如权利要求10的器件，其特征在于，所述第一和第二部分的所述第二表面是非平面的。
CN97117011A 1996-12-28 1997-09-23 底部引线半导体封装及其制造方法 Expired - Fee Related CN1104742C (zh)

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JPH10200038A (ja) 1998-07-31
CN1187038A (zh) 1998-07-08

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