KR980006174A - 버틈 리드 패키지 - Google Patents
버틈 리드 패키지 Download PDFInfo
- Publication number
- KR980006174A KR980006174A KR1019960021974A KR19960021974A KR980006174A KR 980006174 A KR980006174 A KR 980006174A KR 1019960021974 A KR1019960021974 A KR 1019960021974A KR 19960021974 A KR19960021974 A KR 19960021974A KR 980006174 A KR980006174 A KR 980006174A
- Authority
- KR
- South Korea
- Prior art keywords
- package
- lead
- pcb
- external terminal
- semiconductor chip
- Prior art date
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Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49541—Geometry of the lead-frame
- H01L23/49548—Cross section geometry
- H01L23/49551—Cross section geometry characterised by bent parts
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- H—ELECTRICITY
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- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49541—Geometry of the lead-frame
- H01L23/49548—Cross section geometry
- H01L23/49551—Cross section geometry characterised by bent parts
- H01L23/49555—Cross section geometry characterised by bent parts the bent parts being the outer leads
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49503—Lead-frames or other flat leads characterised by the die pad
- H01L23/4951—Chip-on-leads or leads-on-chip techniques, i.e. inner lead fingers being used as die pad
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/341—Surface mounted components
- H05K3/3421—Leaded components
- H05K3/3426—Leaded components characterised by the leads
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- H—ELECTRICITY
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- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
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- H01L2224/32012—Structure relative to the bonding area, e.g. bond pad
- H01L2224/32014—Structure relative to the bonding area, e.g. bond pad the layer connector being smaller than the bonding area, e.g. bond pad
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- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
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- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48257—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a die pad of the item
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- H—ELECTRICITY
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- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L24/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
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- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
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- H01—ELECTRIC ELEMENTS
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- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
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- H01L2924/07802—Adhesive characteristics other than chemical not being an ohmic electrical conductor
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- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
- Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Geometry (AREA)
- Manufacturing & Machinery (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
- Lead Frames For Integrated Circuits (AREA)
Abstract
본 발명은 버틈 리드 패키지(BLP: BOTTOM LEAD PACKAGE)에 관한 것으로, 종래의 버틈 리드 패키지는 리드프레임의 외부단자를 몰딩부의 하면과 동일면상에 노출형성 함으로서 피시비 기판에 실장시 접착력이 약하여 파단되는 등의 문제점이 있었다. 본 발명 버틈 리드 패키지는 패키지의 하부에 형성되는 리드프레임의 하단부를 외부로 돌출형성되도록 하여 외부단자를 형성함으로서 피시비 기판에 실장시 접착력이 향상되는 효과가 있고, 패키지와 피시비 기판 사이의 일정공간이 확보되어 외부단자의 접착상태 검사가 용이하며, 패키지의 주변에 대기의 유통이 원할하여 패키지에서 발생하는 열의 냉각이 잘되는 효과가 있다.
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제3도는 본 발명 버틈 리드 패키지의 구조를 보인 것이다.
제3(a)도는 하부를 보인 사시도.
제3(b)도는 종단면도.
제3(c)도는 제3(b)도의 A부 상세도.
Claims (2)
- 반도체 칩과, 그 반도체 칩의 하면에 절연성 접착부재로 부착되는 다수개의 리드프레임과, 상기 반도체 칩과 리드프레임을 연결하는 다수개의 금속와이어와, 상기 리드프레임의 하단부를 “S”형 또는 “⊃”형의 형태로 절곡하여 외부리드를 돌출형성함과 아울러 상기 반도체 칩, 금속와이어를 감싸도록 몰딩부를 형성하여서 구성한 것을 특징으로 하는 버틈 리드 패키지.
- 제1항에 있어서, 상기 절연성 접착부재는 테이프 형태인 것을 특징으로 하는 버틈 리드 패키지.
Priority Applications (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019960021974A KR980006174A (ko) | 1996-06-18 | 1996-06-18 | 버틈 리드 패키지 |
US08/877,563 US5886404A (en) | 1996-06-18 | 1997-06-17 | Bottom lead semiconductor package having folded leads |
DE1997125625 DE19725625C2 (de) | 1996-06-18 | 1997-06-17 | Halbleitergehäuse mit untenliegenden Zuleitungen |
JP15963297A JP2873953B2 (ja) | 1996-06-18 | 1997-06-17 | ボトムリード形半導体パッケージ |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019960021974A KR980006174A (ko) | 1996-06-18 | 1996-06-18 | 버틈 리드 패키지 |
Publications (1)
Publication Number | Publication Date |
---|---|
KR980006174A true KR980006174A (ko) | 1998-03-30 |
Family
ID=19462241
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019960021974A KR980006174A (ko) | 1996-06-18 | 1996-06-18 | 버틈 리드 패키지 |
Country Status (4)
Country | Link |
---|---|
US (1) | US5886404A (ko) |
JP (1) | JP2873953B2 (ko) |
KR (1) | KR980006174A (ko) |
DE (1) | DE19725625C2 (ko) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR20160006608A (ko) * | 2014-07-09 | 2016-01-19 | 신꼬오덴기 고교 가부시키가이샤 | 리드 프레임, 반도체 장치, 및 리드 프레임의 제조 방법 |
Families Citing this family (13)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2954110B2 (ja) * | 1997-09-26 | 1999-09-27 | 九州日本電気株式会社 | Csp型半導体装置及びその製造方法 |
KR100246366B1 (ko) * | 1997-12-04 | 2000-03-15 | 김영환 | 에리어 어레이형 반도체 패키지 및 그 제조방법 |
JP3297387B2 (ja) * | 1998-11-20 | 2002-07-02 | 沖電気工業株式会社 | 半導体装置の製造方法 |
JP2001024027A (ja) * | 1999-07-09 | 2001-01-26 | Oki Electric Ind Co Ltd | 半導体素子、半導体素子の製造方法、半導体装置、半導体装置の製造方法 |
DE19938867C1 (de) * | 1999-08-17 | 2001-01-11 | Siemens Ag | Stanzgitter |
US7262074B2 (en) * | 2002-07-08 | 2007-08-28 | Micron Technology, Inc. | Methods of fabricating underfilled, encapsulated semiconductor die assemblies |
US7202112B2 (en) * | 2004-10-22 | 2007-04-10 | Tessera, Inc. | Micro lead frame packages and methods of manufacturing the same |
EP1659626A1 (en) * | 2004-11-23 | 2006-05-24 | Optimum Care International Tech. Inc. | Lead-on-chip leadframe |
JP5702763B2 (ja) * | 2006-10-04 | 2015-04-15 | ローム株式会社 | 半導体装置 |
JP6092645B2 (ja) * | 2013-02-07 | 2017-03-08 | エスアイアイ・セミコンダクタ株式会社 | 半導体装置 |
JP6621321B2 (ja) * | 2015-12-21 | 2019-12-18 | 日立オートモティブシステムズ株式会社 | 半導体パッケージ及び半導体アセンブリ |
US11069600B2 (en) | 2019-05-24 | 2021-07-20 | Infineon Technologies Ag | Semiconductor package with space efficient lead and die pad design |
JP7479771B2 (ja) * | 2020-10-01 | 2024-05-09 | 三菱電機株式会社 | 半導体装置、半導体装置の製造方法及び電力変換装置 |
Family Cites Families (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR0128251Y1 (ko) * | 1992-08-21 | 1998-10-15 | 문정환 | 리드 노출형 반도체 조립장치 |
JPH06177308A (ja) * | 1992-12-09 | 1994-06-24 | Matsushita Electric Ind Co Ltd | 実装端子 |
US5616953A (en) * | 1994-09-01 | 1997-04-01 | Micron Technology, Inc. | Lead frame surface finish enhancement |
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1996
- 1996-06-18 KR KR1019960021974A patent/KR980006174A/ko not_active Application Discontinuation
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1997
- 1997-06-17 JP JP15963297A patent/JP2873953B2/ja not_active Expired - Fee Related
- 1997-06-17 DE DE1997125625 patent/DE19725625C2/de not_active Expired - Fee Related
- 1997-06-17 US US08/877,563 patent/US5886404A/en not_active Expired - Fee Related
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR20160006608A (ko) * | 2014-07-09 | 2016-01-19 | 신꼬오덴기 고교 가부시키가이샤 | 리드 프레임, 반도체 장치, 및 리드 프레임의 제조 방법 |
Also Published As
Publication number | Publication date |
---|---|
US5886404A (en) | 1999-03-23 |
DE19725625C2 (de) | 1999-08-05 |
JPH1070227A (ja) | 1998-03-10 |
DE19725625A1 (de) | 1998-01-02 |
JP2873953B2 (ja) | 1999-03-24 |
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