CN117524848A - 用于硬掩模及其他图案化应用的高密度低温碳膜 - Google Patents

用于硬掩模及其他图案化应用的高密度低温碳膜 Download PDF

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Publication number
CN117524848A
CN117524848A CN202311477340.9A CN202311477340A CN117524848A CN 117524848 A CN117524848 A CN 117524848A CN 202311477340 A CN202311477340 A CN 202311477340A CN 117524848 A CN117524848 A CN 117524848A
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China
Prior art keywords
substrate
hydrocarbon
diamond
electrostatic chuck
degrees celsius
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CN202311477340.9A
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Inventor
E·文卡塔苏布磊曼聂
S·E·戈特海姆
杨扬
P·曼纳
K·拉马斯瓦米
T·越泽
A·B·玛里克
S·冈迪科塔
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Applied Materials Inc
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Applied Materials Inc
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Publication of CN117524848A publication Critical patent/CN117524848A/zh
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    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02115—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material being carbon, e.g. alpha-C, diamond or hydrogen doped carbon
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    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02263—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
    • H01L21/02271—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
    • H01L21/02274—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition in the presence of a plasma [PECVD]
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    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
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    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
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    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
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    • G03F7/2004—Exposure; Apparatus therefor with visible light or UV light, through an original having an opaque pattern on a transparent support, e.g. film printing, projection printing; by reflection of visible or UV light from an original such as a printed image characterised by the use of a particular light source, e.g. fluorescent lamps or deep UV light
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Abstract

本公开的实施方式大体涉及集成电路的制造。更具体地，本文中描述的实施方式提供用于沉积用于图案化应用的高密度膜的技术。在一个实施方式中，提供一种处理基板的方法。该方法包括使含烃气体混合物流动至处理腔室的处理容积中，该处理腔室具有定位于静电吸盘上的基板。该基板维持在介于约0.5毫托与约10托之间的压力下。该方法还包括通过将第一RF偏压施加于该静电吸盘，在基板层级产生等离子体，以在该基板上沉积类金刚石碳膜。该类金刚石碳膜具有大于1.8g/cc的密度及小于‑500MPa的应力。

Description

用于硬掩模及其他图案化应用的高密度低温碳膜
本申请是申请日为2018年05月15日、申请号为201880030287.9、题为“用于硬掩模及其他图案化应用的高密度低温碳膜”的分案申请。
技术领域
本公开的实施方式大体涉及集成电路的制造。更具体地，本文中描述的实施方式提供用于沉积图案化应用的高密度膜的技术。
背景技术
集成电路已演进至复杂装置中，该等复杂装置可在单个芯片上包括数百万晶体管、电容器及电阻器。芯片设计的演进持续需要更快速电路及更大电路密度。对更快速电路及更大电路密度的需求产生对用以制造此类集成电路的材料的对应需求。具体而言，随着集成电路组件的尺寸减小至亚微米尺度，现在必需使用低电阻率导电材料以及低介电常数绝缘材料以从此类组件获得适合的电性能。
对更大集成电路密度的需求也产生对用于集成电路组件制造的工艺序列的需求。例如，在使用常规光刻技术的工艺序列中，在安置于基板上的材料层堆叠上方形成能量敏感阻剂层。能量敏感阻剂层暴露于图案的图像以形成光阻剂掩模。其后，使用蚀刻工艺将掩模图案移送至堆叠的材料层中的一者或多者。蚀刻工艺中使用的化学蚀刻剂经选择为对于堆叠的材料层与对于能量敏感阻剂的掩模相比具有更大蚀刻选择性。也就是说，化学蚀刻剂以比能量敏感阻剂显著更快速的速率蚀刻材料堆叠的一个或多个层。对阻剂上方的堆叠的一个或多个材料层的蚀刻选择性防止能量敏感阻剂在图案转移结束之前被耗尽。
随着图案尺寸减小，能量敏感阻剂的厚度对应地减小，以便控制图案分辨率。在图案转移步骤期间，归因于受化学蚀刻剂侵蚀，此类薄阻剂层可能不足以对下层材料层进行掩模。通常在能量敏感阻剂层与下层材料层之间使用中间层(例如，氮氧化硅、碳化硅或碳膜)，该中间层被称为硬掩模，由于对化学蚀刻剂的更大阻力而促进图案转移。兼备高蚀刻选择性及高沉积速率的硬掩模材料是期望的。随着临界尺寸(critical dimension；CD)减小，当前硬掩模材料缺少相对于下层材料(例如，氧化物及氮化物)的期望蚀刻选择性，且该等硬掩模材料通常难以沉积。
因而，本领域中需要经改良硬掩模层以及用于沉积经改良的硬掩模层的方法。
发明内容
本公开的实施方式大体涉及集成电路的制造。更具体地，本文中描述的实施方式提供用于沉积用于图案化应用的高密度膜的技术。在一个实施方式中，提供一种处理基板的方法。该方法包括使含烃气体混合物流动至处理腔室的处理容积中，该处理腔室具有定位于静电吸盘上的基板。该基板维持在介于约0.5毫托与约10托之间的压力下。该方法还包括通过将第一RF偏压施加于该静电吸盘，在基板层级产生等离子体，以在该基板上沉积类金刚石碳膜。该类金刚石碳膜具有大于1.8g/cc的密度及小于-500MPa的应力。
在另一实施中，提供一种处理基板的方法。该方法包括使含烃气体混合物流动至处理腔室的处理容积中，该处理腔室具有定位于静电吸盘上的基板。该基板维持在介于约0.5毫托与约10托之间的压力下，且该含烃气体混合物包含乙炔(C2H2)。该方法另外包括在基板层级，通过将第一RF偏压及第二RF偏压施加于该静电吸盘，产生等离子体，从而在该基板上沉积类金刚石碳膜。该类金刚石碳膜具有自约1.8g/cc至约2.5g/cc的密度及自大约-600MPa至大约-300MPa的应力。
在又一实施方式中，提供一种处理基板的方法。该方法包括使含烃气体混合物流动至处理腔室的处理容积中，该处理腔室具有定位于静电吸盘上的基板。该处理容积维持在介于约0.5毫托与约10托之间的压力下。该方法还包括通过将第一RF偏压及第二RF偏压施加于该静电吸盘，在基板层级产生等离子体，以在该基板上沉积类金刚石碳膜。该类金刚石碳膜具有自约1.8g/cc至约2.5g/cc的密度及自大约-1000MPa至大约-100MPa(例如自大约-600MPa至大约-300Mpa)的应力。该方法还包括在该类金刚石碳膜上方形成经图案化光阻剂层。该方法还包括以与该经图案化光阻剂层相对应的图案蚀刻该类金刚石碳。该方法还包括将该图案蚀刻至该基板中。该方法还包括将材料沉积至该类金刚石碳膜的经蚀刻部分中。
在又一实施方式中，提供用作EUV光刻工艺的下层的膜。该膜具有基于膜中碳原子总量的40％与90％之间的sp3杂化碳原子含量；介于1.8g/cc与2.5g/cc之间的密度；及介于150GPa与400GPa之间的弹性模数。在一些实施方式中，该膜具有介于2.0g/cc与2.5g/cc之间的密度及介于180GPa与200GPa之间的弹性模数。在一些实施方式中，该膜具有-600MPa的应力；介于2.0与3.0之间的折射率；及介于0.2与0.3之间的消光系数。
附图说明
为了可以详细理解本公开的上述特征的方式，可参考实施方式得到上文简短概述的实施方式的更具体的描述，在所附附图中描绘实施方式中的一些实施方式。然而，应注意，所附附图仅说明本公开的典型实施方式且因而不应视为对其范围的限制，因为本公开可允许其他同等有效的实施方式。
图1A描绘可用于本文中描述的实施方式的实践的沉积系统的示意图剖视图；
图1B描绘可用于本文中描述的实施方式的实践的另一沉积系统的示意图剖视图；
图2描绘可在用于本文中描述的实施方式的实践的图1A及图1B的设备中使用的静电吸盘的示意性剖视图；
图3描绘根据本公开的一个或多个实施方式的在安置于基板上的膜堆叠上形成类金刚石碳层的方法的流程图；
图4A至图4B描绘根据本公开的一个或多个实施方式的在形成于基板上的膜堆叠上形成类金刚石碳层的序列的一个实施方式；
图5是描绘针对根据本公开的一个或多个实施方式形成的类金刚石碳层的密度随偏压功率变化的图表；
图6是描绘针对根据本公开的一个或多个实施方式形成的类金刚石碳层的应力随偏压功率变化的图表；及
图7是描绘针对根据本公开的一个或多个实施方式形成的类金刚石碳层的密度与应力随压力变化的图表。
为了便于理解，在可能的地方使用相同参考标号指定诸图中共同的相同元素。预期一个实施方式的元素及特征可有利地并入于其他实施方式中而无需进一步的详述。
具体实施方式
以下公开内容描述用于在基板上沉积类金刚石碳膜的技术。在以下描述中及在图1至在图7中阐述某些细节，以提供对本公开的各种实施方式的透彻理解。在以下公开内容中不阐述描述通常与等离子体处理及类金刚石碳膜沉积相关联的公知结构及系统的其他细节，以免不必要地混淆各种实施方式的描述。
诸图中示出的诸多细节、尺寸、角度及其他特征仅说明特定实施方式。因此，在不偏离本公开的精神或范围的情况下，其他实施方式可具有其他细节、组件、尺寸、角度及特征。另外，可在没有如下所述的若干细节的情况下实践本公开的进一步的实施方式。
将在下文参考可使用任何适合的薄膜沉积系统进行的等离子体增强化学气相沉积(PECVD)工艺描述本文中描述的实施方式。适合系统的示例包括可使用处理腔室的/>系统、PRECISION/>系统、/>系统、/>GTTM系统、/>XP PrecisionTM系统、/>SEtm系统、/>处理腔室及MesaTM处理腔室，全部皆可自美国加利福尼亚州圣克拉拉市应用材料公司购得。能够执行PECVD工艺的其他工具也可适于得益于本文中描述的实施方式。另外，实现本文中描述的PECVD工艺的任何系统可用以获得优点。本文中描述的设备描述是说明性的且不应被视为或解释为限制本文中描述的实施方式的范围。
当前用于存储器及其他器件的硬掩模应用大多使用厚碳膜(例如，300纳米至1.5微米)，该等碳膜性质上是非晶的，但其蚀刻选择性不再足以满足日益严格的要求以及即将出现的节点的高深宽比蚀刻。为达成更大蚀刻选择性，需要改良膜的密度及杨氏模数。达成更大蚀刻选择性及改良杨氏模数的主要挑战中的一者是此类膜的高压缩应力，该高压缩应力引起高晶片弓曲，从而使得此类膜不适用于应用。由此，需要碳(类金刚石)膜具有高密度及模数(例如，sp3含量越高，类金刚石密度及模数越大)、高蚀刻选择性，以及低应力(例如，<-500MPa)。
本文中描述的实施方式包括制造具有高密度(例如，>1.8g/cc)、高模数(例如，>150GPa)及低应力(例如，<-500MPa)的经改良方法。与当前图案化膜相比，根据本文中描述的实施方式制造的碳膜性质上是非晶的且具有较高蚀刻选择性及显著更大模数(例如，>150GPa)以及较低应力(<-500MPa)。根据本文中描述的实施方式制造的碳膜不但具有低应力，而且具有高sp3碳含量。一般而言，本文中描述的沉积工艺也与用于硬掩模应用的当前集成方案完全兼容。
在一些实施方式中，可通过化学气相沉积(等离子体增强及/或热)工艺使用含烃气体混合物形成本文中描述的类金刚石碳膜，该等含烃气体混合物包括诸如但不限于C2H2、C3H6、CH4、C4H8、1,3-二甲基金刚烷、二环[2.2.1]七价-2,5-二烯(2,5-降冰片二烯)、金刚合金(C10H16)、降冰片烯(C7H10)或其组合之前驱物。可在范围自摄氏-50度至600摄氏度的温度下进行沉积工艺。可在处理容积中在范围自0.1毫托至10托的压力下进行沉积工艺。含烃气体混合物可另外包括He、Ar、Xe、N2、H2中的任一者，或He、Ar、Xe、N2、H2中的任一者的组合。含烃气体混合物可进一步包括蚀刻剂气体诸如Cl2、CF4及/或NF3以改良膜质量。等离子体(例如，电容耦合等离子体)可由顶部电极及底部电极或侧电极形成。电极可由单通电电极、双通电电极或具有诸如但不限于350KHz、2MHz、13.56MHz、27MHz、40MHz、60MHz及100MHz的多个频率的多个电极形成，该等电极在CVD系统中针对本文中列出的任何或所有反应性气体替代性地或同时用以沉积类金刚石碳薄膜，该等类金刚石碳薄膜用作硬掩模及/或蚀刻终止或任何其他需要平滑碳膜的应用。通过与当前产生膜相比具有高密度及高模数，达成类金刚石碳膜的高蚀刻选择性。不受理论束缚且相信，高密度及高模数是膜中高sp3杂化碳原子含量的结果，该高含量进而可通过低压力及低等离子体功率的组合达成。
在一些实施方式中，经由RPS馈送氢自由基，此引起sp2杂化碳原子的选择性蚀刻，因此增加膜远处sp3杂化碳原子部分，因此进一步增加蚀刻选择性。
在一些实施方式中，在腔室中沉积类金刚石碳膜，其中基板基座维持在10摄氏度下且压力维持在2毫托下，通过将2500瓦特(13.56MHz)偏压施加于静电吸盘在晶片层级产生等离子体。在一些实施方式中，也将2MHz下1000瓦特的额外RF递送至静电吸盘，因此在晶片层级产生双偏压等离子体。
在一些实施方式中，用作EUV光刻工艺的下层的膜可以是本文中描述的任何膜。
在一些实施方式中，用作EUV光刻工艺的下层的膜具有介于基于膜中碳原子总量的40％与90％之间的sp3杂化碳原子含量；介于1.8g/cc与2.5g/cc之间的密度；及介于150GPa与400GPa之间的弹性模数。
在一些实施方式中，用作EUV光刻工艺的下层的膜具有介于2.0g/cc与2.2g/cc之间的密度；及介于约180GPa与约200GPa之间的弹性模数。在一些实施方式中，膜具有约2.1g/cc的密度及约195GPa的弹性模数。
在一些实施方式中，用作用于EUV光刻工艺的下层，具有-600MPa的应力；介于2.0与3.0之间的折射率；及介于0.2与0.3之间的消光系数。
图1A描绘根据本文中描述的实施方式可用以执行类金刚石碳层沉积的基板处理系统132的示意图。基板处理系统132包括耦接至气体面板130的处理腔室100及控制器110。处理腔室100大体包括界定处理容积126的顶部壁124、侧壁101及底部壁122。在处理腔室100的处理容积126中提供基板支撑组件146。基板支撑组件146大体包括受杆160支撑的静电吸盘150。静电吸盘150通常可由铝、陶瓷及其他适合的材料制造。可在处理腔室100内部使用位移机构(未示出)在竖直方向上移动静电吸盘150。
真空泵102耦接至形成于处理腔室100的底部中的端口。真空泵102用以维持处理腔室100中的期望气体压力。真空泵102也自处理腔室100排空后处理气体及工艺的副产物。
基板处理系统132可另外包括用于控制腔室压力的额外设备，例如定位于处理腔室100与真空泵102之间以控制腔室压力的阀(例如，节流阀及隔离阀)。
具有多个孔128的气体分配组件120安置在处理腔室100顶部，静电吸盘150上方。气体分配组件120的孔128用以将处理气体引导至处理腔室100中。孔128可具有不同大小、数目、分布、形状、设计及直径以促进用于不同工艺要求的各种处理气体流。气体分配组件120连接至气体面板130，该气体分配盘允许在处理期间供应各种气体至处理容积126。由自气体分配组件120排出的处理气体混合物形成等离子体，以增强处理气体的热分解，从而使材料沉积在基板190的表面191上。
气体分配组件120与静电吸盘150可形成处理容积126中的一对间隔开的电极。一个或多个RF电源140经由可选的匹配网络138提供偏压电位至气体分配组件120，以有助于在气体分配组件120与静电吸盘150之间产生等离子体。或者，RF电源140及匹配网络138可耦接至气体分配组件120，耦接至静电吸盘150，或耦接至气体分配组件120及静电吸盘150两者，耦接至安置在处理腔室100外部的天线(未示出)。在一些实施方式中，RF电源140可以350KHz、2MHz、13.56MHz、27MHz、40MHz、60MHz或100MHz的频率产生功率。在一个实施方式中，RF电源140可在约50kHz至约13.6MHz的频率下提供介于约100瓦特与约3000瓦特之间的功率。在另一实施方式中，RF电源140可在约50kHz至约13.6MHz的频率下提供介于约500瓦特与约1800瓦特之间的功率。
控制器110包括中央处理器(CPU)112、存储器116及支持电路114，该控制器用以控制工艺序列并且调节来自气体面板130的气流。CPU 112可具有可在工业环境中使用的任何形式的通用计算机处理器。软件例程可存储在内存116中，该内存诸如随机存取内存、只读存储器、软盘或硬盘机，或其他形式的数字存储器。支持电路114常规地耦接至CPU 112且可包括高速缓存、频率电路、输入/输出系统、电源供应器等。经由多种信号电缆处置控制器110与基板处理系统132的各种组件之间的双向通信，该等信号电缆统称为信号总线118，在图1A中说明该等信号电缆中的一些信号电缆。
图1B描绘可用于本文中描述的实施方式的实践的另一基板处理系统180的示意性剖视图。基板处理系统180类似于图1A的基板处理系统132，不同之处为基板处理系统180组装成以使来自气体面板130的处理气体经由侧壁101流经基板190的表面191。另外，图1A中描绘的气体分配组件120替换为电极182。电极182可组装成用于次级电子产生。在一个实施方式中，电极182是含硅电极。
图2描绘可在用于本文中描述的实施方式的实践的图1A及图1B的处理系统中使用的基板支撑组件146的示意性剖视图。参考图2，静电吸盘150可包括加热器组件170，该加热器组件适于控制支撑在静电吸盘150的上表面192上的基板190的温度。加热器组件170可嵌入于静电吸盘150中。可以电阻方式通过将来自加热器电源106的电流施加于加热器组件170来加热静电吸盘150。可经由RF滤波器216耦合加热器电源106。RF滤波器216可用以保护加热器电源106免受RF能量。加热器组件170可由囊封在镍铁铬合金(例如，)保护套管中的镍铬线制成。通过控制器110调节自加热器电源106供应的电流，以控制加热器组件170产生的热量，因此在膜沉积期间将基板190及静电吸盘150维持在实质上恒定温度下。可调整所供应的电流以将静电吸盘150的温度选择性地控制在约-50摄氏度至约600摄氏度之间。
参考图1，温度传感器172(诸如热电偶)可嵌入于静电吸盘150中，该温度传感器以常规方式监控静电吸盘150的温度。控制器110使用所测量的温度控制供应至加热器组件170的电力以将基板维持在所要温度下。
静电吸盘150包括吸附电极210，该吸附电极可以是导电材料网格。吸附电极210可嵌入于静电吸盘150中。吸附电极210耦接至吸附电源212，该吸附电源当被激励时以静电方式将基板190夹持至静电吸盘150的上表面192。
吸附电极210可配置成单极或双极电极，或具有另一适合配置。吸附电极210可经由RF滤波器214耦合至吸附电源212，该吸附电源提供直流(DC)电以用静电方式将基板190紧固至静电吸盘150的上表面192。RF滤波器214防止用以在处理腔室100内形成等离子体的RF电力破坏电气设备或在腔室外部产生电气危害。静电吸盘150可由陶瓷材料诸如AlN或Al2O3制造。或者，静电吸盘150可由聚合物诸如聚酰亚胺、聚醚醚酮(PEEK)、聚芳醚酮(PAEK)等制造。
电力施加系统220耦接至基板支撑组件146。电力施加系统220可包括加热器电源106、吸附电源212、第一射频(RF)电源230及第二RF电源240。电力施加系统220的实施方式可另外包括控制器110及传感器装置250，该传感器装置与控制器110通信且与第一RF电源230及第二RF电源240两者通信。
控制器110也可用以通过施加来自第一RF电源230及第二RF电源240的RF电力，控制来自处理气体的等离子体，以便将材料层沉积于基板190上。
如上所述，静电吸盘150包括吸附电极210，该吸附电极可在一个方面中用以吸附基板190，同时也充当第一RF电极。静电吸盘150也可包括第二RF电极260，并且与吸附电极210一起可施加RF电力来调谐等离子体。第一RF电源230可耦接至第二RF电极260，而第二RF电源240可耦接至吸附电极210。可提供分别用于第一RF电源230及第二RF电源240的第一匹配网络及第二匹配网络。如所示，第二RF电极260可以是导电材料固体金属板。或者，第二RF电极260可以是导电材料网格。
第一RF电源230及第二RF电源240可以相同频率或不同频率产生电力。在一些实施方式中，第一RF电源230及第二RF电源240中的一者或两者可在自约350KHz至约100MHz(例如，350KHz、2MHz、13.56MHz、27MHz、40MHz、60MHz或100MHz)的频率下独立地产生电力。在一些实施方式中，第一RF电源230可在13.56MHz频率下产生电力且第二RF电源240可在2MHz频率下产生电力，或反之亦然。来自第一RF电源230及第二RF电源240中的一者或两者的RF电力可变化，以便调谐等离子体。例如，传感器装置250可用以监控来自第一RF电源230及第二RF电源240中的一者或两者的RF能量。来自传感器装置250的数据可传达至控制器110，且控制器110可用以变化第一RF电源230及第二RF电源240施加的电力。
沉积态(as-deposited)类金刚石碳中sp3杂化碳原子的数量/百分比可因应用不同而不同。在本公开的各种实施方式中，沉积态类金刚石碳膜可含有至少40％、45％、50％、55％、60％、65％、70％、75％、80％或85％的sp3杂化碳原子。沉积态类金刚石碳膜可含有高达45％、50％、55％、60％、65％、70％、75％、80％、85％、或90％的sp3杂化碳原子。沉积态类金刚石碳膜可含有自约50％至约90％的sp3杂化碳原子。沉积态类金刚石碳膜可含有自约60％至约70％的sp3杂化碳原子。
一般而言，以下示例性沉积工艺参数可用以形成沉积态类金刚石碳层。晶片温度可在自约-50℃至约350℃(例如，自约10℃至约100℃；或自约10℃至约50℃)的范围内。腔室压力可在约0.5毫托至约10托(例如，约2毫托至约50毫托；或介于约2毫托与10毫托之间)的腔室压力的范围内。含烃气体混合物的流动速率可自约10sccm至约1000sccm(例如，自约100sccm至约200sccm，或自约150sccm至约200sccm)。稀释气体的流动速率可个别地在自约50sccm至约50000sccm(例如，自约50sccm至约500sccm；或自约50sccm至约100sccm)的范围内。
表I.
类金刚石碳层可沉积达介于约与约/>之间(例如，约/>至约之间；约/>与约/>之间，或约/>至约/>之间)的厚度。上文在表I中描绘的工艺参数提供用于可自美国加利福尼亚州圣克拉拉市应用材料公司购得的沉积腔室中的300mm基板的工艺参数的示例。
沉积态类金刚石碳膜可具有大于2.0，例如大约2.0至大约3.0，诸如2.3的折射率或n值(n(在633nm下))。沉积态类金刚石碳膜可具有大于0.1、例如大约0.2至大致0.3、诸如0.25的消光系数或k值(K(在633nm下))。沉积态类金刚石碳膜可具有小于约-100Mpa，例如自大约-1000MPa至大致-100MPa、自大约-600MPa至大约-300MPa、自大约-600MPa至大约-500MPa，诸如大约-550MPa的应力(MPa)。沉积态类金刚石碳膜可具有大于1.8g/cc、例如大约2.0g/cc或更高、大约2.5g/cc或更高、诸如自约1.8g/cc至约2.5g/cc的密度(g/cc)。沉积态类金刚石碳膜可以具有大于150GPa、例如自约200GPa至约400GPa的弹性模数(GPa)。
图3描绘根据本公开的一个实施方式的在安置于基板上的膜堆叠上形成类金刚石碳层的方法300的流程图。形成于膜堆叠上的类金刚石碳层可用作例如硬掩模，该硬掩模用以在膜堆叠中形成阶梯状结构。图4A至图4B是说明用于根据方法300在安置于基板上的膜堆叠上形成类金刚石碳层的序列的示意性剖视图。虽然下文参考可形成于膜堆叠上以用以在用于三维半导体器件的膜堆叠中制造阶梯状结构的硬掩模层来描述方法300，但方法300也可用在其他装置制造应用中来提供优点。另外，也应理解，图3中描绘的操作可同时执行及/或以不同于图3中描绘的次序的次序执行。.
方法300开始于操作310，该操作为将基板(诸如图4A中描绘的基板400)定位于处理腔室(诸如图1A或图1B中描绘的处理腔室100)中。基板400可以是图1A、图1B及图2中描绘的基板190。基板400可定位于静电吸盘上，例如定位于静电吸盘150的上表面192上。基板400可以是硅类材料或如所需要的任何适合的绝缘材料或导电材料，膜堆叠404安置于基板400上，可用以在膜堆叠404中形成结构402，诸如阶梯状结构。
如在图4A中描绘的示例性实施方式中所示，基板400可具有实质上平坦表面、不平坦表面，或具有形成在该基板上的结构的实质上平坦表面。在基板400上形成膜堆叠404。在一个实施方式中，膜堆叠404可用以在前端或后端工艺中形成栅极结构、接触结构或互连结构。可对膜堆叠404执行方法300，以在该膜堆叠中形成用于内存结构诸如NAND结构中的阶梯状结构。在一个实施方式中，基板400可以是诸如以下的材料：晶态硅(例如，Si<100>或Si<111>)、氧化硅、应变硅、硅锗、经掺杂或未经掺杂多晶硅、经掺杂或未经掺杂硅基板及经图案化或未经图案化基板绝缘体上硅(silicon on insulator；SOI)、掺碳氧化硅、氮化硅、经掺杂硅、锗、砷化镓、玻璃、蓝宝石。基板400可具有各种尺寸诸如200mm、300mm及450mm或其他直径基板，以及矩形或正方形板。除非另作说明，否则在具有200mm直径的基板、具有300mm直径的基板或450mm直径基板上进行本文中描述的实施方式及示例。在其中SOI结构用于基板400的实施方式中，基板400可包括安置于硅晶态基板上的嵌入介电层。在本文中描绘的实施方式中，基板400可以是晶态硅基板。
在一个实施方式中，安置于基板400上的膜堆叠404可具有多个垂直堆叠层。膜堆叠404可包含包括在膜堆叠404中重复形成的第一层(示出为408a1、408a2、408a3、……、408an)及第二层(示出为408b1、408b2、408b3、……、408bn)的成对件。该等成对件包括交替的第一层(示出为408a1、408a2、408a3、……、408an)及第二层(示出为408b1、408b2、408b3、……、408bn)，重复形成第一层及第二层直至达到期望数量的成对的第一层及第二层为止。
膜堆叠404可以是半导体芯片诸如三维存储器芯片的一部分。虽然图4A至图4B中示出第一层(408a1、408a2、408a3、……、408an)及第二层(示出为408b1、408b2、408b3、……、408bn)的三个重复层，但应注意，可视需要利用任何所要数目个重复对的第一层及第二层。
在一个实施方式中，膜堆叠404可用以形成用于三维存储器芯片的多栅极结构。形成于膜堆叠404中的第一层408a1、408a2、408a3、……、408an可以是第一介电层，且第二层408b1、408b2、408b3、……、408bn可以是第二介电层。适合的介电层可用以形成第一层408a1、408a2、408a3、……、408an和第二层408b1、408b2、408b3、……、408bn，包括氧化硅、氮化硅、氮氧化硅、碳化硅、碳氧化硅、氮化钛、氧化物与氮化物的复合物、夹入氮化物层的至少一个或更多个氧化层，以及其组合等等。在一些实施方式中，介电层可以是具有大于4的介电常数的高k材料。高k材料的适合的示例包括二氧化铪(HfO2),、二氧化锆(ZrO2)、氧化铪硅(HfSiO2)、氧化铪铝(HfAlO)、氧化锆硅(ZrSiO2)、二氧化钽(TaO2)、氧化铝、掺铝二氧化铪、铋锶钛及铂锆钛等等。
在一个特定示例中，第一层408a1、408a2、408a3、……、408an是氧化硅层，且第二层408b1、408b2、408b3、……、408bn是安置于第一层408a1、408a2、408a3、……、408an上的氮化硅层或多晶硅层。在一个实施方式中，第一层408a1、408a2、408a3、……、408an的厚度可控制在约与约/>之间，诸如约/>且每一第二层408b1、408b2、408b3、……、408bn的厚度可控制在约/> 与约/>之间，诸如/>膜堆叠404可具有介于约/>与约之间的总厚度。在一个实施方式中，膜堆叠404的总厚度是约3微米至约10微米且将随着技术进步而变化。
应注意，类金刚石碳层可形成于基板400的任何表面或任何部分上，且基板400上存在或不存在膜堆叠404。
在操作320处，将吸附电压施加于静电吸盘以将基板400夹持至静电吸盘。在一些实施方式中，在基板400定位于静电吸盘150的上表面192上的情况下，上表面192在处理期间为基板400提供支撑及夹持。静电吸盘150使基板400紧贴上表面192变平，从而阻止背部沉积。经由吸附电极210提供电偏压至基板400。吸附电极210可与供应偏压电压至吸附电极210的吸附电源212电子通信。在一个实施方式中，吸附电压介于约10伏特与约3000伏特之间。在一个实施方式中，吸附电压介于约100伏特与约2000伏特之间。在一个实施方式中，吸附电压介于约200伏特与1000伏特之间。
在操作320期间，可调节工艺的若干工艺参数。在适于处理300mm基板的一个实施方式中，处理容积中的工艺压力可维持在约0.1毫托至约10托(例如，约2毫托至约50毫托；或约5毫托至约20毫托)下。在适于处理300mm基板的一个实施方式中，处理温度及/或基板温度可维持在约-50摄氏度至约350摄氏度(例如，约0摄氏度至约50摄氏度；或约10摄氏度至约20摄氏度)下。
在一个实施方式中，恒定吸附电压施加于基板400。在一个实施方式中，吸附电压可脉冲至静电吸盘150。在一些实施方式中，背部气体可在施加吸附电压的同时施加于基板400，以控制基板的温度。背部气体可包括但不限于氦(He)、氩(Ar)等等。
在操作330处，通过将第一RF偏压施加于静电吸盘，在基板层级产生等离子体。在基板层级产生的等离子体可在基板与静电吸盘之间的等离子体区域中产生。第一RF偏压可在自约350KHz至约100MHz(例如，350KHz、2MHz、13.56MHz、27MHz、40MHz、60MHz或100MHz)的频率下自约10瓦特至约3000瓦特。在一个实施方式中，在约13.56MHz的频率下、以介于约2500瓦特与约3000瓦特之间的功率提供第一RF偏压。在一个实施方式中，第一RF偏压经由第二RF电极260提供至静电吸盘150。第二RF电极260可与供应偏压电压至第二RF电极260的第一RF电源230电子通信。在一个实施方式中，偏压功率介于约10瓦特与约3000瓦特之间。在一个实施方式中，偏压功率介于约2000瓦特与约3000瓦特之间。在一个实施方式中，偏压功率介于约2500瓦特与约3000瓦特之间。第一RF电源230可在自约350KHz至约100MHz(例如，350KHz、2MHz、13.56MHz、27MHz、40MHz、60MHz或100MHz)的频率下产生功率。
在一些实施方式中，操作330还包含将第二RF偏压施加于静电吸盘。第二RF偏压可在自约350KHz至约100MHz(例如，350KHz、2MHz、13.56MHz、27MHz、40MHz、60MHz或100MHz)的频率下自约10瓦特至约3000瓦特。在一个实施方式中，在约2MHz的频率下、以介于约800瓦特与约1200瓦特之间的功率提供第二RF偏压。在一个实施方式中，第二RF偏压经由吸附电极210提供至基板400。吸附电极210可与供应偏压电压到吸附电极210的第二RF电源240电子通信。在一个实施方式中，偏压功率介于约10瓦特与约3000瓦特之间。在一个实施方式中，偏压功率介于约500瓦特与约1500瓦特之间。在一个实施方式中，偏压功率介于约800瓦特与1200瓦特之间。第二RF电源240可在自约350KHz至约100MHz(例如，350KHz、2MHz、13.56MHz、27MHz、40MHz、60MHz或100MHz)的频率下产生功率。在一个实施方式中，在操作330期间维持在操作320中供应的吸附电压。
在一些实施方式中，在操作330期间，第一RF偏压经由吸附电极210提供至基板400，且第二RF偏压可经由第二RF电极260提供至基板400。在一个实施方式中，第一RF偏压是约2500瓦特(13.56MHz)且第二RF偏压是约1000瓦特(2MHz)。
在操作340期间，含烃气体混合物流动至处理容积126中，以在膜堆叠上形成类金刚石碳膜。含烃气体混合物可自气体面板130经由气体分配组件120或经由侧壁101流动至处理容积126中。含烃气体混合物可包括至少一种烃化合物。含烃气体混合物可另外包括惰性气体、稀释气体、含氮气体、蚀刻剂气体或其组合。烃可以是任何液体或气体，但较佳前驱物在室温下是蒸汽，以简化材料计量、控制及递送至腔室所需的硬件。在一些实施方式中，在操作340期间维持在操作320期间供应的吸附电压。在一些实施方式中，在操作340期间维持在操作320期间确立的工艺条件及在操作330期间形成的等离子体。
在一个实施方式中，烃化合物是气态烃。在一个实施方式中，烃化合物具有通式CxHy，其中x的范围是介于1与20之间，且y的范围是介于1与20之间。适合的烃化合物包括例如C2H2、C3H6、CH4、C4H8、1,3-二甲基金刚烷、二环[2.2.1]七价-2,5-二烯(2,5-降冰片二烯)、金刚合金(C10H16)、降冰片烯(C7H10)或其组合之前驱物。在一个示例中，C2H2归因于形成允许更大表面迁移率的更稳定中间物种而是较佳的。
在一个实施方式中，烃化合物是烷烃(例如，CnH2n+2，其中n介于1与20之间)。适合的烃化合物包括例如烷烃，诸如甲烷(CH4)、乙烷(C2H6),、丙烯(C3H6)、丙烷(C3H8)、丁烷(C4H10)及其异构体异丁烷、戊烷(C5H12)、己烷(C6H14)及其异构体异戊烷及新戊烷、己烷(C6H14)及其异构体2-甲基戊烷、3-甲基戊烷、2,3-二甲基丁烷及2,2-二甲基丁烷，或其组合。
在一个实施方式中，烃化合物是烯烃(例如，CnH2n，其中n介于1与20之间)。适合的烃化合物包括例如烯烃诸如乙炔、乙烯、丙烯、丁烯及其异构体、戊烯及其异构体等，二烯诸如丁二烯、异戊二烯、戊二烯、己二烯，或其组合。额外的适合烃包括例如卤化烯烃诸如一氟乙烯、二氟乙烯、三氟乙烯、四氟乙烯、一氯乙烯、二氯乙烯、三氯乙烯、四氯乙烯、或其组合。
在一个实施方式中，烃化合物是炔烃(例如，CnH2n-2，其中n介于1与20之间)。适合的烃化合物包括例如炔烃，诸如丙炔(C3H4)、丁烯(C4H8)、乙烯基乙炔或其组合。
在一个实施方式中，烃化合物是芳烃化合物，诸如苯、苯乙烯、甲苯、二甲苯、乙苯、苯乙酮、苯甲酸甲酯、乙酸苯酯、酚、甲酚、呋喃等、α-松油烯、异丙基甲苯、1,1,3,3,-四甲基丁基苯、三级丁基醚、三级丁基乙烯、甲基丙烯酸甲酯及三级丁基糠基醚、具有化学式C3H2及C5H4的化合物、包括一氟苯、二氟苯、四氟苯、六氟苯的卤化芳族化合物，或其组合。
在一些实施方式中，含烃气体混合物另外包含一或多种稀释气体。适合的稀释气体诸如氦(He)、氩(Ar)、氙(Xe)、氢(H2)、氮(N2)、氨(NH3)或其组合等等可视需要添加至气体混合物。Ar、He及N2用以控制类金刚石碳层的密度及沉积速率。在一些情形下，如下文所论述，添加N2及/或NH3可用以控制类金刚石碳层的氢比。或者，可在沉积期间不使用稀释气体。
在一些实施方式中，含烃气体混合物另外包含一或多种含氮气体。适合的含氮化合物包括例如吡啶、脂肪胺、胺、腈、氨及类似化合物。
在一些实施方式中，含烃气体混合物另外包含惰性气体。在一些实施方式中，惰性气体诸如氩(Ar)及/或氦(He)可与含烃气体混合物一起供应至处理容积126中。其他惰性气体诸如氮(N2)及氧化氮(NO)也可用以控制类金刚石碳层的密度及沉积速率。另外，可对含烃气体混合物添加多种其他处理气体以修改类金刚石碳材料的性质。在一个实施方式中，其他处理气体可以是活性气体，诸如氢(H2)、氨(NH3)、氢(H2)与氮(N2)的混合物，或其组合。添加H2及/或NH3可用以控制经沉积类金刚石碳层的氢比(例如，碳与氢之比)。类金刚石碳膜中存在的氢比提供对层性质诸如反射率的控制。
在一些实施方式中，含烃气体混合物另外包含蚀刻剂气体。适合的蚀刻剂气体包括氯(Cl2)、四氟化碳(CF4)、三氟化氮(NF3)、或其组合。不受理论束缚而相信，蚀刻剂气体选择性地蚀刻来自膜的sp2杂化碳原子，因此增加膜中sp3杂化碳原子的小部分，此增加膜的蚀刻选择性。
在一些实施方式中，在于操作340期间在基板上形成类金刚石碳层412之后，类金刚石碳层412暴露于氢自由基。在一些实施方式中，类金刚石碳层在操作340的沉积工艺期间暴露于氢自由基。在一些实施方式中，氢自由基形成于RPS中且递送至处理区域。不受理论束缚而相信，使类金刚石碳层暴露于氢自由基导致sp2杂化碳原子的选择性蚀刻，因此增加膜的sp3杂化碳原子的小部分，因此增加蚀刻选择性。
在操作350处，在于基板上形成类金刚石碳层412之后，对基板解除吸附。在操作350期间，关断吸附电压。切断活性气体且视情况自处理腔室清除活性气体。在一个实施方式中，在操作350期间，减小RF功率(例如，约200W)。视情况，控制器110监控阻抗改变以判定静电电荷是否经由RF路径消散至地面。一旦基板自静电吸盘解除吸附，便自处理腔室清除剩余气体。抽空处理腔室，且在升举销上向上移动基板并且移送出腔室。
在于基板上形成类金刚石碳层412之后，类金刚石碳层412可在蚀刻工艺中用作图案化掩模以形成三维结构，诸如阶梯状结构。可使用标准光阻剂图案化技术图案化类金刚石碳层412。可在类金刚石碳层412上方形成经图案化光阻剂(未示出)。可以与经图案化光阻剂层相对应的图案蚀刻类金刚石碳层412，随后将该图案蚀刻至基板400中。材料可沉积至类金刚石碳层412的经蚀刻部分中。可使用包含过氧化氢及硫酸的溶液移除类金刚石碳层412。一种包含过氧化氢及硫酸的示例性溶液被称为皮拉涅斯(Piranha)溶液或皮拉涅斯蚀刻液。也可使用含有氧及卤素(例如，氟或氯)例如Cl2/O2、CF4/O2、Cl2/O2/CF4的蚀刻化学品移除类金刚石碳层412。可通过化学机械研磨(CMP)工艺移除类金刚石碳层412。
示例：
提供以下非限制性示例以进一步说明本文中描述的实施方式。然而，该等示例不意欲包括全部的且不意欲限制本文中描述的实施方式的范围。
在一个实施方式中，通过在具有Ar和/或He作为稀释气体的CVD反应器中，在10摄氏度温度下流动150sccm C2H2及100sccm He作为处理气体，经由基板基座(静电吸盘)施加2500瓦特RF(13.56MHz)电力及1000瓦特(2MHz)，制造本公开的低应力、高密度类金刚石碳膜。所得的类金刚石碳膜具有1.94g/cc的密度及-350MPa的应力以及大于现有非晶碳膜的蚀刻选择性。
表II.
图5是描绘针对根据本公开的一个或多个实施方式形成的类金刚石碳层的密度随偏压功率变化的图表500。图表500描绘针对在2MHz的频率及13.56MHz的频率下沉积的类金刚石碳膜的密度随偏压功率变化。y轴表示沉积膜的密度(g/cc)，且x轴表示偏压功率(瓦特)。如在图5中所说明，在极大程度上，随着偏压功率增加，沉积态膜的密度也增加。
图6是描绘针对根据本公开的一个或多个实施方式形成的类金刚石碳层的应力随偏压功率变化的图表600。图表600描绘针对在2MHz的频率及13.56MHz的频率下沉积的类金刚石碳膜的应力随偏压功率变化。y轴表示沉积膜的应力(MPa)，且x轴表示偏压功率(瓦特)。如在图6中所说明，在极大程度上，随着偏压功率增加，沉积态膜的应力也增加。
图7是描绘针对根据本公开的一个或多个实施方式形成的类金刚石碳层的密度及应力随压力变化的图表700。y轴表示密度沉积膜的密度(g/cc)及应力(MPa)，且x轴表示工艺压力(毫托)。如在图7中所说明，较低压力产出略微较高密度，且较低应力及较高压力产出较大压缩应力。
极紫外线(“EUV”)图案化方案
当在极紫外线(“EUV”)图案化方案中使用含金属光阻剂时，下层的选择对于防止半导体器件中的纳米失效(例如，桥接缺陷及间距缺陷)是关键的。用于EUV图案化(光刻)方案的常规下层是旋涂碳(spin on carbon；SOC)材料。然而，在图案化期间，金属(诸如锡)例如扩散穿过SOC材料，导致半导体器件中的纳米失效。此类纳米失效往往会减小、劣化及妨碍半导体性能。
本文中描述的高密度碳膜另一方面具有优良膜质量，诸如经改良硬度及密度。此类硬度及密度允许高密度碳膜充当防止金属渗入的较坚固阻障层并且防止且至少比常规SOC膜在更大程度上减少纳米失效。
在一些实施方式中，提供用作极紫外线(“EUV”)光刻工艺的下层的膜。在一些实施方式中，该膜(和/或沉积态膜)具有以下特性中的一者或多者：
1)基于沉积态膜中碳原子总量的至少40％、45％、50％、55％、60％、65％、70％、75％、80％或85％的sp3杂化碳原子的数量/百分比(即，sp3杂化碳原子含量)。在这些或其他实施方式中，sp3杂化碳原子的数量/百分比高达基于沉积态膜中的碳原子总量的45％、50％、55％、60％、65％、70％、75％、80％、85或90％。在这些或其他实施方式中，sp3杂化碳原子数量/百分比是基于沉积态膜中碳原子总量的自约50％至约90％(诸如自约60％至约70％)。
2)介于约与约/>之间(例如，介于约/>至约/>之间，诸如介于约/>与约/>之间)的厚度。或者，介于约/>与约/>之间的厚度。
3)大于2.0、例如大约2.0至大约3.0、诸如2.3的折射率或n值(n(在633nm下)。
4)大于0.1、例如大约0.2至大约0.3、诸如0.25的消光系数或k值(K(在633nm))。
5)小于约-300MPa、例如自大约-600至大约-300MPa、自大约-600MPa至大约-500MPa、诸如大约-550MPa的应力(MPa)。
6)大于1.8g/cc、例如大约2.0g/cc或更高、大约2.5g/cc或更高、诸如自约1.8g/cc至约2.5g/cc的密度(g/cc)。
7)大于150GPa、例如自约200GPa至约400GPa的弹性模数(GPa)。
在一些实施方式中，用作EUV光刻工艺的下层的膜可以是本文中描述的任何膜。
在一些实施方式中，用作EUV光刻工艺的下层的膜具有介于基于膜中碳原子总量的40％与90％之间的sp3杂化碳原子含量；介于1.8g/cc与2.5g/cc之间的密度；及介于150GPa与400GPa之间的弹性模数。
在一些实施方式中，用作EUV光刻工艺的下层的膜具有介于2.0g/cc与2.2g/cc之间的密度；及介于约180GPa与约200GPa之间的弹性模数。在一些实施方式中，膜具有约2.1g/cc的密度及约195GPa的弹性模数。
在一些实施方式中，用作EUV光刻工艺的下层，具有-600MPa的应力；介于2.0与3.0之间的折射率；及介于0.2与0.3之间的消光系数。
因此，提供用于形成类金刚石碳硬掩模层的方法及设备，该硬掩模层可用以形成用于制造半导体器件的三维堆叠的阶梯状结构。通过利用具有期望稳健膜性质及蚀刻选择性的类金刚石硬掩模层，可获得在膜堆叠中形成的所得结构的经改良尺寸及经改良轮廓控制，且可增强用于半导体器件的三维堆叠的应用中的芯片装置的电性能。
概括地，本公开的一些益处提供用于在基板上沉积类金刚石硬掩模膜的工艺。典型PECVD硬掩模膜具有极低杂化sp3原子百分比，以及由此低模数及低蚀刻选择性。在本文中描述的一些实施方式中，低工艺压力(毫托对比托)及底部驱动等离子体实现具有大约60％或更大杂化sp3原子的膜制造，此引起较之先前可用的硬掩模膜的蚀刻选择性改良。另外，在低基板温度下执行本文中描述的一些实施方式，此实现在比当前可能的温度显著更低的温度下沉积其他介电膜，开辟具有当前CVD无法解决的低热预算的应用。另外，本文中描述的一些实施方式可用作EUV光刻工艺的下层。
当介绍本公开的元素或其示例性方面或实施方式时，冠词“一(a/an)”、“该(the)”及“所述(said)”意欲表示存在该等元素中的一者或多者。
术语“包含”、“包括”及“具有”意欲是包括性的且意指可存在除了所列元素以外的额外元素。
虽然前文针对本公开的实施方式，但可在不背离本公开的基本范围的情况下，设计本公开的其他实施方式及进一步的实施方式，且本公开的范围是由所附权利要求书确定。

Claims (18)

1.一种处理基板的方法，包含以下步骤：
使含烃化合物气体混合物流动至处理腔室的处理容积中，所述处理腔室具有定位于静电吸盘上的基板，其中所述处理容积维持在介于0.5毫托与10毫托之间的压力下并且所述含烃化合物气体混合物包括含烃化合物前驱物和蚀刻剂气体；
通过将第一RF偏压施加于所述静电吸盘，在所述处理容积内产生等离子体，以从所述含烃化合物气体混合物在所述基板上沉积碳膜，在自350KHz至100MHz的频率下、以介于2500瓦特与3000瓦特之间的功率提供所述第一RF偏压，所述碳膜包含至少50％的sp3杂化碳原子，其中所述基板维持在自-50摄氏度至350摄氏度的温度下。
2.如权利要求1所述的方法，其中所述蚀刻剂气体包含Cl2、CF4或NF3中的一者或多者。
3.如权利要求2所述的方法，其中所述烃化合物是烷烃。
4.如权利要求3所述的方法，其中所述烃化合物包括甲烷、乙烷、丙烯、丙烷、丁烷、异丁烷、戊烷、己烷、异戊烷、新戊烷、己烷、2-甲基戊烷、3-甲基戊烷、2,3-二甲基丁烷以及2,2-二甲基丁烷中的一者或组合。
5.如权利要求1所述的方法，其中存在至少75％的sp3杂化碳原子。
6.如权利要求1所述的方法，其中所述基板的温度维持在0摄氏度至50摄氏度下。
7.如权利要求1所述的方法，其中所述含烃化合物气体混合物还包括一种或多种稀释气体。
8.如权利要求7所述的方法，其中所述一种或多种稀释气体包括氦、氩、氙、氢、氮、氨或其组合。
9.一种处理基板的方法，包含以下步骤：
使含烃化合物气体混合物流动至处理腔室的处理容积中，所述处理腔室具有定位于静电吸盘上的基板，其中所述静电吸盘具有吸附电极以及与所述吸附电极分开的RF电极，其中所述处理容积维持在介于0.5毫托与10毫托之间的压力下并且所述含烃化合物气体混合物包括含烃化合物前驱物、稀释气体和蚀刻剂气体；
通过将第一RF偏压施加于所述静电吸盘，在所述处理容积内产生等离子体，以从所述含烃化合物混合物在所述基板上沉积碳膜，在自350KHz至100MHz的频率下、以介于2500瓦特与3000瓦特之间的功率提供所述第一RF偏压，所述碳膜包含至少50％的sp3杂化碳原子。
10.如权利要求9所述的方法，其中所述基板维持在自-50摄氏度至350摄氏度的温度下。
11.如权利要求9所述的方法，其中所述蚀刻剂气体包含Cl2、CF4或NF3中的一者或多者。
12.如权利要求9所述的方法，其中所述烃化合物是烷烃。
13.如权利要求12所述的方法，其中所述烃化合物包括甲烷、乙烷、丙烯、丙烷、丁烷、异丁烷、戊烷、己烷、异戊烷、新戊烷、己烷、2-甲基戊烷、3-甲基戊烷、2,3-二甲基丁烷以及2,2-二甲基丁烷中的一者或其组合。
14.如权利要求9所述的方法，其中存在至少75％的sp3杂化碳原子。
15.如权利要求9所述的方法，其中所述基板的温度维持在0摄氏度至50摄氏度下。
16.一种处理基板的方法，包含以下步骤：
使含烃化合物气体混合物流动至处理腔室的处理容积中，所述处理腔室具有定位于静电吸盘上的基板，其中所述处理容积维持在介于0.5毫托与10毫托之间的压力下并且所述含烃化合物气体混合物包括含烃化合物前驱物和蚀刻剂气体，所述含烃化合物前驱物选自由以下各项组成的群组：C2H2、C3H6、CH4、C4H8、二环[2.2.1]七价-2,5-二烯(2,5-降冰片二烯)、降冰片烯(C7H10)及其组合；
通过将第一RF偏压施加于所述静电吸盘，在所述处理容积内产生等离子体，以从所述含烃化合物混合物在所述基板上沉积类金刚石碳膜，在自350KHz至100MHz的频率下、以介于2500瓦特与3000瓦特之间的功率提供所述第一RF偏压，并且其中所述基板维持在自-50摄氏度至350摄氏度的温度下，其中所述类金刚石碳膜包含至少50％的sp3杂化碳原子，具有自1.8g/cc至2.5g/cc的密度及自-600MPa至-300MPa的应力。
17.如权利要求16所述的方法，其中所述蚀刻剂气体包含Cl2、CF4或NF3中的一者或多者。
18.如权利要求16所述的方法，其中所述类金刚石碳膜包含至少75％的sp3杂化碳原子，并且在所述类金刚石碳膜的沉积期间，所述基板的温度维持在0摄氏度至50摄氏度下。
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