CN1173394C - 制造半导体集成电路器件的方法 - Google Patents
制造半导体集成电路器件的方法 Download PDFInfo
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- CN1173394C CN1173394C CNB991270827A CN99127082A CN1173394C CN 1173394 C CN1173394 C CN 1173394C CN B991270827 A CNB991270827 A CN B991270827A CN 99127082 A CN99127082 A CN 99127082A CN 1173394 C CN1173394 C CN 1173394C
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- silicon oxide
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8232—Field-effect technology
- H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
- H01L21/8238—Complementary field-effect transistors, e.g. CMOS
- H01L21/823878—Complementary field-effect transistors, e.g. CMOS isolation region manufacturing related aspects, e.g. to avoid interaction of isolation region with adjacent structure
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/76224—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials
- H01L21/76232—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials of trenches having a shape other than rectangular or V-shape, e.g. rounded corners, oblique or rounded trench walls
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8232—Field-effect technology
- H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
- H01L21/823481—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type isolation region manufacturing related aspects, e.g. to avoid interaction of isolation region with adjacent structure
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B12/00—Dynamic random access memory [DRAM] devices
- H10B12/01—Manufacture or treatment
- H10B12/02—Manufacture or treatment for one transistor one-capacitor [1T-1C] memory cells
- H10B12/03—Making the capacitor or connections thereto
- H10B12/033—Making the capacitor or connections thereto the capacitor extending over the transistor
- H10B12/0335—Making a connection between the transistor and the capacitor, e.g. plug
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B12/00—Dynamic random access memory [DRAM] devices
- H10B12/01—Manufacture or treatment
- H10B12/02—Manufacture or treatment for one transistor one-capacitor [1T-1C] memory cells
- H10B12/05—Making the transistor
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B12/00—Dynamic random access memory [DRAM] devices
- H10B12/30—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
- H10B12/31—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells having a storage electrode stacked over the transistor
- H10B12/315—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells having a storage electrode stacked over the transistor with the capacitor higher than a bit line
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/28008—Making conductor-insulator-semiconductor electrodes
- H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
- H01L21/28026—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor
- H01L21/28035—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the final conductor layer next to the insulator being silicon, e.g. polysilicon, with or without impurities
- H01L21/28044—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the final conductor layer next to the insulator being silicon, e.g. polysilicon, with or without impurities the conductor comprising at least another non-silicon conductive layer
- H01L21/28061—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the final conductor layer next to the insulator being silicon, e.g. polysilicon, with or without impurities the conductor comprising at least another non-silicon conductive layer the conductor comprising a metal or metal silicide formed by deposition, e.g. sputter deposition, i.e. without a silicidation reaction
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/49—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
- H01L29/4916—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET the conductor material next to the insulator being a silicon layer, e.g. polysilicon doped with boron, phosphorus or nitrogen
- H01L29/4925—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET the conductor material next to the insulator being a silicon layer, e.g. polysilicon doped with boron, phosphorus or nitrogen with a multiple layer structure, e.g. several silicon layers with different crystal structure or grain arrangement
- H01L29/4941—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET the conductor material next to the insulator being a silicon layer, e.g. polysilicon doped with boron, phosphorus or nitrogen with a multiple layer structure, e.g. several silicon layers with different crystal structure or grain arrangement with a barrier layer between the silicon and the metal or metal silicide upper layer, e.g. Silicide/TiN/Polysilicon
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66568—Lateral single gate silicon transistors
- H01L29/66575—Lateral single gate silicon transistors where the source and drain or source and drain extensions are self-aligned to the sides of the gate
- H01L29/6659—Lateral single gate silicon transistors where the source and drain or source and drain extensions are self-aligned to the sides of the gate with both lightly doped source and drain extensions and source and drain self-aligned to the sides of the gate, e.g. lightly doped drain [LDD] MOSFET, double diffused drain [DDD] MOSFET
Abstract
Description
Claims (8)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP374881/1998 | 1998-12-28 | ||
JP37488198A JP3955404B2 (ja) | 1998-12-28 | 1998-12-28 | 半導体集積回路装置の製造方法 |
Related Child Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CNA2004100598420A Division CN1553494A (zh) | 1998-12-28 | 1999-12-28 | 半导体集成电路器件 |
Publications (2)
Publication Number | Publication Date |
---|---|
CN1258933A CN1258933A (zh) | 2000-07-05 |
CN1173394C true CN1173394C (zh) | 2004-10-27 |
Family
ID=18504590
Family Applications (2)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CNB991270827A Expired - Fee Related CN1173394C (zh) | 1998-12-28 | 1999-12-28 | 制造半导体集成电路器件的方法 |
CNA2004100598420A Pending CN1553494A (zh) | 1998-12-28 | 1999-12-28 | 半导体集成电路器件 |
Family Applications After (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CNA2004100598420A Pending CN1553494A (zh) | 1998-12-28 | 1999-12-28 | 半导体集成电路器件 |
Country Status (7)
Country | Link |
---|---|
US (5) | US6544839B1 (zh) |
JP (1) | JP3955404B2 (zh) |
KR (2) | KR100676365B1 (zh) |
CN (2) | CN1173394C (zh) |
MY (1) | MY129570A (zh) |
SG (1) | SG77721A1 (zh) |
TW (1) | TW472340B (zh) |
Families Citing this family (27)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2001185552A (ja) * | 1999-12-27 | 2001-07-06 | Hitachi Ltd | 半導体集積回路装置およびその製造方法 |
JP4592193B2 (ja) | 2001-02-06 | 2010-12-01 | ルネサスエレクトロニクス株式会社 | 半導体装置の製造方法 |
CN1331238C (zh) * | 2001-09-19 | 2007-08-08 | 株式会社东芝 | 半导体装置及其制造方法 |
TW200421560A (en) * | 2003-04-10 | 2004-10-16 | Macronix Int Co Ltd | Method for improvement of edge breakdown caused by edge electrical field at a tunnel oxide of a high-density flash memory by a shielded bird's beak |
JP4825402B2 (ja) | 2004-01-14 | 2011-11-30 | ルネサスエレクトロニクス株式会社 | 半導体装置の製造方法 |
JP5017771B2 (ja) * | 2004-08-20 | 2012-09-05 | 日本電気株式会社 | 相補型電界効果型トランジスタ、および電界効果型トランジスタの製造方法 |
KR20060087875A (ko) * | 2005-01-31 | 2006-08-03 | 주식회사 하이닉스반도체 | 스텝게이트를 갖는 반도체소자 및 그의 제조 방법 |
US7238564B2 (en) * | 2005-03-10 | 2007-07-03 | Taiwan Semiconductor Manufacturing Company | Method of forming a shallow trench isolation structure |
JP2006332404A (ja) * | 2005-05-27 | 2006-12-07 | Seiko Epson Corp | 半導体装置の製造方法及び半導体装置 |
KR100720510B1 (ko) * | 2005-11-18 | 2007-05-22 | 동부일렉트로닉스 주식회사 | 반도체 소자의 트랜지스터 및 그 형성방법 |
KR100660327B1 (ko) * | 2005-11-18 | 2006-12-22 | 동부일렉트로닉스 주식회사 | 반도체 소자의 트랜지스터 및 그 형성방법 |
US7506450B2 (en) * | 2006-06-30 | 2009-03-24 | The Stanley Works | Adhesive mount for a leveling device and a leveling device |
KR100764745B1 (ko) * | 2006-08-31 | 2007-10-08 | 삼성전자주식회사 | 반원통형 활성영역을 갖는 반도체 장치 및 그 제조 방법 |
JP4571116B2 (ja) * | 2006-11-24 | 2010-10-27 | ルネサスエレクトロニクス株式会社 | 半導体集積回路装置の製造方法 |
KR101576203B1 (ko) * | 2010-01-18 | 2015-12-11 | 삼성전자주식회사 | 최적화된 채널 영역을 갖는 모스 트랜지스터들을 구비하는 반도체 소자들 및 그 제조방법들 |
KR101145334B1 (ko) * | 2010-05-31 | 2012-05-14 | 에스케이하이닉스 주식회사 | 반도체 장치 제조방법 |
US20130043513A1 (en) * | 2011-08-19 | 2013-02-21 | United Microelectronics Corporation | Shallow trench isolation structure and fabricating method thereof |
CN103377991B (zh) * | 2012-04-18 | 2016-02-17 | 中芯国际集成电路制造(上海)有限公司 | 沟槽的形成方法 |
JP2016018937A (ja) | 2014-07-10 | 2016-02-01 | ルネサスエレクトロニクス株式会社 | 半導体装置の製造方法 |
KR102318393B1 (ko) * | 2015-03-27 | 2021-10-28 | 삼성전자주식회사 | 전계 효과 트랜지스터를 포함하는 반도체 소자 |
JP7055087B2 (ja) * | 2018-11-07 | 2022-04-15 | 三菱電機株式会社 | 半導体装置およびその製造方法 |
TWI730725B (zh) * | 2020-04-15 | 2021-06-11 | 力晶積成電子製造股份有限公司 | 半導體結構以及積體電路及半導體結構 |
US11469302B2 (en) | 2020-06-11 | 2022-10-11 | Atomera Incorporated | Semiconductor device including a superlattice and providing reduced gate leakage |
TWI789780B (zh) * | 2020-06-11 | 2023-01-11 | 美商安托梅拉公司 | 包含超晶格且提供低閘極漏電之半導體元件及相關方法 |
US11569368B2 (en) * | 2020-06-11 | 2023-01-31 | Atomera Incorporated | Method for making semiconductor device including a superlattice and providing reduced gate leakage |
US11626397B2 (en) | 2020-08-28 | 2023-04-11 | Sandisk Technologies Llc | Gate material-based capacitor and resistor structures and methods of forming the same |
US11322597B2 (en) * | 2020-08-28 | 2022-05-03 | Sandisk Technologies Llc | Gate material-based capacitor and resistor structures and methods of forming the same |
Family Cites Families (37)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4599789A (en) * | 1984-06-15 | 1986-07-15 | Harris Corporation | Process of making twin well VLSI CMOS |
JPS632371A (ja) | 1986-06-23 | 1988-01-07 | Hitachi Ltd | 半導体装置 |
US5298450A (en) | 1987-12-10 | 1994-03-29 | Texas Instruments Incorporated | Process for simultaneously fabricating isolation structures for bipolar and CMOS circuits |
JPH02260660A (ja) | 1989-03-31 | 1990-10-23 | Toshiba Corp | Mos型半導体装置の製造方法 |
EP0589124B1 (en) * | 1992-09-23 | 1999-01-07 | Co.Ri.M.Me. | Method for eliminating the bird's beak from selective oxidations of semiconductor electronic devices |
US5358891A (en) | 1993-06-29 | 1994-10-25 | Intel Corporation | Trench isolation with planar topography and method of fabrication |
JP2955459B2 (ja) * | 1993-12-20 | 1999-10-04 | 株式会社東芝 | 半導体装置の製造方法 |
US5447884A (en) * | 1994-06-29 | 1995-09-05 | International Business Machines Corporation | Shallow trench isolation with thin nitride liner |
EP0773582A3 (en) | 1995-11-13 | 1999-07-14 | Texas Instruments Incorporated | Method of forming a trench isolation structure in an integrated circuit |
US5899726A (en) * | 1995-12-08 | 1999-05-04 | Advanced Micro Devices, Inc. | Method of forming oxide isolation in a semiconductor device |
KR100242466B1 (ko) | 1996-06-27 | 2000-02-01 | 김영환 | 채널스탑이온주입에 따른 좁은폭효과 방지를 위한 소자분리 구조를 갖는 반도체장치 및 그 제조방법 |
US6033969A (en) * | 1996-09-30 | 2000-03-07 | Taiwan Semiconductor Manufacturing Co., Ltd. | Method of forming a shallow trench isolation that has rounded and protected corners |
US5902128A (en) * | 1996-10-17 | 1999-05-11 | Micron Technology, Inc. | Process to improve the flow of oxide during field oxidation by fluorine doping |
US5780346A (en) * | 1996-12-31 | 1998-07-14 | Intel Corporation | N2 O nitrided-oxide trench sidewalls and method of making isolation structure |
US5920787A (en) * | 1997-01-16 | 1999-07-06 | Vlsi Technology, Inc. | Soft edge induced local oxidation of silicon |
TW350122B (en) * | 1997-02-14 | 1999-01-11 | Winbond Electronics Corp | Method of forming a shallow groove |
JPH10303289A (ja) * | 1997-04-30 | 1998-11-13 | Hitachi Ltd | 半導体集積回路装置の製造方法 |
TW388100B (en) * | 1997-02-18 | 2000-04-21 | Hitachi Ulsi Eng Corp | Semiconductor deivce and process for producing the same |
US5910018A (en) * | 1997-02-24 | 1999-06-08 | Winbond Electronics Corporation | Trench edge rounding method and structure for trench isolation |
US5770504A (en) * | 1997-03-17 | 1998-06-23 | International Business Machines Corporation | Method for increasing latch-up immunity in CMOS devices |
US5863827A (en) * | 1997-06-03 | 1999-01-26 | Texas Instruments Incorporated | Oxide deglaze before sidewall oxidation of mesa or trench |
US5930644A (en) * | 1997-07-23 | 1999-07-27 | Taiwan Semiconductor Manufacturing Co., Ltd. | Method of forming a shallow trench isolation using oxide slope etching |
US5943590A (en) * | 1997-09-15 | 1999-08-24 | Winbond Electronics Corp. | Method for improving the planarity of shallow trench isolation |
US6033991A (en) * | 1997-09-29 | 2000-03-07 | Cypress Semiconductor Corporation | Isolation scheme based on recessed locos using a sloped Si etch and dry field oxidation |
US5911110A (en) * | 1997-10-28 | 1999-06-08 | Taiwan Semiconductor Manufacturing Co., Ltd. | Method of forming shallow trench isolation with dummy pattern in reverse tone mask |
US6265286B1 (en) * | 1997-11-17 | 2001-07-24 | Texas Instruments Incorporated | Planarization of LOCOS through recessed reoxidation techniques |
JP3519589B2 (ja) | 1997-12-24 | 2004-04-19 | 株式会社ルネサステクノロジ | 半導体集積回路の製造方法 |
TW407335B (en) * | 1998-01-23 | 2000-10-01 | United Microelectronics Corp | Method of producing shallow trench isolation |
KR100280106B1 (ko) * | 1998-04-16 | 2001-03-02 | 윤종용 | 트렌치 격리 형성 방법 |
US6248636B1 (en) * | 1998-05-28 | 2001-06-19 | Samsung Electronics Co., Ltd. | Method for forming contact holes of semiconductor memory device |
JP4592837B2 (ja) * | 1998-07-31 | 2010-12-08 | ルネサスエレクトロニクス株式会社 | 半導体装置の製造方法 |
TW396521B (en) | 1998-11-06 | 2000-07-01 | United Microelectronics Corp | Process for shallow trench isolation |
KR20000040458A (ko) * | 1998-12-18 | 2000-07-05 | 김영환 | 반도체 소자의 격리영역 형성방법 |
US6468849B1 (en) * | 1999-06-11 | 2002-10-22 | Texas Instruments Incorporated | Methods and devices for optimized digital and analog CMOS transistor performance in deep submicron technology |
JP3513114B2 (ja) * | 2001-03-02 | 2004-03-31 | ヒロセ電機株式会社 | フェルール保持構造 |
US6940110B2 (en) * | 2002-11-29 | 2005-09-06 | Matsushita Electric Industrial Co., Ltd. | SiC-MISFET and method for fabricating the same |
JP4825402B2 (ja) * | 2004-01-14 | 2011-11-30 | ルネサスエレクトロニクス株式会社 | 半導体装置の製造方法 |
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1998
- 1998-12-28 JP JP37488198A patent/JP3955404B2/ja not_active Expired - Fee Related
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1999
- 1999-12-16 TW TW088122163A patent/TW472340B/zh not_active IP Right Cessation
- 1999-12-23 SG SG1999006624A patent/SG77721A1/en unknown
- 1999-12-23 MY MYPI99005705A patent/MY129570A/en unknown
- 1999-12-27 KR KR1019990062554A patent/KR100676365B1/ko not_active IP Right Cessation
- 1999-12-28 CN CNB991270827A patent/CN1173394C/zh not_active Expired - Fee Related
- 1999-12-28 US US09/473,297 patent/US6544839B1/en not_active Expired - Lifetime
- 1999-12-28 CN CNA2004100598420A patent/CN1553494A/zh active Pending
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2002
- 2002-10-15 US US10/270,188 patent/US20030038337A1/en not_active Abandoned
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2004
- 2004-08-17 US US10/919,432 patent/US6967141B2/en not_active Expired - Lifetime
- 2004-10-29 KR KR1020040087220A patent/KR20040098617A/ko not_active Application Discontinuation
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2005
- 2005-07-27 US US11/189,833 patent/US7524729B2/en not_active Expired - Lifetime
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KR20040098617A (ko) | 2004-11-20 |
US7524729B2 (en) | 2009-04-28 |
MY129570A (en) | 2007-04-30 |
US6544839B1 (en) | 2003-04-08 |
US20050014340A1 (en) | 2005-01-20 |
JP2000200878A (ja) | 2000-07-18 |
CN1553494A (zh) | 2004-12-08 |
US20050260820A1 (en) | 2005-11-24 |
KR20000048421A (ko) | 2000-07-25 |
CN1258933A (zh) | 2000-07-05 |
US6967141B2 (en) | 2005-11-22 |
TW472340B (en) | 2002-01-11 |
JP3955404B2 (ja) | 2007-08-08 |
US20090029524A1 (en) | 2009-01-29 |
US20030038337A1 (en) | 2003-02-27 |
KR100676365B1 (ko) | 2007-01-31 |
SG77721A1 (en) | 2001-01-16 |
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