CN116348995A - 半导体装置及制造方法 - Google Patents
半导体装置及制造方法 Download PDFInfo
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- CN116348995A CN116348995A CN202280007098.6A CN202280007098A CN116348995A CN 116348995 A CN116348995 A CN 116348995A CN 202280007098 A CN202280007098 A CN 202280007098A CN 116348995 A CN116348995 A CN 116348995A
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/80—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
- H10D84/811—Combinations of field-effect devices and one or more diodes, capacitors or resistors
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- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D12/00—Bipolar devices controlled by the field effect, e.g. insulated-gate bipolar transistors [IGBT]
- H10D12/01—Manufacture or treatment
- H10D12/031—Manufacture or treatment of IGBTs
- H10D12/032—Manufacture or treatment of IGBTs of vertical IGBTs
- H10D12/038—Manufacture or treatment of IGBTs of vertical IGBTs having a recessed gate, e.g. trench-gate IGBTs
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- H—ELECTRICITY
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- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D12/00—Bipolar devices controlled by the field effect, e.g. insulated-gate bipolar transistors [IGBT]
- H10D12/411—Insulated-gate bipolar transistors [IGBT]
- H10D12/441—Vertical IGBTs
- H10D12/461—Vertical IGBTs having non-planar surfaces, e.g. having trenches, recesses or pillars in the surfaces of the emitter, base or collector regions
- H10D12/481—Vertical IGBTs having non-planar surfaces, e.g. having trenches, recesses or pillars in the surfaces of the emitter, base or collector regions having gate structures on slanted surfaces, on vertical surfaces, or in grooves, e.g. trench gate IGBTs
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- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/01—Manufacture or treatment
- H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
- H10D30/028—Manufacture or treatment of FETs having insulated gates [IGFET] of double-diffused metal oxide semiconductor [DMOS] FETs
- H10D30/0291—Manufacture or treatment of FETs having insulated gates [IGFET] of double-diffused metal oxide semiconductor [DMOS] FETs of vertical DMOS [VDMOS] FETs
- H10D30/0295—Manufacture or treatment of FETs having insulated gates [IGFET] of double-diffused metal oxide semiconductor [DMOS] FETs of vertical DMOS [VDMOS] FETs using recessing of the source electrodes
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- H—ELECTRICITY
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- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
- H10D62/124—Shapes, relative sizes or dispositions of the regions of semiconductor bodies or of junctions between the regions
- H10D62/126—Top-view geometrical layouts of the regions or the junctions
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
- H10D62/13—Semiconductor regions connected to electrodes carrying current to be rectified, amplified or switched, e.g. source or drain regions
- H10D62/133—Emitter regions of BJTs
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- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
- H10D62/13—Semiconductor regions connected to electrodes carrying current to be rectified, amplified or switched, e.g. source or drain regions
- H10D62/137—Collector regions of BJTs
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- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D64/00—Electrodes of devices having potential barriers
- H10D64/01—Manufacture or treatment
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- H10D64/00—Electrodes of devices having potential barriers
- H10D64/20—Electrodes characterised by their shapes, relative sizes or dispositions
- H10D64/23—Electrodes carrying the current to be rectified, amplified, oscillated or switched, e.g. sources, drains, anodes or cathodes
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D64/00—Electrodes of devices having potential barriers
- H10D64/20—Electrodes characterised by their shapes, relative sizes or dispositions
- H10D64/23—Electrodes carrying the current to be rectified, amplified, oscillated or switched, e.g. sources, drains, anodes or cathodes
- H10D64/231—Emitter or collector electrodes for bipolar transistors
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
- H10D62/102—Constructional design considerations for preventing surface leakage or controlling electric field concentration
- H10D62/103—Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices
- H10D62/105—Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices by having particular doping profiles, shapes or arrangements of PN junctions; by having supplementary regions, e.g. junction termination extension [JTE]
- H10D62/106—Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices by having particular doping profiles, shapes or arrangements of PN junctions; by having supplementary regions, e.g. junction termination extension [JTE] having supplementary regions doped oppositely to or in rectifying contact with regions of the semiconductor bodies, e.g. guard rings with PN or Schottky junctions
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
- H10D62/102—Constructional design considerations for preventing surface leakage or controlling electric field concentration
- H10D62/103—Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices
- H10D62/105—Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices by having particular doping profiles, shapes or arrangements of PN junctions; by having supplementary regions, e.g. junction termination extension [JTE]
- H10D62/109—Reduced surface field [RESURF] PN junction structures
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
- H10D62/124—Shapes, relative sizes or dispositions of the regions of semiconductor bodies or of junctions between the regions
- H10D62/126—Top-view geometrical layouts of the regions or the junctions
- H10D62/127—Top-view geometrical layouts of the regions or the junctions of cellular field-effect devices, e.g. multicellular DMOS transistors or IGBTs
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/80—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
- H10D62/83—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group IV materials, e.g. B-doped Si or undoped Ge
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D64/00—Electrodes of devices having potential barriers
- H10D64/111—Field plates
- H10D64/117—Recessed field plates, e.g. trench field plates or buried field plates
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D64/00—Electrodes of devices having potential barriers
- H10D64/20—Electrodes characterised by their shapes, relative sizes or dispositions
- H10D64/27—Electrodes not carrying the current to be rectified, amplified, oscillated or switched, e.g. gates
- H10D64/311—Gate electrodes for field-effect devices
- H10D64/411—Gate electrodes for field-effect devices for FETs
- H10D64/511—Gate electrodes for field-effect devices for FETs for IGFETs
- H10D64/517—Gate electrodes for field-effect devices for FETs for IGFETs characterised by the conducting layers
- H10D64/519—Gate electrodes for field-effect devices for FETs for IGFETs characterised by the conducting layers characterised by their top-view geometrical layouts
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D64/00—Electrodes of devices having potential barriers
- H10D64/60—Electrodes characterised by their materials
- H10D64/62—Electrodes ohmically coupled to a semiconductor
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D8/00—Diodes
- H10D8/422—PN diodes having the PN junctions in mesas
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- Electrodes Of Semiconductors (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2021-084552 | 2021-05-19 | ||
| JP2021084552 | 2021-05-19 | ||
| PCT/JP2022/020666 WO2022244802A1 (ja) | 2021-05-19 | 2022-05-18 | 半導体装置および製造方法 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN116348995A true CN116348995A (zh) | 2023-06-27 |
| CN116348995A9 CN116348995A9 (zh) | 2023-08-04 |
Family
ID=84141634
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202280007098.6A Pending CN116348995A (zh) | 2021-05-19 | 2022-05-18 | 半导体装置及制造方法 |
Country Status (5)
| Country | Link |
|---|---|
| US (1) | US12527016B2 (https=) |
| JP (2) | JP7468786B2 (https=) |
| CN (1) | CN116348995A (https=) |
| DE (1) | DE112022000141T5 (https=) |
| WO (1) | WO2022244802A1 (https=) |
Families Citing this family (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP7779813B2 (ja) * | 2022-08-09 | 2025-12-03 | 株式会社東芝 | 半導体装置 |
| WO2024142638A1 (ja) * | 2022-12-27 | 2024-07-04 | 富士電機株式会社 | 半導体装置および半導体装置の製造方法 |
| JP7834038B2 (ja) * | 2023-01-13 | 2026-03-23 | 三菱電機株式会社 | 半導体装置 |
| DE112023002505T5 (de) * | 2023-02-07 | 2025-04-30 | Fuji Electric Co., Ltd. | Halbleitervorrichtung |
| JP7845516B2 (ja) * | 2023-02-07 | 2026-04-14 | 富士電機株式会社 | 半導体装置 |
| JPWO2024236880A1 (https=) * | 2023-05-16 | 2024-11-21 |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20180108738A1 (en) * | 2016-10-17 | 2018-04-19 | Fuji Electric Co., Ltd. | Semiconductor device |
| CN108780814A (zh) * | 2016-09-14 | 2018-11-09 | 富士电机株式会社 | 半导体装置及其制造方法 |
| US20180337233A1 (en) * | 2017-05-16 | 2018-11-22 | Fuji Electric Co., Ltd. | Semiconductor device |
Family Cites Families (25)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2008160039A (ja) | 2006-12-26 | 2008-07-10 | Nec Electronics Corp | 半導体装置及びその製造方法 |
| JP4577425B2 (ja) | 2007-11-07 | 2010-11-10 | 株式会社デンソー | 半導体装置 |
| JP5317560B2 (ja) | 2008-07-16 | 2013-10-16 | 株式会社東芝 | 電力用半導体装置 |
| JP2010147380A (ja) | 2008-12-22 | 2010-07-01 | Denso Corp | 半導体装置の製造方法 |
| JP2010147381A (ja) | 2008-12-22 | 2010-07-01 | Denso Corp | 半導体装置の製造方法 |
| JP2012059873A (ja) | 2010-09-08 | 2012-03-22 | Renesas Electronics Corp | 半導体装置 |
| JP2012174989A (ja) | 2011-02-23 | 2012-09-10 | Toshiba Corp | 半導体装置の製造方法 |
| JP5562917B2 (ja) | 2011-09-16 | 2014-07-30 | 株式会社東芝 | 半導体装置及びその製造方法 |
| JP2014011418A (ja) * | 2012-07-03 | 2014-01-20 | Hitachi Ltd | 半導体装置およびその製造方法 |
| WO2014041808A1 (ja) | 2012-09-13 | 2014-03-20 | パナソニック株式会社 | 半導体装置 |
| JP5831526B2 (ja) | 2013-01-17 | 2015-12-09 | 株式会社デンソー | 半導体装置およびその製造方法 |
| JP6871316B2 (ja) * | 2014-04-15 | 2021-05-12 | ローム株式会社 | 半導体装置および半導体装置の製造方法 |
| JP6420175B2 (ja) * | 2014-05-22 | 2018-11-07 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
| JP6302767B2 (ja) | 2014-06-27 | 2018-03-28 | 株式会社日立製作所 | 半導体装置及びそれを用いた電力変換装置 |
| JP5975543B2 (ja) | 2014-08-22 | 2016-08-23 | ローム株式会社 | 半導体装置および半導体装置の製造方法 |
| DE102014226161B4 (de) | 2014-12-17 | 2017-10-26 | Infineon Technologies Ag | Halbleitervorrichtung mit Überlaststrombelastbarkeit |
| DE102014119543B4 (de) | 2014-12-23 | 2018-10-11 | Infineon Technologies Ag | Halbleitervorrichtung mit transistorzellen und anreicherungszellen sowie leistungsmodul |
| JP2017022311A (ja) * | 2015-07-14 | 2017-01-26 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
| DE112017000727T5 (de) | 2016-09-14 | 2018-10-31 | Fuji Electric Co., Ltd. | RC-IGBT und Herstellungsverfahren dafür |
| JP6972691B2 (ja) * | 2017-06-19 | 2021-11-24 | 富士電機株式会社 | 半導体装置および半導体装置の製造方法 |
| JP6963982B2 (ja) * | 2017-12-07 | 2021-11-10 | ルネサスエレクトロニクス株式会社 | 半導体装置およびその製造方法 |
| JP6911941B2 (ja) | 2017-12-14 | 2021-07-28 | 富士電機株式会社 | 半導体装置 |
| CN111418072B (zh) * | 2018-06-22 | 2023-11-21 | 富士电机株式会社 | 半导体装置的制造方法及半导体装置 |
| EP3843132B1 (en) | 2019-04-16 | 2024-11-27 | Fuji Electric Co., Ltd. | Semiconductor device and production method |
| CN114503280B (zh) | 2020-04-16 | 2026-04-24 | 富士电机株式会社 | 半导体装置及半导体装置的制造方法 |
-
2022
- 2022-05-18 CN CN202280007098.6A patent/CN116348995A/zh active Pending
- 2022-05-18 JP JP2023522695A patent/JP7468786B2/ja active Active
- 2022-05-18 DE DE112022000141.0T patent/DE112022000141T5/de active Pending
- 2022-05-18 WO PCT/JP2022/020666 patent/WO2022244802A1/ja not_active Ceased
-
2023
- 2023-04-21 US US18/304,378 patent/US12527016B2/en active Active
-
2024
- 2024-04-02 JP JP2024059803A patent/JP2024084795A/ja active Pending
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108780814A (zh) * | 2016-09-14 | 2018-11-09 | 富士电机株式会社 | 半导体装置及其制造方法 |
| US20180374948A1 (en) * | 2016-09-14 | 2018-12-27 | Fuji Electric Co.,Ltd. | Semiconductor device and manufacturing method thereof |
| US20180108738A1 (en) * | 2016-10-17 | 2018-04-19 | Fuji Electric Co., Ltd. | Semiconductor device |
| US20180337233A1 (en) * | 2017-05-16 | 2018-11-22 | Fuji Electric Co., Ltd. | Semiconductor device |
Also Published As
| Publication number | Publication date |
|---|---|
| CN116348995A9 (zh) | 2023-08-04 |
| JP2024084795A (ja) | 2024-06-25 |
| JPWO2022244802A1 (https=) | 2022-11-24 |
| US20230261097A1 (en) | 2023-08-17 |
| WO2022244802A1 (ja) | 2022-11-24 |
| DE112022000141T5 (de) | 2023-06-15 |
| US12527016B2 (en) | 2026-01-13 |
| JP7468786B2 (ja) | 2024-04-16 |
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| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| CI02 | Correction of invention patent application |
Correction item: Claims Correct: Claims submitted when going through the formalities for entering the National Phase in China, and claims amended in accordance with Article 19 of the Patent Cooperation Treaty False: Claims submitted when completing the procedures for entering the Chinese national stage Number: 26-01 Page: ?? Volume: 39 |
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| CI02 | Correction of invention patent application |