JP2012174989A - 半導体装置の製造方法 - Google Patents
半導体装置の製造方法 Download PDFInfo
- Publication number
- JP2012174989A JP2012174989A JP2011037421A JP2011037421A JP2012174989A JP 2012174989 A JP2012174989 A JP 2012174989A JP 2011037421 A JP2011037421 A JP 2011037421A JP 2011037421 A JP2011037421 A JP 2011037421A JP 2012174989 A JP2012174989 A JP 2012174989A
- Authority
- JP
- Japan
- Prior art keywords
- film
- layer
- trench
- silicon oxide
- mask
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 58
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 24
- 239000010410 layer Substances 0.000 claims abstract description 95
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims abstract description 43
- 229910052814 silicon oxide Inorganic materials 0.000 claims abstract description 43
- 229910052581 Si3N4 Inorganic materials 0.000 claims abstract description 35
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims abstract description 35
- 238000000034 method Methods 0.000 claims abstract description 31
- 239000011229 interlayer Substances 0.000 claims abstract description 23
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 13
- 239000010703 silicon Substances 0.000 claims abstract description 13
- 238000005530 etching Methods 0.000 claims abstract description 8
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 11
- 238000001020 plasma etching Methods 0.000 description 9
- 239000012535 impurity Substances 0.000 description 8
- 238000000605 extraction Methods 0.000 description 7
- 238000001039 wet etching Methods 0.000 description 7
- 238000001459 lithography Methods 0.000 description 5
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 4
- 230000015556 catabolic process Effects 0.000 description 3
- 239000007772 electrode material Substances 0.000 description 3
- 239000000758 substrate Substances 0.000 description 3
- 238000005229 chemical vapour deposition Methods 0.000 description 2
- 238000005468 ion implantation Methods 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 238000000059 patterning Methods 0.000 description 2
- 239000000969 carrier Substances 0.000 description 1
- 239000007795 chemical reaction product Substances 0.000 description 1
- 238000011109 contamination Methods 0.000 description 1
- 230000006378 damage Effects 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 238000001312 dry etching Methods 0.000 description 1
- 230000005669 field effect Effects 0.000 description 1
- 239000011810 insulating material Substances 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 239000007769 metal material Substances 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7801—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
- H01L29/7802—Vertical DMOS transistors, i.e. VDMOS transistors
- H01L29/7813—Vertical DMOS transistors, i.e. VDMOS transistors with trench gate electrode, e.g. UMOS transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66234—Bipolar junction transistors [BJT]
- H01L29/66325—Bipolar junction transistors [BJT] controlled by field-effect, e.g. insulated gate bipolar transistors [IGBT]
- H01L29/66333—Vertical insulated gate bipolar transistors
- H01L29/6634—Vertical insulated gate bipolar transistors with a recess formed by etching in the source/emitter contact region
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66674—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
- H01L29/66712—Vertical DMOS transistors, i.e. VDMOS transistors
- H01L29/66719—With a step of forming an insulating sidewall spacer
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66674—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
- H01L29/66712—Vertical DMOS transistors, i.e. VDMOS transistors
- H01L29/66727—Vertical DMOS transistors, i.e. VDMOS transistors with a step of recessing the source electrode
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66674—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
- H01L29/66712—Vertical DMOS transistors, i.e. VDMOS transistors
- H01L29/66734—Vertical DMOS transistors, i.e. VDMOS transistors with a step of recessing the gate electrode, e.g. to form a trench gate electrode
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/10—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
- H01L29/1095—Body region, i.e. base region, of DMOS transistors or IGBTs
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
- H01L29/417—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions carrying the current to be rectified, amplified or switched
- H01L29/41725—Source or drain electrodes for field effect devices
- H01L29/41766—Source or drain electrodes for field effect devices with at least part of the source or drain electrode having contact below the semiconductor surface, e.g. the source or drain electrode formed at least partially in a groove or with inclusions of conductor inside the semiconductor
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
- Electrodes Of Semiconductors (AREA)
Abstract
【解決手段】実施形態によれば、半導体装置の製造方法は、シリコン窒化物を含むマスク層及びマスク層の側壁に形成されたサイドウォール膜をマスクにして、シリコンを含む半導体層をエッチングし、半導体層にゲートトレンチを形成する工程を有する。また、サイドウォール膜を除去し、マスク層をマスクにして半導体層にベース領域及びソース領域を形成する工程を有する。また、シリコン酸化物を含む層間膜をマスクにして、半導体層におけるマスク層が除去された部分の下にコンタクトトレンチを形成する工程を有する。
【選択図】図5
Description
Claims (5)
- シリコンを含む半導体層上に、シリコン窒化物を含むマスク層を形成する工程と、
前記マスク層の側壁にサイドウォール膜を形成する工程と、
前記マスク層及び前記サイドウォール膜をマスクにして前記半導体層をエッチングし、前記半導体層にゲートトレンチを形成する工程と、
前記ゲートトレンチ内に、ゲート絶縁膜を介してゲート電極を埋め込む工程と、
前記サイドウォール膜を除去し、前記マスク層をマスクにして前記半導体層にベース領域及びソース領域を形成する工程と、
前記半導体層、前記ゲート電極および前記マスク層を覆い、シリコン酸化物を含む層間膜を形成する工程と、
前記マスク層を選択的に除去する工程と、
前記層間膜をマスクにして、前記半導体層における前記マスク層が除去された部分の下にコンタクトトレンチを形成する工程と、
を備えたことを特徴とする半導体装置の製造方法。 - 前記マスク層を形成する工程は、
前記半導体層の表面上にシリコン酸化膜を形成する工程と、
前記シリコン酸化膜上にシリコン窒化膜を形成する工程と、
を有することを特徴とする請求項1記載の半導体装置の製造方法。 - 前記マスク層を選択的に除去する工程は、前記シリコン窒化膜を除去する工程を含み、
前記シリコン窒化膜の除去により、前記シリコン酸化膜と、前記シリコン酸化膜よりも厚い前記層間膜との間に段差が形成されることを特徴とする請求項2記載の半導体装置の製造方法。 - 前記段差を有する状態で前記シリコン酸化膜及び前記層間膜をエッチングして、前記シリコン酸化膜を除去すると共に、前記半導体層における前記シリコン酸化膜が除去された部分の下に前記コンタクトトレンチを形成することを特徴とする請求項3記載の半導体装置の製造方法。
- 前記シリコン窒化膜上に、第2のシリコン酸化膜を形成する工程をさらに備えたことを特徴とする請求項2〜4のいずれか1つに記載の半導体装置の製造方法。
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2011037421A JP2012174989A (ja) | 2011-02-23 | 2011-02-23 | 半導体装置の製造方法 |
US13/401,667 US20120214281A1 (en) | 2011-02-23 | 2012-02-21 | Method for manufacturing semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2011037421A JP2012174989A (ja) | 2011-02-23 | 2011-02-23 | 半導体装置の製造方法 |
Publications (1)
Publication Number | Publication Date |
---|---|
JP2012174989A true JP2012174989A (ja) | 2012-09-10 |
Family
ID=46653071
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2011037421A Pending JP2012174989A (ja) | 2011-02-23 | 2011-02-23 | 半導体装置の製造方法 |
Country Status (2)
Country | Link |
---|---|
US (1) | US20120214281A1 (ja) |
JP (1) | JP2012174989A (ja) |
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2018052098A1 (ja) * | 2016-09-14 | 2018-03-22 | 富士電機株式会社 | 半導体装置およびその製造方法 |
JP2018129378A (ja) * | 2017-02-07 | 2018-08-16 | ローム株式会社 | 半導体装置および半導体装置の製造方法、ならびに、半導体ウエハ構造物 |
CN108780809A (zh) * | 2016-09-14 | 2018-11-09 | 富士电机株式会社 | Rc-igbt及其制造方法 |
US10546953B2 (en) | 2017-09-20 | 2020-01-28 | Kabushiki Kaisha Toshiba | Semiconductor device including an electrode having a part with an inverse tapered shape |
JP2020102592A (ja) * | 2018-12-25 | 2020-07-02 | トヨタ自動車株式会社 | 半導体装置の製造方法 |
Families Citing this family (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8668835B1 (en) | 2013-01-23 | 2014-03-11 | Lam Research Corporation | Method of etching self-aligned vias and trenches in a multi-layer film stack |
CN104022063B (zh) * | 2013-03-01 | 2017-09-29 | 中芯国际集成电路制造(上海)有限公司 | 浅槽的形成方法 |
JP6170812B2 (ja) | 2013-03-19 | 2017-07-26 | 株式会社東芝 | 半導体装置の製造方法 |
US8906810B2 (en) | 2013-05-07 | 2014-12-09 | Lam Research Corporation | Pulsed dielectric etch process for in-situ metal hard mask shape control to enable void-free metallization |
JP2015167185A (ja) * | 2014-03-04 | 2015-09-24 | 株式会社東芝 | 半導体装置 |
JP2018117070A (ja) * | 2017-01-19 | 2018-07-26 | エイブリック株式会社 | 半導体装置及びその製造方法 |
JP6740986B2 (ja) | 2017-08-31 | 2020-08-19 | 株式会社デンソー | 炭化珪素半導体装置およびその製造方法 |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH04297038A (ja) * | 1990-07-23 | 1992-10-21 | Nippon Telegr & Teleph Corp <Ntt> | 縦型mis電界効果トランジスタの製法 |
JPH09172064A (ja) * | 1995-12-18 | 1997-06-30 | Toyota Central Res & Dev Lab Inc | 半導体装置および半導体装置の製造方法 |
JP2004522319A (ja) * | 2001-07-24 | 2004-07-22 | コーニンクレッカ フィリップス エレクトロニクス エヌ ヴィ | ショットキー障壁を持つ半導体デバイスの製造 |
JP2004522305A (ja) * | 2001-04-28 | 2004-07-22 | コーニンクレッカ フィリップス エレクトロニクス エヌ ヴィ | トレンチゲート半導体デバイスおよびそれらの製造方法 |
-
2011
- 2011-02-23 JP JP2011037421A patent/JP2012174989A/ja active Pending
-
2012
- 2012-02-21 US US13/401,667 patent/US20120214281A1/en not_active Abandoned
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH04297038A (ja) * | 1990-07-23 | 1992-10-21 | Nippon Telegr & Teleph Corp <Ntt> | 縦型mis電界効果トランジスタの製法 |
JPH09172064A (ja) * | 1995-12-18 | 1997-06-30 | Toyota Central Res & Dev Lab Inc | 半導体装置および半導体装置の製造方法 |
JP2004522305A (ja) * | 2001-04-28 | 2004-07-22 | コーニンクレッカ フィリップス エレクトロニクス エヌ ヴィ | トレンチゲート半導体デバイスおよびそれらの製造方法 |
JP2004522319A (ja) * | 2001-07-24 | 2004-07-22 | コーニンクレッカ フィリップス エレクトロニクス エヌ ヴィ | ショットキー障壁を持つ半導体デバイスの製造 |
Cited By (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2018052098A1 (ja) * | 2016-09-14 | 2018-03-22 | 富士電機株式会社 | 半導体装置およびその製造方法 |
CN108780809A (zh) * | 2016-09-14 | 2018-11-09 | 富士电机株式会社 | Rc-igbt及其制造方法 |
JPWO2018052098A1 (ja) * | 2016-09-14 | 2018-12-27 | 富士電機株式会社 | 半導体装置およびその製造方法 |
US10749025B2 (en) | 2016-09-14 | 2020-08-18 | Fuji Electric Co., Ltd. | Semiconductor device and manufacturing method thereof |
JP2018129378A (ja) * | 2017-02-07 | 2018-08-16 | ローム株式会社 | 半導体装置および半導体装置の製造方法、ならびに、半導体ウエハ構造物 |
US10546953B2 (en) | 2017-09-20 | 2020-01-28 | Kabushiki Kaisha Toshiba | Semiconductor device including an electrode having a part with an inverse tapered shape |
JP2020102592A (ja) * | 2018-12-25 | 2020-07-02 | トヨタ自動車株式会社 | 半導体装置の製造方法 |
JP7070392B2 (ja) | 2018-12-25 | 2022-05-18 | 株式会社デンソー | 半導体装置の製造方法 |
Also Published As
Publication number | Publication date |
---|---|
US20120214281A1 (en) | 2012-08-23 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US10121892B2 (en) | Semiconductor device | |
JP2012174989A (ja) | 半導体装置の製造方法 | |
JP5562917B2 (ja) | 半導体装置及びその製造方法 | |
JP2007311557A (ja) | 半導体装置及びその製造方法 | |
US20130056790A1 (en) | Semiconductor device and method for manufacturing same | |
JP2010153864A (ja) | 半導体ダイ上に製造されるパワートランジスタデバイス | |
JP2008016518A (ja) | 半導体装置および製造方法 | |
US8691635B2 (en) | Fabrication method of semiconductor device | |
JP5795452B1 (ja) | 炭化ケイ素半導体装置、炭化ケイ素半導体装置の製造方法及び炭化ケイ素半導体装置の設計方法 | |
JP2013182935A (ja) | 半導体装置およびその製造方法 | |
JP2012009545A (ja) | 半導体装置の製造方法 | |
CN110164971B (zh) | 半导体装置 | |
JP2011134985A (ja) | トレンチゲート型半導体装置とその製造方法 | |
JP4447474B2 (ja) | 半導体装置およびその製造方法 | |
JP2013182934A (ja) | 半導体装置およびその製造方法 | |
JP2009246225A (ja) | 半導体装置 | |
US10388725B2 (en) | Semiconductor device and method of manufacturing semiconductor device | |
JP2011071161A (ja) | 半導体素子及びその製造方法 | |
JP2016219495A (ja) | 半導体装置およびその製造方法 | |
JP2012160601A (ja) | 半導体装置の製造方法 | |
JP5833274B1 (ja) | 炭化ケイ素半導体装置、炭化ケイ素半導体装置の製造方法及び炭化ケイ素半導体装置の設計方法 | |
JP2012195394A (ja) | 半導体装置の製造方法 | |
JP2012186417A (ja) | 半導体装置及びその製造方法 | |
JP2006196545A (ja) | 半導体装置の製造方法 | |
JP6606819B2 (ja) | 半導体装置 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20130221 |
|
A977 | Report on retrieval |
Free format text: JAPANESE INTERMEDIATE CODE: A971007 Effective date: 20130708 |
|
A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20130814 |
|
A977 | Report on retrieval |
Free format text: JAPANESE INTERMEDIATE CODE: A971007 Effective date: 20130905 |
|
A977 | Report on retrieval |
Free format text: JAPANESE INTERMEDIATE CODE: A971007 Effective date: 20130906 |
|
A02 | Decision of refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A02 Effective date: 20131204 |