CN109314143B - 半导体装置 - Google Patents

半导体装置 Download PDF

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CN109314143B
CN109314143B CN201780036414.1A CN201780036414A CN109314143B CN 109314143 B CN109314143 B CN 109314143B CN 201780036414 A CN201780036414 A CN 201780036414A CN 109314143 B CN109314143 B CN 109314143B
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guard ring
semiconductor substrate
diode
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荒川隆史
高桥茂树
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Denso Corp
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Abstract

一种半导体装置，具备半导体衬底(50)，该半导体衬底(50)形成有通过发射极层(13)、基极层(11)、漂移层(17)和集电极层(14)而作为IGBT进行动作的IGBT区域(10)，并与IGBT区域邻接地形成有通过阳极层(21)、漂移层和阴极层(22)而作为二极管进行动作的二极管区域(20)。在半导体衬底中，还在将邻接地形成有IGBT区域与二极管区域的元件区域包围的外周区域，在漂移层的表层部形成被施加与阳极层相同电位的电压的第二导电型的保护环(30)。将向与半导体衬底的表面平行的面进行了投影的情况下的阴极层与保护环之间的距离的最小值设为L、并将半导体衬底的厚度设为d时，阴极层与保护环形成在满足L/d≧1.5的位置。

Description

半导体装置
关联申请的相互参照
本申请基于2016年6月14日提出的日本专利申请2016－118218号并在此引用其记载内容。
技术领域
本发明涉及将IGBT(Insulated Gate Bipolar Transistor)和二极管(FreeWheeling Diode)形成于共用的半导体衬底而得到的半导体装置。
背景技术
以往，例如，如专利文献1所记载的那样，公知有将IGBT和二极管形成于共用的半导体衬底而得到的半导体装置。在该半导体装置中，IGBT和二极管形成于共用的N型半导体的半导体衬底。
具体而言，以半导体衬底的N型半导体为漂移层，在该漂移层的一个表层部形成P型的基极层，在该基极层选择性地形成发射极层。在漂移层的另一个表层部形成P型的集电极层和N型的阴极层。结果，由集电极层与阴极层的边界划分出IGBT区域和二极管区域。另外，以贯通基极层而到达漂移层的方式形成多个沟槽，在该沟槽内隔着绝缘膜形成栅极电极。
简单地对IGBT区域的动作进行说明。即，通过向形成于沟槽内的栅极电极施加正的偏压，从而作为少数载流子的电子被拉向沟槽附近的基极区域而形成沟道。此时，若以集电极层为正而向集电极层与发射极层之间施加电压，则电子从发射极层经由沟道供给至漂移层，空穴从集电极层供给至漂移层。这样，载流子向漂移层传导，在发射极层与集电极层之间流过集电极电流。
此外，对二极管区域的动作进行说明。即，当二极管正偏时，从阳极层(基极层)供给的空穴和从阴极层供给的电子在漂移层内结合、到达对置的层从而在正向上流过电流。反之，当二极管反偏时，载流子不被供给至漂移层内而不流过电流。
在上述专利文献1所示的半导体装置中，IGBT区域与二极管区域在半导体衬底的表面的一个方向上延伸，在与该延伸方向正交的方向上交替地形成有IGBT区域和二极管区域。即，上述的半导体装置是具有至少一对IGBT区域和二极管区域、且它们形成于同一衬底的所谓RC－IGBT。
进而，将IGBT区域与二极管区域邻接的区域作为元件区域，在该元件区域的外周，形成有至少一个以上的P型半导体的保护环。并且，最内侧的保护环与基极层相接并与基极层电连接。保护环的作用在于：当向IGBT施加高电压时，使从基极层及阳极层扩展的耗尽层在沿衬底表面的方向上延伸，缓和电场强度，从而提高半导体装置的耐压。
现有技术文献
专利文献
专利文献1:日本特开2015－185742号公报
发明概要
在二极管区域，如上所述，当二极管正偏而处于流过电流的导通状态时，空穴从阳极层(基极层)向漂移层供给，电子从阴极层向漂移层供给。并且，当从导通状态向施加反偏的反向阻断状态切换时，蓄积于漂移层中的载流子向供给源的基极层、阴极层移动，从而引起反向地产生过大电流(恢复电流)的恢复现象。
在此，当如专利文献1的半导体装置那样将基极层与最内侧的保护环电连接，则当二极管正偏时，保护环成为与基极层相等的电位。因此，空穴也从作为P型半导体的保护环向漂移层供给。即，当二极管正偏时，在漂移层中蓄积从基极层及保护环供给的空穴和从阴极层供给的电子。
因此，在二极管与保护环的边界附近的漂移区域，与二极管的中央附近等相比，存在与从保护环供给的空穴的量相应的较多的空穴。结果，在发生了上述的恢复现象的情况下，二极管与保护环的边界附近的大量的空穴一下子向二极管的阳极层流入而发生电流集中。该局部的电流集中有可能导致二极管的恢复电流耐量(恢复耐量)受到限制。
此外，在专利文献1的半导体装置中，除了二极管区域之外还在外周区域形成损坏区域，以便抑制从外周区域的保护环向二极管区域的空穴注入。但是，从二极管区域向外周区域延伸的损坏区域只不过仅覆盖保护环的一部分，因此空穴注入的抑制效果有限。
发明内容
本发明目的是提供一种半导体装置，其能够进一步提高二极管的恢复耐量。
根据本发明的一方式，半导体装置具备：第一导电型的漂移层、在漂移层的一个表层部形成的第二导电型的基极层和阳极层、在基极层选择性地形成的发射极层、在漂移层的另一个表层部形成的第二导电型的集电极层和第一导电型的阴极层，并且具备半导体衬底，该半导体衬底形成有通过发射极层、基极层、漂移层和集电极层而作为IGBT进行动作的IGBT区域，并形成有与IGBT区域邻接、通过阳极层、漂移层和阴极层而作为二极管进行动作的二极管区域。
在半导体衬底中，还在将邻接地形成有IGBT区域及二极管区域的元件区域包围的外周区域，在漂移层的表层部形成被施加与阳极层相同电位的电压的第二导电型的保护环。
将向与半导体衬底的表面平行的面进行了投影的情况下的阴极层与保护环之间的距离的最小值设为L、并将半导体衬底的厚度设为d时，阴极层与保护环形成在满足L/d≧1.5的位置。
根据本发明的一方式，以满足L/d≧1.5的方式确定阴极层与保护环的位置关系，从而当二极管区域正偏时，相比于保护环与阴极层之间的载流子传导，阳极层与阴极层之间的载流子传导更容易。换言之，在二极管区域，阳极层与阴极层之间的载流子传导具有支配性。
因此，相对于从阳极层注入漂移层的载流子，从保护环注入漂移层的载流子的比率降低。因此，能够抑制在阳极层与保护环的边界附近的漂移层中蓄积大量的载流子。因此，能够抑制当二极管区域切换为反偏时、大量的空穴向阳极层的流入、即局部电流集中的产生。结果，能够进一步提高二极管的恢复耐量。
附图说明
关于本发明的上述目的和其它目的、特征、优点可参照附图并通过下述的详细内容而更加明确。
图1是第一实施方式的半导体装置的俯视图。
图2是沿着图1中的II-II线的、表示IGBT区域的结构的纵截面图。
图3是沿着图1中的III-III线的、表示二极管区域的结构的纵截面图。
图4是用于表示二极管区域中的阴极层与保护环的位置关系的俯视图。
图5是表示在对二极管区域的阴极层与保护环之间的最小距离L进行了变更的情况下、比保护环深的漂移层中的深度位置的电流密度如何变化的图表。
图6是表示在使半导体衬底的厚度变化了的情况下的、阴极层与保护环的最小距离L/衬底厚度d、与Pwell区域下/阴极层正上电流比之间的关系的图表。
图7是表示第二实施方式的半导体装置的二极管区域的结构的纵截面图。
图8是在第二实施方式中用于表示二极管区域中的阴极层与保护环的位置关系的一例的俯视图。
图9是在第二实施方式中用于表示二极管区域中的阴极层与保护环的位置关系的另一例的俯视图。
图10是用于表示变形例的二极管区域中的阴极层与保护环的位置关系的一例的俯视图。
具体实施方式
以下参照附图对本发明的实施方式进行说明。此外，在以下各图中对于彼此相同或等同的部分标记同一符号。
(第一实施方式)
首先，参照图1至图3，对第一实施方式的半导体装置的概略结构进行说明。
如图1及图2所示，该半导体装置100是在一个半导体衬底50中形成IGBT区域10和二极管区域20而得到的逆通电型IGBT、所谓RC－IGBT。如图1所示，IGBT区域10和二极管区域20分别形成为在半导体衬底50表面的一个方向上延伸的条状，在与该延伸方向正交的方向上交替地排列。
交替地邻接形成有IGBT区域10和二极管区域20的区域成为元件区域。在将该元件区域包围的外周区域，形成了包含P型半导体的保护环30、31、32。此外，在图1中，为了容易理解，对三个保护环30、31、32附加了影线。另外，在图1中，示出了形成有三个保护环30、31、32的例子，但保护环30、31、32的个数至少为一个以上即可。
设置保护环30、31、32是为了：当向IGBT区域10施加了高电压时，使从基极层11及阳极层21扩展的耗尽层在沿着半导体衬底50的表面的方向上延伸，缓和电场强度，从而提高半导体装置100的耐压。
在元件区域中的、IGBT区域10与二极管区域20的排列的两端，都设有IGBT区域10。由此，只要在二极管区域20中的、与排列方向平行的侧面附近实施针对从保护环30向二极管区域20的漂移层17的载流子(空穴)注入的对策即可，详情后述。
图2是表示半导体装置100的IGBT区域10的结构的截面图。如图2所示，半导体装置100在IGBT区域10中主要具备基极层11、沟槽栅极电极12a、发射极层13和集电极层14。此外，16a示出了基极接触层。
另外，图3是表示半导体装置100的二极管区域20的结构的截面图。如图3所示，半导体装置100在二极管区域20中具备阳极层21和阴极层22。此外，16b示出了阳极接触层。另外，最内侧的保护环30与阳极层21相接并与阳极层21电连接。
基极层11和阳极层21的杂质的表面浓度例如是3E17(3×1017/cm3)，形成深度例如是2.5μm。另一方面，保护环30的杂质的表面浓度例如是4E17(4×1017/cm3)，形成深度例如是7.0μm。这样，保护环30的杂质浓度比基极层11和阳极层21的杂质浓度高。另外，保护环30的形成深度比阳极层21的形成深度深。
并且，在IGBT区域10及二极管区域20中，在基极层11与集电极层14之间、以及阳极层21与阴极层22之间分别形成有漂移层17。
半导体衬底50通过在硅中掺杂杂质而做成N导电型。半导体衬底50的杂质浓度例如是1E14。半导体衬底50被从硅晶片切出，具有第一主面50a和作为其背面的第二主面50b。通过向半导体衬底50的各主面50a、50b进行离子注入而形成IGBT区域10和二极管区域20。
在IGBT区域10中，基极层11形成在半导体衬底50的第一主面50a侧的表层。基极层11例如通过掺杂硼作为杂质而做成P导电型。
在IGBT区域10中，当向在沟槽12内隔着绝缘膜12b形成的沟槽栅极电极12a以规定方式施加了电压时，基极层11在沟槽周围的表层部分产生沟道。经由该沟道，在发射极层13与集电极层14之间流过集电极电流。
具体而言，电子从发射极层13经由沟道向漂移层17供给，空穴从集电极层14向漂移层17供给。这样，载流子分别从发射极层13和集电极层14供给至漂移层17，从而在发射极层13与集电极层14之间流过集电极电流。
沟槽12从第一主面50a向半导体衬底50的深度方向延伸，贯通基极层11而到达漂移层17。沟槽栅极电极12a包含用绝缘膜12b将在半导体衬底50的第一主面50a形成的沟槽12的内壁覆盖之后、在沟槽12内部埋设的多晶硅。沟槽栅极电极12a与IGBT区域10的控制端子即栅极端子连接，被用于IGBT的开关的控制。
在第一主面50a侧的表层选择性地形成有发射极层13。具体而言，发射极层13在IGBT区域10中形成于沟槽12的周围。发射极层13例如通过掺杂砷、磷作为杂质而做成N导电型。发射极层13的形成深度比基极层11的形成深度浅，发射极层13被基极层11覆盖。并且，发射极层13与IGBT区域10的输出端子即发射极端子连接，成为例如GND电位。
集电极层14形成于IGBT区域10的第二主面50b侧的表层。集电极层14例如通过掺杂硼作为杂质而做成P导电型。此外，集电极层14的杂质浓度比基极层11的杂质浓度高。集电极层14与IGBT区域10的输出端子即集电极端子连接，在与发射极层13之间流过集电极电流。
在二极管区域20中，阳极层21形成于半导体衬底50的第一主面50a侧的表层。阳极层21例如通过掺杂硼作为杂质而做成P导电型。此外，阳极层21与IGBT区域10的基极层11在同一工序中形成，基极层11与阳极层21一体相连。因此，阳极层21从其所形成的第一主面50a起的深度及杂质浓度与基极层11相同。阳极层21在与阴极层22及漂移层17之间形成PN结，发挥作为二极管的功能。
阴极层22形成于二极管区域20中的第二主面50b侧的表层。阴极层22例如通过掺杂砷、磷作为杂质而做成N导电型。此外，阴极层22的杂质浓度比半导体衬底50(漂移层17)的杂质浓度高。
基极接触层16a和阳极接触层16b分别是杂质浓度比基极层11和阳极层21高的P导电型的半导体区域。这些接触层16用于与未图示的布线的连接。特别是，当二极管区域20从正偏状态向反偏状态变化时，阳极接触层16b发挥功能以使在漂移层17中蓄积的空穴高效地取出。
漂移层17是通过在半导体衬底50中形成基极层11、集电极层14、阳极层21和阴极层22而规定出的区域。具体而言，是基极层11与集电极层14之间的区域、以及阳极层21与阴极层22之间的区域，当然，是N导电型且杂质浓度与半导体衬底50相同。
如上所述，在本实施方式的半导体装置100中，在外周区域形成具有高杂质浓度的保护环30、31、32，最内侧的保护环30与二极管区域20的阳极层21电连接。因此，当二极管区域20正偏时，除了阳极层21之外还从保护环30向漂移层17供给载流子(空穴)。结果，二极管区域20中，与二极管区域20的中央附近等相比，在与保护环30的边界附近的漂移层17，存在与从保护环30供给的空穴的量相应的较多的空穴。
因此，当二极管区域20从正偏切换为反偏时，二极管区域20与保护环30的边界附近的大量空穴一下子向二极管区域20的阳极层21流入而可能发生电流集中。
因此，在本实施方式的半导体装置100中，对于二极管区域20，通过研究阴极层22与保护环30的位置关系而能够抑制上述的电流集中。以下对本实施方式的半导体装置100的技术特征点进行详细说明。
首先，在使半导体衬底50的厚度固定(例如75μm)而对如图3及图4所示那样向与半导体衬底50的表面平行的面进行了投影的情况下的阴极层22与保护环30之间的最小距离L进行了变更的情况下，使用仿真模型确认了比保护环30深的漂移层17中的深度位置(例如15μm)的电流密度如何变化。其结果示于图5的图表。
由图5的图表可知，向与半导体衬底50的表面平行的面投影的情况下的阴极层22与保护环30之间的最小距离L越短，形成最内侧的保护环30的Pwell区域的正下方的电流密度越高。另一方面，还能够确认到，阴极层22的正上方的电流密度与最小距离L无关地大致收敛于一定值。
根据该结果可以预想到，当阴极层22与保护环30之间的最小距离L较短，则从保护环30向漂移层17的载流子注入量变多，从而保护环30(Pwell区域)的正下方的电流密度升高。
进一步，使半导体衬底50的厚度d变化，关于各衬底厚度d，使阴极层22与保护环30之间的最小距离L变化，并使用仿真模型确认了比保护环30深的深度位置(例如15μm)的电流密度如何变化。并且，将得到的与各衬底厚度d有关的结果描绘到图6的图表上，该图6中，作为参数，在一个轴上取最小距离L/衬底厚度d，将Pwell区域下/阴极层正上方电流比设为另一个轴。此外，如图6的图表所示，衬底厚度d设为50[μm]、75[μm]、100[μm]、150[μm]。
由图6的图表可知，与半导体衬底50的厚度无关地，L/d越大，相对于阴极层22的正上方的电流的大小(电流密度)而言，保护环30(Pwell区域)下的电流的大小(电流密度)越低。这可以认为是因为：L/d越大，当二极管区域20正偏时，相比于保护环30与阴极层22之间的载流子传导，阳极层21与阴极层22之间的载流子传导更加容易。换言之，可以认为是因为，在二极管区域20，阳极层21与阴极层22之间的载流子传导具有支配性。
这里，如图6的图表所示，与半导体衬底50的厚度无关地，在从L/d的值小于1的范围到超过1的范围，随着L/d的值的増加，Pwell区域下/阴极层正上方电流比急剧地降低。并且，当L/d的值在1.5附近时，Pwell区域下/阴极层正上方电流比降低至不足0.15的程度。此后，随着L/d的值的増加，Pwell区域下/阴极层正上方电流比的变化梯度变缓。即，根据图6的图表，可以认为，在L/d与Pwell区域下/阴极层正上方电流比的关系中，在L/d＝1.5附近存在拐点。
并且，如果Pwell区域下/阴极层正上方电流比不足0.15的程度，则从保护环30向漂移层17注入的载流子最多是从阳极层21注入的载流子的1/6～1/7的程度。如果是这种程度的载流子注入量，则还能够将二极管区域20与保护环30的边界附近的由恢复电流引起的电流集中抑制在耐受实际应用的程度。
根据这样的结果，在本实施方式中，使阴极层22与保护环30形成在满足L/d≧1.5的位置。因此，在本实施方式中，阴极层22的与IGBT区域10及二极管区域20的排列方向平行的两端面如图4所示那样，在从保护环30离开最小距离L的位置结束。
由此，能够抑制在阳极层21与保护环30的边界附近的漂移层17中蓄积大量空穴。因此，当二极管区域20切换为反偏时，能够抑制大量空穴向阳极层21的流入、即局部的电流集中的产生。结果，能够使二极管区域20的恢复耐量进一步提高。
进而，优选的是，阴极层22与保护环30形成于满足L/d≧1.8的位置。这是因为，在阴极层22与保护环30的位置关系满足L/d≧1.8的情况下，由图6的图表可知，Pwell区域下/阴极层正上方电流比降低至不足0.1的程度。另外，在阴极层22与保护环30形成于满足L/d≧2.0的位置的情况下，能够可靠地将Pwell区域下/阴极层正上方电流比抑制为不足0.1从而更加优选。
(第二实施方式)
接下来对第二实施方式的半导体装置进行说明。
在上述的第一实施方式的半导体装置100中，在漂移层17中没有形成晶格缺陷层(损坏层)，但是也可以与现有的半导体装置同样地形成晶格缺陷层。在本实施方式中，对于形成晶格缺陷层时的、阴极层22与保护环30的位置关系进行说明。
如图7所示，在漂移层17中形成晶格缺陷层18，从而能够使在漂移层17中移动的载流子的寿命缩短，因此能够调整漂移层17中的载流子的蓄积量。
通过离子照射对半导体衬底50的晶体结构带来损坏、使晶格缺陷产生从而形成晶格缺陷层18。作为向半导体衬底50照射的离子种类，例如能够采用质子、氦离子、氩离子。
这里，晶格缺陷层18例如如图7和图8所示那样，在漂移层17中形成为，覆盖二极管区域20并进一步到达外周区域的漂移层17。由于晶格缺陷层18延伸到外周区域，能够抑制从被晶格缺陷层18覆盖的部分的保护环30向漂移层17的载流子注入量。
但是，如图8所示，当二极管区域20正偏时，有可能从将晶格缺陷层18向半导体衬底50的第一主面50a投影时未被晶格缺陷层18覆盖的保护环30的端部向漂移层17供给载流子。结果，有可能导致尽管形成晶格缺陷层18但是在漂移层17中局部地蓄积大量的载流子。
因此，在第二实施方式的半导体装置100中，以没有被晶格缺陷层18覆盖的保护环30为对象，在满足L/d≧1.5的位置形成阴极层22和保护环30。具体而言，如图8所示，为了获得与没有被晶格缺陷层18覆盖的保护环30之间的距离，使阴极层22在从保护环30离开了的位置结束，或者如图9所示，使晶格缺陷层18的宽度扩展，从而确保阴极层22与保护环30的距离。
此外，在本实施方式中，也与第一实施方式同样地，作为阴极层22与保护环30的位置关系，更优选满足L/d≧1.8，进而更优选满足L/d≧2.0。
通过采用上述结构，能够在形成了晶格缺陷层18的情况下抑制从没有被该晶格缺陷层18覆盖的保护环30注入大量的载流子。
(变形例)
如图10所示，晶格缺陷层18也可以形成为不延伸到外周区域。该情况下，由于保护环30未被晶格缺陷层18覆盖，因此阴极层22与保护环30的位置关系只要如在第一实施方式中说明的那样利用阴极层22的端部与保护环30之间的最小距离L而规定为L/d为1.5以上即可。
另外，在上述实施方式中，记述了衬底浓度、基极层11及阳极层21的表面浓度、以及保护环30的表面浓度的一例，但这些浓度仅为一例。另外，关于基极层11及阳极层21的形成深度、保护环30的形成深度也是同样的。
例如，关于基极层11及阳极层21的表面浓度、保护环30的表面浓度，可以是，以满足保护环30的表面浓度＞基极层11及阳极层的表面浓度的关系为条件，从1E17～8E17的范围中选择基极层11及阳极层21的表面浓度，并从2E17～1E18的范围中选择保护环30的表面浓度。另外，关于形成深度，可以是，从2～4μm的范围中选择基极层11及阳极层21的形成深度，从6～8μm的范围中选择保护环30的形成深度。进而，衬底浓度可以从5E13～2E14的范围中选择。这是因为，如果是这种程度的浓度变化及形成深度的变化，则上述Pwell区域下/阴极层正上方电流比不会大幅地变化。
虽然按照实施方式对本发明进行了记述，但是本发明并不限定于该实施方式及结构。本发明也包含各种变形例及等同范围内的变形。此外，各种组合、形态以及仅包含其中一个要素、或者包含更多或更少的要素的其它组合、形态也落入本发明的范畴及思想范围。

Claims (6)

1.一种半导体装置，其特征在于，
具备：
第一导电型的漂移层(17)；
第二导电型的基极层(11)及阳极层(21)，形成在所述漂移层的一个表层部；
发射极层(13)，选择性地形成在所述基极层；以及
第二导电型的集电极层(14)和第一导电型的阴极层(22)，形成在所述漂移层的另一个表层部；
所述半导体装置具备半导体衬底(50)，该半导体衬底(50)形成有通过所述发射极层、所述基极层、所述漂移层及所述集电极层而作为IGBT进行动作的IGBT区域(10)，并形成有与所述IGBT区域邻接、通过所述阳极层、所述漂移层及所述阴极层而作为二极管进行动作的二极管区域(20)；
在所述半导体衬底，还在将元件区域包围的外周区域，在所述漂移层的表层部形成被施加与所述阳极层相同电位的电压的第二导电型的保护环(30)，所述元件区域是相邻接地形成有所述IGBT区域和所述二极管区域的区域；
将向与所述半导体衬底的表面平行的面进行了投影的情况下的所述阴极层与所述保护环之间的距离的最小值设为L、并将所述半导体衬底的厚度设为d时，所述阴极层和所述保护环形成在满足L/d≧1.5且L/d≦6.0的位置。
2.根据权利要求1所述的半导体装置，其特征在于，
在所述漂移层中的、至少所述二极管区域的所述漂移层，形成有晶格缺陷层(18)；
所述晶格缺陷层超越所述元件区域而到达所述外周区域的所述漂移层；
以不被所述晶格缺陷层覆盖的所述保护环为对象，将向与所述半导体衬底的表面平行的面进行了投影的情况下的所述阴极层与所述保护环之间的距离的最小值设为L、并将所述半导体衬底的厚度设为d时，所述阴极层和所述保护环形成在满足L/d≧1.5的位置。
3.根据权利要求1或2所述的半导体装置，其特征在于，
所述阴极层和所述保护环形成在满足L/d≧1.8的位置。
4.根据权利要求1或2所述的半导体装置，其特征在于，
所述阴极层和所述保护环形成在满足L/d≧2.0的位置。
5.根据权利要求1或2所述的半导体装置，其特征在于，
所述保护环的杂质浓度比所述阳极层的杂质浓度高。
6.根据权利要求1或2所述的半导体装置，其特征在于，
所述IGBT区域和所述二极管区域在所述元件区域中交替地以条状排列，在所述元件区域中的所述条状的排列的两端，设有所述IGBT区域。
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