CN109166833B - 电力用半导体模块 - Google Patents

电力用半导体模块 Download PDF

Info

Publication number
CN109166833B
CN109166833B CN201810998767.6A CN201810998767A CN109166833B CN 109166833 B CN109166833 B CN 109166833B CN 201810998767 A CN201810998767 A CN 201810998767A CN 109166833 B CN109166833 B CN 109166833B
Authority
CN
China
Prior art keywords
power semiconductor
semiconductor module
diode
switching element
wide bandgap
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN201810998767.6A
Other languages
English (en)
Other versions
CN109166833A (zh
Inventor
中山靖
三木隆义
大井健史
多田和弘
井高志织
长谷川滋
田中毅
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Publication of CN109166833A publication Critical patent/CN109166833A/zh
Application granted granted Critical
Publication of CN109166833B publication Critical patent/CN109166833B/zh
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/18Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different subgroups of the same main group of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/16Fillings or auxiliary members in containers or encapsulations, e.g. centering rings
    • H01L23/18Fillings characterised by the material, its physical or chemical properties, or its arrangement within the complete device
    • H01L23/24Fillings characterised by the material, its physical or chemical properties, or its arrangement within the complete device solid or gel at the normal operating temperature of the device
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/3135Double encapsulation or coating and encapsulation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/34Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/36Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
    • H01L23/373Cooling facilitated by selection of materials for the device or materials for thermal expansion adaptation, e.g. carbon
    • H01L23/3735Laminates or multilayers, e.g. direct bond copper ceramic substrates
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/07Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/07Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00
    • H01L25/072Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00 the devices being arranged next to each other
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48135Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/48137Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48135Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/48137Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
    • H01L2224/48139Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate with an intermediate bond, e.g. continuous wire daisy chain
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491Disposition
    • H01L2224/4911Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain
    • H01L2224/49111Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain the connectors connecting two common bonding areas, e.g. Litz or braid wires
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491Disposition
    • H01L2224/4912Layout
    • H01L2224/49175Parallel arrangements
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42Wire connectors; Manufacturing methods related thereto
    • H01L24/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42Wire connectors; Manufacturing methods related thereto
    • H01L24/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/16Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic System
    • H01L29/1608Silicon carbide
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/00014Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01004Beryllium [Be]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/102Material of the semiconductor or solid state bodies
    • H01L2924/1025Semiconducting materials
    • H01L2924/10251Elemental semiconductors, i.e. Group IV
    • H01L2924/10253Silicon [Si]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/102Material of the semiconductor or solid state bodies
    • H01L2924/1025Semiconducting materials
    • H01L2924/10251Elemental semiconductors, i.e. Group IV
    • H01L2924/10254Diamond [C]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/102Material of the semiconductor or solid state bodies
    • H01L2924/1025Semiconducting materials
    • H01L2924/1026Compound semiconductors
    • H01L2924/1027IV
    • H01L2924/10272Silicon Carbide [SiC]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/102Material of the semiconductor or solid state bodies
    • H01L2924/1025Semiconducting materials
    • H01L2924/1026Compound semiconductors
    • H01L2924/1032III-V
    • H01L2924/1033Gallium nitride [GaN]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/12Passive devices, e.g. 2 terminal devices
    • H01L2924/1203Rectifying Diode
    • H01L2924/12031PIN diode
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/12Passive devices, e.g. 2 terminal devices
    • H01L2924/1203Rectifying Diode
    • H01L2924/12032Schottky diode
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/13Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304Transistor
    • H01L2924/1305Bipolar Junction Transistor [BJT]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/13Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304Transistor
    • H01L2924/1305Bipolar Junction Transistor [BJT]
    • H01L2924/13055Insulated gate bipolar transistor [IGBT]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/13Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304Transistor
    • H01L2924/1306Field-effect transistor [FET]
    • H01L2924/13091Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/153Connection portion
    • H01L2924/1531Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/191Disposition
    • H01L2924/19101Disposition of discrete passive components
    • H01L2924/19107Disposition of discrete passive components off-chip wires

Abstract

本发明涉及一种电力用半导体模块。为了得到将由Si半导体制作的开关元件的温度上升抑制为较低且能够提高模块的冷却效率的电力用半导体模块,具备由Si半导体制作的开关元件(4)和由宽禁带半导体制作的二极管(5),二极管(5)配置在电力用半导体模块(100)的中央区域,开关元件(4)配置在电力用半导体模块(100)的中央区域的两侧或周边。

Description

电力用半导体模块
本申请是申请号为201180005358.8(PCT/JP2011/000088)、申请日为2011年1月12日(进入国家阶段日为2012年7月4日)、发明名称为“电力用半导体模块”的发明专利申请的分案申请。
技术领域
本发明涉及一种内置有开关元件和对于开关元件反并联连接的二极管的电力用半导体模块。
背景技术
内置有开关元件和对于开关元件反并联连接的二极管的电力用半导体模块广泛应用于进行直流-交流、直流-直流等转换的电力转换器等。以往,在开关元件、二极管中使用Si(硅)半导体,但是最近推进应用以SiC(碳化硅)半导体为代表的宽禁带(Wide BandGap)半导体的开发。SiC半导体与Si半导体相比具有低损耗、能够进行高温动作、高耐压这种特征,通过使用SiC半导体,能够实现电力用半导体模块的小型化、低损耗化,而且,能够实现安装在电力用半导体模块上的冷却器的小型化、使用了电力用半导体模块的电力转换器的高效率化。
通过在开关元件和二极管这双方中使用SiC半导体,如上所述的效果变大。然而,开关元件与二极管相比构造复杂,因此关于在开关元件中使用SiC半导体,还留有制造上的课题。为此,提出了如下半导体模块(例如参照专利文献1):在开关元件中使用Si半导体而仅在二极管中使用SiC半导体,在同一金属基底之上配置有Si制开关元件和SiC制二极管。
专利文献1:日本特开2004-95670号公报(第10-11页、第8图)
发明内容
发明要解决的问题
在将Si制开关元件和SiC制二极管配置在同一电力用半导体模块内的情况下,与Si制开关元件相比,SiC制二极管的损耗更小,能够进行高温下的动作,因此需要考虑其特性来设为在热学上最佳的配置、构造。在专利文献1所示的现有的半导体模块中,Si制开关元件和SiC制二极管在左右分开配置。Si制开关元件和SiC制二极管配置在不同的绝缘基板之上,但是在配置多个Si制开关元件的情况下,存在如下问题:由于Si制开关元件彼此的热干扰而配置在电力用半导体模块的中央区域上的Si制开关元件的温度有可能上升。
本发明是为了解决如上所述的问题而完成的,用于得到一种如下电力用半导体模块:在将由Si半导体制作的开关元件和由能够在更高的温度下利用的宽禁带半导体制作的二极管配置在同一电力用半导体模块内的情况下,由Si半导体制作的开关元件的温度上升被抑制为较低,冷却效率高。
用于解决问题的方案
本发明所涉及的电力用半导体模块具备Si半导体元件和宽禁带半导体元件,宽禁带半导体元件配置在电力用半导体模块的中央区域,Si半导体元件配置在中央区域的两侧或周边。
发明的效果
在本发明所涉及的电力用半导体模块中,宽禁带半导体元件配置在电力用半导体模块的中央区域,Si半导体元件配置在中央区域的两侧或周边,因此,Si半导体元件的温度上升抑制为较低,能够提高电力用半导体模块的冷却效率。
附图说明
图1是本发明的实施方式1中的电力用半导体模块的截面图。
图2是表示本发明的实施方式1中的电力用半导体模块的内部配置的俯视图。
图3是表示本发明的实施方式2中的电力用半导体模块的内部配置的俯视图。
图4是表示本发明的实施方式3中的电力用半导体模块的内部配置的俯视图。
图5是表示本发明的实施方式4中的电力用半导体模块的内部配置的俯视图。
图6是本发明的实施方式5中的电力用半导体模块的截面图。
(附图标记说明)
1:底板;2:绝缘基板;3:导体图案;4:Si制开关元件;5:SiC制二极管;6、20:电线布线;7、8:主电极;9、10:控制端子;11:壳体;12:绝缘密封材料;13、14:主电极安装点;15、16:控制端子安装点;17:安装孔;18:开关元件用绝缘基板;19:二极管用绝缘基板;21:开关元件用底板;22:二极管用底板;23:绝热性材料;24:高耐热绝缘密封材料;25:低耐热绝缘密封材料;100、200、300、400、500:电力用半导体模块。
具体实施方式
实施方式1.
图1是用于实施本发明的实施方式1中的电力用半导体模块的截面图,是简化示出电力用半导体模块的截面的图。在图1中,电力用半导体模块100由底(base)板1、绝缘基板2、导体图案3、由Si半导体制作的Si制开关元件4、由作为宽禁带半导体的SiC半导体制作的SiC制二极管5、电线布线6、主电极7、8、控制端子9、10、壳体11、绝缘密封材料12等构成。Si制开关元件4是Si半导体元件,SiC制二极管5是宽禁带半导体元件。
底板1用于将电力用半导体模块100安装到外部的冷却器,在底板1的一面(图1中是下侧)从外部安装未图示的冷却器。在电力用半导体模块100内部产生的热经由底板1放出到外部。在底板1的另一面(图1中是上侧)通过焊锡等设置有绝缘基板2。绝缘基板2的一面(图1中是下侧)是安装在底板1上的面,在绝缘基板2的另一面(图1中是上侧)形成有作为电流路径的导体图案3。
在导体图案3之上安装有Si制开关元件4和SiC制二极管5。Si制开关元件4只要是能够进行接通/断开控制的半导体元件即可,例如使用IGBT(Insulated Gate BipolarTransistor:绝缘栅双极型晶体管)、MOSFET(Metal-Oxide-Semiconductor Field-EffectTransistor:金属氧化物半导体场效应晶体管)等。另外,作为SiC制二极管5,例如使用肖特基势垒二极管(Schottky Barrier Diode)、PiN(p-intrinsic-n)二极管等。
Si制开关元件4和SiC制二极管5反并联地电连接,在例如使用IGBT作为Si制开关元件4的情况下,IGBT的集电极与SiC制二极管5的阴极经由导体图案3电连接。在Si制开关元件4和SiC制二极管5上施以电线布线6,经由导体图案3和电线布线6与主电极7、8和控制端子9、10电连接。主电极7、8连接到未图示的外部电路,构成电力转换器等主电路。从外部电路对控制端子9、10提供对Si制开关元件4进行接通/断开控制的控制信号。此外,在图1中为了便于理解电力用半导体模块内的结构,简化主电极7、8以及控制端子9、10来记载。
Si制开关元件4、SiC制二极管5等构成电力用半导体模块100的部件类收纳在壳体11内。而且,为了保证电力用半导体模块100内部的绝缘,在壳体11内填充有绝缘密封材料12。
图2是表示在从图1所示的状态除去主电极7、8、控制端子9、10、壳体11以及绝缘密封材料12的状态下从上面观察电力用半导体模块100时的电力用半导体模块的内部配置的俯视图。在图2中,附加了与图1相同的标记的部件是相同或者与其相当的部件,这在说明书的全文中是通用的。
图1所示的主电极7连接在导体图案3之上的主电极安装点13,主电极8、控制端子9、10分别连接在主电极安装点14、控制端子安装点15、16,经由导体图案3和电线布线6与Si制开关元件4、SiC制二极管5电连接。另外,在底板1上设置有安装孔17,电力用半导体模块100利用安装孔17安装在外部的冷却器等。
Si制开关元件4、SiC制二极管5在电力用半导体模块100中分别配置有多个(在图2中,Si制开关元件4为16个,SiC制二极管5为32个)。在图2中,多个SiC制二极管5集中配置在电力用半导体模块100的中央区域。本实施方式中的中央区域是指从上面观察电力用半导体模块100时分割左右的带状区域。多个Si制开关元件4在该中央区域的两侧区域分开配置(配置在电力用半导体模块100的两侧)。也就是说,SiC制二极管5被配置成处于多个Si制开关元件4之间。作为一例,在图2中,在电力用半导体模块100的两侧分开配置有各8个Si制开关元件4,在其间配置有32个SiC制二极管5。
一般,在将开关元件、二极管等半导体元件多数安装在同一电力用半导体模块内的情况下,即使各半导体元件的损耗相同,安装在电力用半导体模块的中央区域的半导体元件由于难以散热,因此温度容易上升。另一方面,安装在电力用半导体模块的两侧或周边部的半导体元件容易散热,温度难以上升。因此,例如在二极管中使用与开关元件相同的Si半导体来安装在电力用半导体模块的中央区域的情况下,存在二极管的温度过度上升的问题。然而,SiC制二极管具有低损耗这一特征,因此如本实施方式那样即使将SiC制二极管5配置在电力用半导体模块100的中央区域也能够抑制温度上升。另外,SiC制二极管5能够在高温下利用,因此即使配置在温度容易上升的中央区域也能够正常地动作。并且,由于将Si制开关元件4配置在中央区域的两侧,因此容易从Si制开关元件4散热,能够抑制温度上升。因此,例如能够实现设置于外部的冷却器的小型化、能够通过减小Si制开关元件4的配置区域来使电力用半导体模块100本身小型化。
此外,SiC制二极管5具有能够在高温下利用的特征,在高温下利用的情况下,例如具有能够减小二极管的配置区域等的优点。但是,并不一定需要在高温下利用,也可以在与Si制开关元件4相同的温度范围内使用。在该情况下损耗也低,因此能够配置在电力用半导体模块100的中央区域。另外,对于绝缘密封材料、焊锡等二极管周边部件,也可以使用能够在与Si制开关元件4相同的温度范围内使用的部件。另外,由于不会在高温下利用,因此对于热循环的可靠性也提高。
另外,在电力用半导体模块100的中央区域配置SiC制二极管5,在两侧配置Si制开关元件4,因此SiC制二极管5的散热性变差,Si制开关元件4的散热性变好。因此,不需要为了使Si制开关元件4的散热性优于SiC制二极管5的散热性而设置使Si制开关元件4正下方的冷却性能高于SiC制二极管5正下方的冷却性能那样的特殊的冷却器,能够在各自所能够使用的温度范围内使用,因此通用性变高。
在本实施方式中的电力用半导体模块100中,在相同的底板1、绝缘基板2之上配置有Si制开关元件4和SiC制二极管5。在将Si制开关元件、SiC制二极管分别配置在不同的绝缘基板、底板之上的情况下,具有抑制热干扰的影响的优点。然而,考虑到开关元件的损耗变大的运行条件与二极管的损耗变大的运行条件不同的情况。例如在将电力用半导体模块作为逆变器使用于电动机驱动的情况下,在从逆变器侧向电动机侧供给能量的动力运行中,与二极管相比开关元件的通电时间更长,开关元件的损耗变大,在从电动机侧向逆变器侧供给能量的再生运行中,与开关元件相比二极管的通电时间更长,二极管的损耗变大。
因此,在与SiC制二极管5相比Si制开关元件4的损耗大的条件下,来自SiC制二极管5的热干扰的影响小,从Si制开关元件4能够使用绝缘基板2、底板1整体来散热,因此在相同的底板1、绝缘基板2之上配置Si制开关元件4和SiC制二极管5的情况下电力用半导体模块100整体的散热性提高。另外,在相同的底板1、绝缘基板2之上配置Si制开关元件4和SiC制二极管5的情况下,还具有部件件数减少、布线也容易的优点。
本实施方式中的电力用半导体模块的结构是一例,只要将SiC制二极管5配置在电力用半导体模块100的中央区域而将Si制开关元件4配置在中央区域的两侧即可,因此对构成电力用半导体模块100的其它部件类的配置等没有特别的限制。例如关于主电极7、8、控制电极9、10与Si制开关元件4、SiC制二极管5之间的连接,也只要电连接即可,可以直接通过电线布线连接到主电极7、8,或者也可以不使用电线布线而进行使用母线(bus bar)的布线。在这种情况下,有可能使电力用半导体模块100内部的Si制开关元件4、SiC制二极管5的配置多少发生变化,但是只要将SiC制二极管5配置在电力用半导体模块100的中央区域而将Si制开关元件4配置在中央区域的两侧即可。
如上所述,将由作为低损耗且能够在高温下利用的宽禁带半导体的SiC半导体制作的SiC制二极管5配置在温度容易上升的电力用半导体模块100的中央区域,将由Si半导体制作的Si制开关元件4配置在难以成为高温的电力用半导体模块100的两侧,因此Si制开关元件4的温度上升被抑制为较低,能够提高电力用半导体模块100的冷却效率。
此外,在本实施方式中,说明了将SiC制二极管5配置在电力用半导体模块100的中央区域而将Si制开关元件4配置在电力用半导体模块100的两侧的情况。然而,也可以使用由SiC半导体制作的SiC制开关元件以及由Si半导体制作的Si制二极管,将SiC制开关元件配置在电力用半导体模块的中央区域,将Si制二极管配置在电力用半导体的两侧。在这种情况下,与SiC制开关元件和Si制二极管的配置相应地,导体图案、电线布线、主电极、控制端子等也被适当地配置。这样,将作为低损耗且能够在高温下利用的宽禁带半导体的SiC制开关元件配置在温度容易上升的电力用半导体模块的中央区域,将Si制二极管配置在难以成为高温的电力半导体模块的两侧,因此Si制二极管的温度上升被抑制为较低,能够提高电力用半导体模块的冷却效率。
实施方式2.
图3是表示用于实施本发明的实施方式2中的电力用半导体模块的内部配置的俯视图。与图2同样地,是在除去主电极、控制端子、壳体以及绝缘密封材料的状态下从上面观察电力用半导体模块200的图。在实施方式1中,SiC制二极管5配置在电力用半导体模块100的中央区域,Si制开关元件4配置在中央区域的两侧,但是在本实施方式中,与实施方式1的不同之处在于,Si制开关元件4配置在包围中央区域的周边部(配置在电力用半导体模块200的周边部)。
Si制开关元件4、SiC制二极管5在电力用半导体模块200中分别配置有多个(在图3中,Si制开关元件4为16个,SiC制二极管5为32个)。在图3中,多个SiC制二极管5集中配置在电力用半导体模块200的中央区域。本实施方式中的中央区域是指从上面观察电力用半导体模块200时中心部的区域。多个Si制开关元件4配置在包围该中央区域的周边部。也就是说,以被Si制开关元件4包围的方式将SiC制二极管5配置在电力用半导体模块200的中央区域。作为一例,在图3中,以形成外周的方式配置有16个Si制开关元件4,以被16个Si制开关元件4包围的方式配置有32个SiC制二极管5。此外,随着Si制开关元件4和SiC制二极管5的配置变更,电线布线6等的布线图案也被变更。
根据本实施方式,使用具有低损耗、能够在高温下利用的特征的SiC制二极管5,因此能够将SiC制二极管配置在电力用半导体模块200的中央区域并将所有的Si制开关元件4配置在中央区域的周边部。因此,与实施方式1的结构相比Si制开关元件4的散热性更好,更能够抑制Si制开关元件4的温度上升。此外,SiC制二极管5具有能够在高温下利用的特征,但是不一定需要在高温下使用,也可以在与Si制开关元件4相同的温度范围内使用。
本实施方式中的电力用半导体模块的结构是一例,只要将SiC制二极管5配置在电力用半导体模块200的中央区域而将Si制开关元件4配置在包围中央区域的周边部即可,因此与实施方式1同样地对构成电力用半导体模块200的其它部件类的配置等没有特别的限制。例如关于主电极7、8、控制电极9、10与Si制开关元件4、SiC制二极管5之间的连接,也只要电连接即可,可以直接通过电线布线连接到主电极7、8,或者也可以不使用电线布线而进行使用母线的布线。在这种情况下,有可能使电力用半导体模块200内部的Si制开关元件4、SiC制二极管5的配置多少发生变化,但是只要将SiC制二极管5配置在电力用半导体模块200的中央区域而将Si制开关元件4配置在包围中央区域的周边部即可。
如上所述,由作为低损耗且能够在高温下利用的宽禁带半导体的SiC半导体制作的SiC制二极管5配置在温度容易上升的电力用半导体模块200的中央区域,将由Si半导体制作的Si制开关元件4配置在难以成为高温的电力用半导体模块200的周边部,因此Si制开关元件4的温度上升被抑制为较低,能够提高电力用半导体模块200的冷却效率。
此外,在本实施方式中,说明了将SiC制二极管5配置在电力用半导体模块200的中央区域而将Si制开关元件4配置在电力用半导体模块200的周边部的情况。然而,也可以使用由SiC半导体制作的SiC制开关元件以及由Si半导体制作的Si制二极管,将SiC制开关元件配置在电力用半导体模块的中央区域,将Si制二极管配置在电力用半导体的周边部。在这种情况下,与SiC制开关元件和Si制二极管的配置相应地,导体图案、电线布线、主电极、控制端子等也被适当地配置。这样,将作为低损耗且能够在高温下利用的宽禁带半导体的SiC制开关元件配置在温度容易上升的电力用半导体模块的中央区域,将Si制二极管配置在难以成为高温的电力半导体模块的周边部,因此Si制二极管的温度上升被抑制为较低,能够提高电力用半导体模块的冷却效率。
实施方式3.
图4是表示用于实施本发明的实施方式3中的电力用半导体模块的内部配置的俯视图。与图2同样地,是在除去主电极、控制端子、壳体以及绝缘密封材料的状态下从上面观察电力用半导体模块300的图。在本实施方式中,与实施方式1的不同之处在于,Si制开关元件4和SiC制二极管5安装在不同的绝缘基板18、19之上。Si制开关元件4被安装在开关元件用绝缘基板18上,SiC制二极管5被安装在二极管用绝缘基板19上。另外,由于Si制开关元件4和SiC制二极管5被安装在不同的绝缘基板18、19上,因此另行设置有将开关元件用绝缘基板18的导体图案与二极管用绝缘基板19的导体图案电连接的电线布线20。此外,也可以不使用电线布线,只要电连接即可,例如可以直接通过电线布线连接到主电极7、8,或者也可以不使用电线布线而进行使用母线的布线。
在如实施方式1、2中的电力用半导体模块那样将Si制开关元件4和SiC制二极管5安装在同一绝缘基板2之上的情况下,如果Si制开关元件4和SiC制二极管5在同时发热的条件下动作,则由于Si制开关元件4和SiC制二极管5的热干扰而温度上升。本实施方式用于减轻这种热干扰的影响,将Si制开关元件4和SiC制二极管5安装在不同的绝缘基板18、19之上,因此Si制开关元件4难以受到来自SiC制二极管5的热干扰的影响,能够抑制Si制开关元件4的温度上升。
此外,开关元件用绝缘基板18和二极管用绝缘基板19也可以是相同的材质,在高温下利用SiC制二极管5的情况下,也可以考虑耐热性、热循环性来使用不同的材质的部件。
如上所述,Si制开关元件4和SiC制二极管5被安装在不同的绝缘基板18、19之上,因此Si制开关元件4难以受到来自SiC制二极管5的热干扰的影响,能够抑制Si制开关元件4的温度上升。
实施方式4.
图5是用于实施本发明的实施方式4中的电力用半导体模块的截面图,是简化示出电力用半导体模块的截面的图。与图2同样地,是在除去主电极、控制端子、壳体以及绝缘密封材料的状态下从上面观察电力用半导体模块400的图。在本实施方式中,与实施方式3的不同之处在于,安装有Si制开关元件4的开关元件用绝缘基板18和安装有SiC制二极管5的二极管用绝缘基板19被安装在不同的底板21、22之上。安装有Si制开关元件4的开关元件用绝缘基板18被安装在开关元件用底板21,安装有SiC制二极管5的二极管用绝缘基板19被安装在二极管用底板22。在图5中,在二极管用底板22的两侧设置有开关元件用底板21。通过树脂等绝热性材料23来连接开关元件用底板21与二极管用底板22之间。另外,在各底板21、22中设置有安装孔17。
在如实施方式1~3中的电力用半导体模块那样Si制开关元件4和SiC制二极管5安装在同一底板1之上的情况下,如果Si制开关元件4和SiC制二极管5在同时发热的条件下动作,则由于Si制开关元件4和SiC制二极管5的热干扰而温度上升。本实施方式用于减轻这种热干扰的影响,将Si制开关元件4和SiC制二极管5安装在不同的底板21、22之上,因此Si制开关元件4难以受到来自SiC制二极管5的热干扰的影响,与实施方式3所示的电力用半导体模块300相比,更能够抑制Si制开关元件4的温度上升。
如上所述,Si制开关元件4和SiC制二极管5安装在不同的底板21、22之上,因此Si制开关元件4难以受到来自SiC制二极管5的热干扰的影响,能够抑制Si制开关元件4的温度上升。
实施方式5.
图6是用于实施本发明的实施方式5中的电力用半导体模块的截面图,是简化示出电力用半导体模块的截面的图。在图6中未示出主电极和控制端子。在本实施方式中的电力用半导体模块500中,与实施方式1~4的不同之处在于,不将填充在壳体11内的绝缘密封材料设为一种,而是使用高耐热绝缘密封材料24和低耐热绝缘密封材料25这两种。在SiC制二极管5的周边使用高耐热绝缘密封材料24,在Si制开关元件4的周边等除此以外的部分使用与高耐热密封材料24相比耐热性低的低耐热绝缘密封材料25。
作为高耐热绝缘密封材料24,例如使用氟系树脂(fluorocarbon resin)、聚酰亚胺、聚酰胺、环氧树脂、进而是提高交联密度或添加金属氧化物而成的提高耐热性的硅酮系树脂。作为低耐热绝缘密封材料25,使用硅酮凝胶(silicone gel)、硅酮橡胶等。期望高耐热绝缘密封材料24覆盖SiC制二极管5和连接于SiC制二极管5的电线布线6,为了确保对于热循环的可靠性,期望电线布线不横跨不同的两种绝缘密封材料24、25之间。
这样,通过在SiC制二极管5的周边使用高耐热绝缘密封材料24,能够在高温下利用SiC制二极管5。另外,在Si制开关元件4的周边等除此之外的部分使用低耐热绝缘密封材料25,低耐热绝缘密封材料25与高耐热绝缘密封材料24相比廉价,因此与仅使用高耐热绝缘密封材料24的情况相比能够抑制制造成本。另外,也有时根据氟系树脂、聚酰亚胺、聚酰胺等高耐热绝缘密封材料而难以实现厚膜化,通过如本实施方式那样将高耐热绝缘密封材料24限定为仅覆盖SiC制二极管5周边,还能够使用难以实现厚膜化的高耐热绝缘密封材料。
图6示出了Si制开关元件4和SiC制二极管5安装在不同的底板21、22、绝缘基板18、19的情况,但是在如实施方式1~3中的电力用半导体模块那样Si制开关元件4和SiC制二极管5安装在安装于同一底板1的同一绝缘基板2上的情况、底板1相同但安装在不同的绝缘基板18、19之上的情况等的、Si制开关元件和SiC制二极管的配置等不同的情况下也能够应用。
如上所述,覆盖配置有SiC制二极管5的区域的高耐热绝缘密封材料24与覆盖配置有Si制开关元件4的区域的低耐热绝缘密封材料25相比具有高耐热特性,因此能够在高温下利用SiC制二极管5。
此外,在所有的实施方式中,说明了在二极管中使用SiC半导体的情况,但是,只要二极管与Si制开关元件相比具有低损耗、能够在高温下利用的特征即可,例如也可以在二极管中使用氮化镓系材料或金刚石等其它宽禁带半导体。

Claims (8)

1.一种电力用半导体模块,在所述电力用半导体模块中多个Si半导体元件和多个宽禁带半导体元件被绝缘密封材料覆盖,该电力用半导体模块的特征在于,
所述电力用半导体模块具备多个绝缘基板,所述绝缘基板安装有所述Si半导体元件以及沿着一边的所述宽禁带半导体元件,
多个所述绝缘基板使各自的所述一边相互邻接地配置于所述电力用半导体模块,
所述一边的相对侧的另一边以与所述电力用半导体模块的收纳多个所述绝缘基板的壳体相对的方式配置于电力用半导体模块,
多个所述宽禁带半导体元件被配置于所述电力用半导体模块的中央区域,
多个所述Si半导体元件配置在所述中央区域的两侧或周边,
所述宽禁带半导体元件的大小小于所述Si半导体元件的大小。
2.根据权利要求1所述的电力用半导体模块,其特征在于,
所述Si半导体元件是开关元件,所述宽禁带半导体元件是二极管,所述开关元件的正极侧电极和所述二极管的阴极电连接,所述电力用半导体模块具有主端子,该主端子被配置于沿着所述一边安装的所述宽禁带半导体元件之间,或者被配置于比沿着所述一边安装的所述宽禁带半导体元件更靠所述另一边侧。
3.根据权利要求1所述的电力用半导体模块,其特征在于,
所述绝缘基板被设置在同一底板之上。
4.根据权利要求1所述的电力用半导体模块,其特征在于,
覆盖配置有所述宽禁带半导体元件的区域的绝缘密封材料具有比覆盖配置有所述Si半导体元件的区域的绝缘密封材料高的耐热特性。
5.根据权利要求1所述的电力用半导体模块,其特征在于,
覆盖配置有所述宽禁带半导体元件的区域的绝缘密封材料由氟系树脂、聚酰亚胺、聚酰胺、环氧树脂、高耐热硅酮系树脂中的任一种形成,覆盖配置有所述Si半导体元件的区域的绝缘密封材料由硅酮凝胶或硅酮橡胶形成。
6.根据权利要求1所述的电力用半导体模块,其特征在于,
所述宽禁带半导体元件是由碳化硅、氮化镓系材料或金刚石制作的。
7.一种电力用半导体模块,在所述电力用半导体模块中多个Si半导体开关元件和多个宽禁带半导体二极管元件被绝缘密封材料覆盖,该电力用半导体模块的特征在于,
所述电力用半导体模块具备多个绝缘基板,所述绝缘基板安装有所述Si半导体开关元件以及沿着一边的所述宽禁带半导体二极管元件,
多个所述绝缘基板使各自的所述一边相互邻接地配置于所述电力用半导体模块,
所述一边的相对侧的另一边以与所述电力用半导体模块的收纳多个所述绝缘基板的壳体相对的方式配置于电力用半导体模块,
关于多个所述Si半导体开关元件,使所述宽禁带半导体二极管元件的元件数多于所述Si半导体开关元件的元件数,
多个所述宽禁带半导体元件被配置于所述电力用半导体模块的中央区域,
多个所述Si半导体元件配置在所述中央区域的两侧或周边,
所述宽禁带半导体元件的大小小于所述Si半导体元件的大小。
8.根据权利要求7所述的电力用半导体模块,其特征在于,
所述Si半导体开关元件的正极侧电极和所述宽禁带半导体二极管元件的阴极电连接。
CN201810998767.6A 2010-01-15 2011-01-12 电力用半导体模块 Active CN109166833B (zh)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
JP2010-006952 2010-01-15
JP2010006952 2010-01-15
CN2011800053588A CN102687270A (zh) 2010-01-15 2011-01-12 电力用半导体模块
PCT/JP2011/000088 WO2011086896A1 (ja) 2010-01-15 2011-01-12 電力用半導体モジュール

Related Parent Applications (1)

Application Number Title Priority Date Filing Date
CN2011800053588A Division CN102687270A (zh) 2010-01-15 2011-01-12 电力用半导体模块

Publications (2)

Publication Number Publication Date
CN109166833A CN109166833A (zh) 2019-01-08
CN109166833B true CN109166833B (zh) 2022-04-08

Family

ID=44304174

Family Applications (2)

Application Number Title Priority Date Filing Date
CN2011800053588A Pending CN102687270A (zh) 2010-01-15 2011-01-12 电力用半导体模块
CN201810998767.6A Active CN109166833B (zh) 2010-01-15 2011-01-12 电力用半导体模块

Family Applications Before (1)

Application Number Title Priority Date Filing Date
CN2011800053588A Pending CN102687270A (zh) 2010-01-15 2011-01-12 电力用半导体模块

Country Status (6)

Country Link
US (1) US9129885B2 (zh)
EP (1) EP2525404B1 (zh)
JP (1) JP5147996B2 (zh)
KR (1) KR101375502B1 (zh)
CN (2) CN102687270A (zh)
WO (1) WO2011086896A1 (zh)

Families Citing this family (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5790039B2 (ja) * 2010-07-23 2015-10-07 富士電機株式会社 半導体装置
JP5391162B2 (ja) * 2010-08-17 2014-01-15 三菱電機株式会社 電力用半導体装置
US9299628B2 (en) 2011-07-11 2016-03-29 Mitsubishi Electric Corporation Power semiconductor module
EP2851631B1 (en) * 2012-04-16 2020-03-11 Mitsubishi Electric Corporation Heat pump device, air conditioner, and cooling machine
JP6102297B2 (ja) * 2013-02-06 2017-03-29 富士電機株式会社 半導体装置
JP5801339B2 (ja) * 2013-03-22 2015-10-28 株式会社東芝 半導体装置
DE102013205138A1 (de) * 2013-03-22 2014-09-25 Infineon Technologies Ag Halbleiterbauelement, Halbleitermodul sowie Verfahren zur Herstellung eines Halbleiterbauelements und eines Halbleitermoduls
JP6213562B2 (ja) * 2013-05-29 2017-10-18 三菱電機株式会社 半導体装置
US9899328B2 (en) * 2014-02-11 2018-02-20 Mitsubishi Electric Corporation Power semiconductor module
WO2015136603A1 (ja) * 2014-03-10 2015-09-17 株式会社日立製作所 パワー半導体モジュール及びその製造検査方法
WO2016009556A1 (ja) 2014-07-18 2016-01-21 三菱電機株式会社 車両用補助電源装置
CN104835794B (zh) * 2015-03-23 2018-02-02 广东美的制冷设备有限公司 智能功率模块及其制造方法
WO2016185924A1 (ja) * 2015-05-20 2016-11-24 三菱電機株式会社 電力変換装置およびこれを適用した車両駆動システム
JP6524809B2 (ja) 2015-06-10 2019-06-05 富士電機株式会社 半導体装置
DE102019135060A1 (de) * 2019-12-19 2021-06-24 Dspace Digital Signal Processing And Control Engineering Gmbh Mehrzonenkühlkörper für Platinen
JP7466483B2 (ja) 2021-03-17 2024-04-12 三菱電機株式会社 半導体装置
CN113707643A (zh) * 2021-08-30 2021-11-26 中国振华集团永光电子有限公司(国营第八七三厂) 一种高集成高可靠igbt功率模块及其制造方法
WO2024018810A1 (ja) * 2022-07-21 2024-01-25 ローム株式会社 半導体装置

Family Cites Families (23)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03126055A (ja) 1989-10-11 1991-05-29 Seiko Epson Corp 電子写真記録装置の現像器ユニット
JPH03126055U (zh) * 1990-03-30 1991-12-19
JP3480811B2 (ja) * 1997-07-15 2003-12-22 株式会社東芝 電圧駆動型電力用半導体装置
JPH11274482A (ja) * 1998-03-20 1999-10-08 Toshiba Corp 半導体装置
JP2000311972A (ja) * 1999-04-28 2000-11-07 Hitachi Ltd 半導体装置
JP4594477B2 (ja) * 2000-02-29 2010-12-08 三菱電機株式会社 電力半導体モジュール
US7012810B2 (en) 2000-09-20 2006-03-14 Ballard Power Systems Corporation Leadframe-based module DC bus design to reduce module inductance
JP3621659B2 (ja) * 2001-05-09 2005-02-16 三菱電機株式会社 電力変換システム
JP4540884B2 (ja) * 2001-06-19 2010-09-08 三菱電機株式会社 半導体装置
KR100700863B1 (ko) * 2002-06-13 2007-03-29 마츠시타 덴끼 산교 가부시키가이샤 반도체디바이스 및 그 제조방법
JP2004095670A (ja) 2002-08-29 2004-03-25 Toshiba Corp 半導体装置
US7034345B2 (en) * 2003-03-27 2006-04-25 The Boeing Company High-power, integrated AC switch module with distributed array of hybrid devices
US6987670B2 (en) * 2003-05-16 2006-01-17 Ballard Power Systems Corporation Dual power module power system architecture
US7488973B2 (en) * 2003-07-30 2009-02-10 The Kansai Electric Power Co., Inc. High-heat-resistant semiconductor device
WO2007016649A2 (en) * 2005-08-02 2007-02-08 Satcon Technology Corporation Double-sided package for power module
JP5168866B2 (ja) * 2006-09-28 2013-03-27 三菱電機株式会社 パワー半導体モジュール
JP4471967B2 (ja) * 2006-12-28 2010-06-02 株式会社ルネサステクノロジ 双方向スイッチモジュール
JP4980126B2 (ja) * 2007-04-20 2012-07-18 株式会社日立製作所 フリーホイールダイオードとを有する回路装置
JP5099417B2 (ja) 2007-05-22 2012-12-19 アイシン・エィ・ダブリュ株式会社 半導体モジュール及びインバータ装置
US7791208B2 (en) * 2007-09-27 2010-09-07 Infineon Technologies Ag Power semiconductor arrangement
US7808101B2 (en) * 2008-02-08 2010-10-05 Fairchild Semiconductor Corporation 3D smart power module
JP5206102B2 (ja) * 2008-05-08 2013-06-12 トヨタ自動車株式会社 半導体装置
JP4988784B2 (ja) 2009-03-30 2012-08-01 株式会社日立製作所 パワー半導体装置

Also Published As

Publication number Publication date
US20120286292A1 (en) 2012-11-15
CN102687270A (zh) 2012-09-19
WO2011086896A1 (ja) 2011-07-21
JPWO2011086896A1 (ja) 2013-05-16
KR20120101121A (ko) 2012-09-12
US9129885B2 (en) 2015-09-08
JP5147996B2 (ja) 2013-02-20
KR101375502B1 (ko) 2014-03-18
CN109166833A (zh) 2019-01-08
EP2525404A1 (en) 2012-11-21
EP2525404B1 (en) 2022-03-16
EP2525404A4 (en) 2014-01-01

Similar Documents

Publication Publication Date Title
CN109166833B (zh) 电力用半导体模块
JP6230660B2 (ja) 電力用半導体モジュール
US10778113B2 (en) Intelligent power module, electric vehicle, and hybrid car
EP2722879B1 (en) Semiconductor unit and semiconductor device using the same
CN106158839B (zh) 半导体器件
EP3185292B1 (en) Power conversion device
JP4884830B2 (ja) 半導体装置
US8373197B2 (en) Circuit device
US10217690B2 (en) Semiconductor module that have multiple paths for heat dissipation
WO2014097798A1 (ja) 半導体装置
JP2012105419A (ja) 電力変換装置
JP2012175070A (ja) 半導体パッケージ
CN110323186A (zh) 半导体装置、半导体装置的制造方法以及电力变换装置
US11450647B2 (en) Semiconductor module and semiconductor device including the same
JP2019134080A (ja) 半導体モジュール
US11749731B2 (en) Semiconductor device
US20230307326A1 (en) Semiconductor device, method for producing semiconductor device, and power conversion apparatus
US20190355649A1 (en) Semiconductor device
CN114144965A (zh) 电路装置
JP2022162190A (ja) 半導体装置

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant