CN108242435A - 半导体器件的制造方法 - Google Patents

半导体器件的制造方法 Download PDF

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Publication number
CN108242435A
CN108242435A CN201711089638.7A CN201711089638A CN108242435A CN 108242435 A CN108242435 A CN 108242435A CN 201711089638 A CN201711089638 A CN 201711089638A CN 108242435 A CN108242435 A CN 108242435A
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China
Prior art keywords
bulb
pad
load
semiconductor devices
conducting wire
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Granted
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CN201711089638.7A
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CN108242435B (zh
Inventor
松原优子
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Renesas Electronics Corp
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Renesas Electronics Corp
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Publication of CN108242435A publication Critical patent/CN108242435A/zh
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Publication of CN108242435B publication Critical patent/CN108242435B/zh
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Abstract

本发明提供一种半导体器件的制造方法，其课题在于提高半导体器件的可靠性。一实施方式的半导体器件的制造方法包括以下工序。即，半导体器件的制造方法包括活化工序(ST5)，在该工序中，一边利用载荷(M3)按压与半导体芯片的第一电极相接触的第一导线的球部，一边对上述球部施加超声波。另外，半导体器件的制造方法还包括主接合工序(ST6)，在该工序中，在上述第一工序之后，一边利用比载荷(M3)大的载荷(M4)按压上述球部，一边对上述球部施加上述超声波，来将上述球部与上述第一电极接合。

Description

半导体器件的制造方法
技术领域
本发明涉及半导体器件的制造技术，例如涉及一种适用于包括在半导体芯片的电极焊盘上连接金属导线的工序在内的半导体器件的制造方法的有效技术。
背景技术
在日本特开平2-297949号公报(专利文献1)中，记载了一种在半导体芯片的电极焊盘上连接金属导线的工序中对焊头(bonding tool)施加载荷及超声波的导线接合(wirebonding)方法。
另外，在日本特开平7-58142号公报(专利文献2)中，记载了一种在进行热压接方式的导线接合时施加超声波振动的导线接合装置。
现有技术文献
专利文献1：日本特开平2-297949号公报
专利文献2：日本特开平7-58142号公报
发明内容
作为将半导体器件的外部端子与半导体芯片的电极焊盘进行电连接的方法，有在电极焊盘上连接导线的方法。作为连接电极焊盘与导线的方法，有在导线的顶端形成球部之后将球部压接到电极焊盘上的球焊方式。在通过球焊方式连接导线与电极焊盘时，会对半导体芯片的构成部件中的设于电极焊盘周边的部件施加应力。因此，从抑制电极焊盘本身或设于电极焊盘周边的部件受到损伤并提高可靠性的观点来看，需要一种在压接球部时降低对电极焊盘施加的应力的技术。
其他课题和新的特征将从本说明书的叙述及附图中来明确。
作为一实施方式的半导体器件的制造方法包括以下工序。即，半导体器件的制造方法包括如下的第一工序：一边利用第一载荷按压与半导体芯片的第一电极相接触的第一导线的球部，一边对上述球部施加超声波。另外，半导体器件的制造方法还包括如下工序：在上述第一工序之后，一边利用比上述第一载荷大的第二载荷按压上述球部，一边对上述球部施加上述超声波，来将上述球部与上述第一电极接合。
发明效果
根据上述一实施方式，能够提高半导体器件的可靠性。
附图说明
图1是一实施方式的半导体器件的俯视图。
图2是沿着图1的A-A线的剖视图。
图3是以透视图1所示的封固体的状态来示出半导体器件的内部构造的透视俯视图。
图4是图3所示的半导体芯片的俯视图。
图5是沿着图4的A-A线的放大剖视图。
图6是将图5的A部进一步放大后的放大剖视图。
图7是示出一实施方式的半导体器件的组装流程的说明图。
图8是示出在图7所示的基材准备工序中准备的引线框架的一部分的放大俯视图。
图9是示出在沿着图8的A-A线的剖面中，在引线框架的芯片焊盘上搭载有半导体芯片的状态的放大剖视图。
图10是示出将图9所示的半导体芯片与多条引线经由导线电连接后的状态的放大剖视图。
图11是示出将图10所示的半导体芯片进行树脂封固后的状态的放大剖视图。
图12是示出在图11所示的多条引线的露出面形成金属膜、并在将其分别切断之后成形后的状态的放大俯视图。
图13是示出在图4的B部中，在焊盘上连接有导线的状态的放大俯视图。
图14是沿着图13的A-A线的放大剖视图。
图15是示出在图7所示的导线接合工序中使用的导线接合装置与引线框架之间的位置关系的俯视图。
图16是示意性地示出沿着图15的A-A线的剖面的剖视图。
图17是示出在图7所示的导线接合工序中的将导线的球部与焊盘连接的工序中，焊头的高度、对球部施加的载荷、擦除动作的有无、以及超声波振动的有无的关系的时序图。
图18是在与图13对应的焊盘中表示使球部与焊盘接触后的状态的放大俯视图。
图19是沿着图18的A-A线的放大剖视图。
图20是示出按压图18所示的球部而使之变形后的状态的放大俯视图。
图21是沿着图20的A-A线的放大剖视图。
图22是示意性地示出使图20所示的球部进行擦除动作的方向的放大俯视图。
图23是沿着图22的A-A线的放大剖视图。
图24是示意性地示出对图22所示的球施加超声波而使之与焊盘接合后的状态的放大俯视图。
图25是沿着图24的A-A线的放大剖视图。
图26是作为图17的变形例的时序图。
图27是作为图17的其他变形例的时序图。
图28是作为图17的其他变形例的时序图。
图29是作为图2的变形例的半导体器件的剖视图。
附图标记说明
BL 接合引线(端子)
BW 导线(导电性部件)
BWb 球部
CAP 焊针
CBb 下表面
CBP 导体图案(布线)
CBt 上表面
CP 半导体芯片
CPb 背面(下表面)
CPs 侧面
CPs1、CPs2、CPs3、CPs4、Pks1、Pks2、Pks3、Pks4、S1、S2、S3、S4 边(主边)
CPt 表面(主面、上表面)
DB 芯片焊接材料(粘结材料)
DL 布线层
DP 芯片焊盘(芯片搭载部)
DPt 上表面(表面、主面、芯片搭载面)
DR1、DR2、DR3 方向
HL 悬垂引线
ILD 内引线部
IML、IML1 绝缘层
LD 引线(端子、外部端子)
LDt 上表面
LF 引线框架(基材)
LFa 器件形成部
LFb 框部
M1、M2、M3、M4 载荷
MC 金属膜(包装镀膜)
MD 成形模具
MDc 腔
MR 封固体(树脂体、封固部)
MRb 下表面(背面、被安装面)
MRs 侧面
MRt 上表面
OLD 外引线部
OSP 偏置部
PD 焊盘(电极、电极焊盘、接合焊盘)
PDa 合金层
PDb 背面
PDt 接合面
PKG1、PKG2 半导体器件
PV 保护膜(钝化膜、绝缘膜)
PVb 下表面(面)
PVk 开口部
PVt 上表面(面)
Q1 半导体元件
SB 焊锡球
SDL 布线部
SPP 溅起部
SS 半导体衬底
SSb 下表面(背面)
SSt 上表面(半导体元件形成面)
ST1 球部形成工序
ST2 球部接触工序
ST3 球部变形工序
ST4 擦除工序
ST5 活化工序
ST6 主接合工序
STG 载台
SUP 支承部
TB 系杆
TH1、THcb、THpd、THpv 厚度
US1 超声波
USG 振荡器
USH 变幅杆
WBD 导线接合装置
WS 布线衬底(基材)
WSb 下表面
WSt 上表面(主面)
WSw 布线
具体实施方式
(本申请中的记载形式、基本用语及用法的说明)
在本申请中，为了方便说明，根据需要将实施方式的记载分割成多个部分等来叙述，但除了已特别明示并非如此的情况之外，这些部分并不是彼此独立无关的，不论记载的前后，单独示例的各部分中的一方是另一方的一部分详细或者局部或全部的变形例等。另外，同样的部分在原则上省略重复说明。另外，除了已特别明示并非如此的情况、理论上已限定为某个数的情况、以及从前后文中已明确了并非如此的情况之外，实施方式中的各构成要素并非是必须的。
同样地，在实施方式等的记载中，对于材料、组成等，除了已特别明示并非如此的情况以及从前后文中已明确了并非如此的情况之外，即使提到“由A构成的X”等，也并不排除包含除A以外的要素的情况。例如，若对成分进行叙述，则是指“以A为主要成分的X”等意思。例如，即使提到“硅部件”等也并不限定于纯硅，当然还包括SiGe(硅锗)合金及其他以硅为主要成分的多元合金、以及包含其他添加物等的部件。另外，即使提到镀金、铜(Cu)层、镀镍等，除了已特别明示并非如此的情况之外，也并非纯金、纯铜、纯镍等，而是包括分别以金、铜(Cu)、镍等为主要成分的部件。
而且，当提及特定的数值、数量时，也是除了已特别明示并非如此的情况、理论上已限定为某个数的情况、以及从前后文中已明确了并非如此的情况之外，可以是超过该特定数值的数值，也可以是小于该特定数值的数值。
另外，在实施方式的各图中，对于相同或同样的部分用相同或类似的符号或附图标记来表示，且原则上不重复说明。
另外，在附图中，相反地，在复杂的情况下或与空隙的区别很明确时，即使是剖面有时也会省略剖面线等。与此关联地，在从说明等中已明确的情况等下，即使是在平面上闭合的孔，有时也会省略背景的轮廓线。而且，就算不是剖面，为了说明并非空隙、或者为了明确区域的边界，有时会加上剖面线或点图案。
<半导体器件>
首先，利用图1～图4对本实施方式的半导体器件PKG1的结构概要进行说明。图1是本实施方式的半导体器件的俯视图。另外，图2是沿着图1的A-A线的剖视图。另外，图3是以透视图1所示的封固体的状态来示出半导体器件的内部构造的透视俯视图。
由以下实施方式说明的技术能够广泛应用于在露出半导体芯片表面的电极焊盘上连接金属线即导线的半导体器件。在本实施方式中，作为在半导体芯片的电极焊盘上连接有导线的半导体器件的一例，列举引线框架型半导体器件来进行说明。在引线框架型半导体器件的情况下，搭载于引线框架的芯片焊盘上的半导体芯片与配置在芯片焊盘周围的多条引线分别经由导线而电连接。
如图1～图3所示，半导体器件PKG1具有：半导体芯片CP(参照图2、图3)、作为配置在半导体芯片CP周围的外部端子的多条引线(端子、外部端子)LD、和作为将半导体芯片CP与多条引线LD电连接的导电性部件的多条导线BW(参照图2、图3)。另外，半导体芯片CP及多条导线BW封固在封固体(树脂体)MR内。另外，各引线LD的内引线部ILD(参照图2、图3)封固在封固体MR内，且各引线LD的外引线部OLD从封固体MR露出。
如图1所示，半导体器件PKG1所具备的封固体MR的平面形状由四边形构成。封固体MR具有上表面MRt、与上表面MRt为相反侧的下表面(背面、被安装面)MRb(参照图2)、和位于上表面MRt与下表面MRb之间的多个(图1中为四个)侧面MRs。
封固体MR在俯视时具备沿X方向延伸的边(主边)S1、沿着与X方向交叉(正交)的Y方向延伸的边(主边)S2、位于边S1的相反侧的边(主边)S3、以及位于边S2的相反侧的边(主边)S4。而且，封固体MR具备的四个侧面MRs沿着封固体MR的各边配置。
另外，在半导体器件PKG1中，沿着平面形状由四边形构成的封固体MR的四条边(主边)S1、S2、S3、及S4分别配置有多条引线LD。多条引线LD由金属构成，在本实施方式中例如是以铜(Cu)为主成分的金属部件。如本实施方式所述那样，分别沿着封固体MR的四条边排列有多条引线LD的半导体封装称为QFP(Quad Flat Package：四方扁平封装)。另外，虽省略了图示，但沿着封固体MR所具备的四条边中彼此位于相反侧的两条边排列有多条引线LD、且在另外两条边上未排列引线LD的半导体封装称为SOP(Small Outline Package：小外形封装)。在本实施方式中，对应用于作为QFP的半导体器件PKG1的实施方式进行说明，但作为变形例也可以应用于作为SOP的半导体器件。
如图2所示，多条引线LD的外引线部OLD在封固体MR的侧面MRs上向着封固体MR的外侧突出。在QFP和SOP的情况下，外引线部OLD形成为从封固体MR的侧面MRs突出并向着安装面侧弯曲的形状。此外，虽省略了图示，但作为半导体器件PKG1的变形例，还有多条引线LD分别在封固体MR的下表面MRb露出的类型的半导体封装。在引线LD在封固体MR的下表面MRb露出的半导体封装中，有QFN(Quad Flat Non-leaded package：四方扁平无引脚封装)和SON(Small Outline Non-leaded package：小外形无引线封装)等。
另外，在多条引线LD的外引线部OLD的露出面上，例如在以铜为主成分的基材的表面上形成有金属膜(包装镀膜)MC。金属膜MC例如由焊锡等、与作为基材的铜相比相对于焊锡的润湿性良好的金属材料构成，是覆盖作为基材的铜部件的表面的金属皮膜。通过在半导体器件PKG1的作为外部端子的引线LD的外引线部OLD上形成金属膜MC，在将半导体器件PKG1向未图示的安装衬底上进行安装时变得易于安装。具体地，在将外引线部OLD分别与安装衬底的端子(省略图示)连接时，外引线部OLD经由焊锡材料等导电性的连接材料与端子连接。这时，若外引线部OLD被金属膜MC覆盖着，则与作为上述连接材料的焊锡材料的润湿性提高。由此，由于多条引线LD与焊锡材料的接合面积增大，所以能够提高多条引线LD与安装衬底侧的端子的接合强度。
在图2的示例中，示出了在引线LD的外引线部OLD的露出面上通过电镀法形成有焊锡膜即金属膜MC的例子。金属膜MC还有各种各样的变形例。例如，金属膜MC也可以是以镍(Ni)为主成分的金属膜和以钯(Pd)为主成分的金属膜的层叠膜。或者，例如也可以在以钯为主成分的金属膜的表面上进一步层叠以金(Au)为主成分的金属膜。另外，在金属膜MC由除焊锡以外的材料构成的情况下，还可以以覆盖多条引线LD的内引线部ILD及外引线部OLD的表面的方式形成金属膜MC。
另外，如图2及图3所示，在封固体MR的内部封固有半导体芯片CP。如图3所示，半导体芯片CP在俯视时形成为四边形，具有表面(上表面、主面)CPt、与表面CPt为相反侧的背面CPb(参照图2)、以及在半导体芯片CP的厚度方向上的剖视下位于表面CPt与背面CPb之间的侧面CPs。在半导体芯片CP的表面CPt上，沿着构成表面CPt的外缘的四条边分别设有多个焊盘(焊盘)PD。另外，半导体芯片CP(具体为半导体衬底)例如由硅(Si)构成。省略了图示，但在半导体芯片CP的主面(具体为半导体芯片CP的设于半导体衬底上表面的半导体元件形成区域)上，形成有多个半导体元件(电路元件)。而且，多个焊盘PD经由形成在配置于半导体芯片CP内部(具体为表面CPt与未图示的半导体元件形成区域之间)的布线层上的布线(省略图示)与该半导体元件电连接。即，多个焊盘PD与形成在半导体芯片CP上的电路电连接。
另外，在半导体芯片CP的表面CPt上形成有覆盖半导体芯片CP的衬底及布线的绝缘膜，各焊盘PD的表面在形成于该绝缘膜上的开口部从绝缘膜露出。另外，该焊盘PD由金属构成，在本实施方式中例如由铝(Al)构成。
半导体芯片CP搭载于作为芯片搭载部的芯片焊盘DP上。在半导体器件PKG1的情况下，如图3所示，在俯视时，在封固体MR的四条边S1、S2、S3、及S4之间配置有作为搭载半导体芯片CP的芯片搭载部的芯片焊盘(芯片搭载部)DP，半导体芯片CP搭载于芯片焊盘DP的上表面(表面、主面、芯片搭载面)DPt上。芯片焊盘DP的上表面DPt由平面面积比半导体芯片CP的表面积大的四边形构成。但是，芯片焊盘DP是支承半导体芯片CP的支承部件，其形状及大小除了能够适用于图3的示例之外，还能适用于各种各样的变形例。例如，也可以将芯片焊盘DP的平面形状设为圆形。另外，例如还可以将芯片焊盘DP的平面面积设为比半导体芯片CP的表面CPt小。另外，在半导体器件PKG1的情况下，芯片焊盘DP封固在封固体MR内。此外，虽省略了图示，但作为半导体器件PKG1的变形例，也可以是芯片焊盘DP的下表面在封固体MR的下表面MRb从封固体MR露出。
另外，如图2所示，半导体芯片CP以背面CPb与芯片焊盘DP的上表面DPt相对的状态经由芯片焊接材料(粘结材料)DB搭载于芯片焊盘DP上。即，通过使形成有多个焊盘PD的表面(主面)CPt的相反面(背面CPb)与芯片搭载面(上表面DPt)相对的、所谓正面朝上安装方式来进行搭载。该芯片焊接材料DB是将半导体芯片CP进行芯片焊接时的粘结材料，例如是在环氧类热固化性树脂中含有多个(许多)导电性颗粒(例如银颗粒)的导电性的树脂粘结材料、或者焊锡材料。
在半导体芯片CP的周围(换言之为芯片焊盘DP的周围)配置有多条引线LD。露出半导体芯片CP的表面CPt的多个焊盘(电极、电极焊盘)PD与位于封固体MR内部的多条引线LD的内引线部ILD经由多条导线(导电性部件)BW分别电连接。导线BW的一方端部(后述图14所示的球部BWb)与焊盘PD接合，另一方端部与内引线部ILD的一部分(导线接合区域)接合。
本实施方式的导线BW例如由铜(Cu)构成。通常，与半导体芯片的电极焊盘连接的导线多由金形成，但有时从降低材料成本的观点、或者降低导线形成的传输路径的阻抗分量的观点出发，也会由除金以外的材料形成。例如，如本实施方式所述，若将导线BW由铜形成，则能够降低材料成本。
另外，通过由电导率比金高的铜来形成导线BW，能够降低导线BW形成的传输路径的阻抗分量。另外，作为本实施方式的变形例，也可以将由铜构成的基材的表面用由钯(Pd)构成的金属膜来覆盖。这种情况下，能够进一步提高导线BW与焊盘PD的接合强度。
另外，如图3所示，在芯片焊盘DP的周围配置有多条悬垂引线HL。悬垂引线HL在半导体器件PKG1的制造工序中是用于在引线框架的支承部(框部)上支承芯片焊盘DP的部件。
另外，在本实施方式中，芯片焊盘DP的上表面DPt与引线LD的内引线部ILD的上表面配置在不同的高度。在图2的示例中，与内引线部ILD的上表面LDt的位置相比，芯片焊盘DP的上表面DPt配置在较低的位置。因此，在图3所示的多条悬垂引线HL上，分别设有以芯片焊盘DP的上表面DPt的高度位于与引线LD的内引线部ILD的上表面LDt(参照图2)的高度不同的位置的方式弯折的偏置部(在本实施方式的示例中为下置部)OSP。
<半导体芯片>
接着，对图2及图3所示的半导体芯片进行说明。图4是图3所示的半导体芯片的俯视图。另外，图5是沿着图4的A-A线的放大剖视图。另外，图6是将图5的A部进一步放大后的放大剖视图。
此外，在图4～图6中示出了在图3所示的焊盘PD上连接导线BW之前的状态。另外，图6作为布线部SDL的示例而示出了在形成有焊盘PD的层与半导体衬底SS之间层叠有7层布线层DL的例子。但是，布线层的层叠数并不限定于8层，例如还有6层以下或8层以上等各种各样的变形例。另外，在图6的示例中，作为形成在半导体衬底SS的上表面SSt上的多个半导体元件Q1的示例，记载了MOSFET(Metal Oxide Semiconductor Field EffectTransistor：金属氧化物半导体场效应晶体管)的结构例。但是，在半导体元件Q1的结构中，除了MOSFET之外还有各种各样的变形例。
如图4及图6所示，半导体芯片CP在表面(上表面、主面)CPt上形成有绝缘膜(保护膜、保护绝缘膜)PV、以及在形成于绝缘膜PV上的开口部PVk从绝缘膜PV露出的焊盘PD。在绝缘膜PV上形成有多个开口部PVk，并在多个开口部PVk分别露出有焊盘PD。换言之，半导体芯片CP在表面CPt上具有从绝缘膜PV露出的多个焊盘PD。
另外，半导体芯片CP的表面CPt在俯视时形成为四边形，具备沿X方向延伸的边CPs1、沿着与X方向交叉(正交)的Y方向延伸的边CPs2、位于边CPs1的相反侧的边CPs3、以及位于边CPs2的相反侧的边CPs4。如图3所示，在本实施方式中，半导体芯片CP的边CPs1沿着封固体MR的边S1配置，半导体芯片CP的边CPs2沿着封固体MR的边S2配置。另外，半导体芯片CP的边CPs3沿着封固体MR的边S3配置，半导体芯片CP的边CPs4沿着封固体MR的边S4配置。
另外，形成在绝缘膜PV上的多个开口部PVk分别具有多条边。在图4的示例中，开口部PVk的开口形状具备沿X方向延伸的边Pks1、沿着与X方向交叉(正交)的Y方向延伸的边Pks2、位于边Pks1的相反侧的边Pks3、以及位于边Pks2的相反侧的边Pks4。在本实施方式中，开口部PVk的边Pks1沿着半导体芯片CP的边CPs1配置，开口部PVk的边Pks2沿着半导体芯片CP的边CPs2配置。另外，开口部PVk的边Pks3沿着半导体芯片CP的边CPs3配置，开口部PVk的边Pks4沿着半导体芯片CP的边CPs4配置。
另外，半导体芯片CP具备半导体衬底SS，其具有形成有多个半导体元件Q1(参照图6)的上表面(半导体元件形成面)SSt及与上表面SSt为相反侧的下表面(背面)SSb(参照图5)。半导体衬底SS是半导体芯片CP的基材，例如以硅(silicon；Si)为主要成分来构成。另外，半导体芯片CP具有形成在半导体衬底SS的上表面SSt上的布线部SDL(参照图5、图6)。
在图5的示例中，半导体芯片CP的背面(下表面)CPb是与半导体衬底SS的下表面SSb相同的面。换言之，在图5的示例中，半导体衬底SS的下表面SSb是半导体芯片CP的背面CPb。另外，半导体芯片CP的表面(主面、上表面)CPt由以覆盖布线部SDL的最上层的方式形成的绝缘膜PV(参照图4及图6)的上表面PVt、以及多个焊盘PD(参照图4及图6)从绝缘膜PV露出的露出面构成。
另外，如图6放大所示，布线部SDL具有层叠的多个布线层DL。在布线部SDL中，多个半导体元件Q1与多个焊盘PD经由层叠的多个布线层DL电连接。多个焊盘PD形成在以覆盖布线部SDL的最上层的方式形成的绝缘层IML1上。而且，该焊盘PD经由位于设置在绝缘层IML1上的开口部内的过孔(via)布线(构成焊盘PD的布线的一部分)与最上层的布线层DL电连接。
多个布线层DL分别具有多个导体图案(布线)CBP、和将多个导体图案CBP电绝缘的绝缘层IML。导体图案CBP埋入形成在绝缘层IML上的开口部内。另外，各布线层DL的导体图案CBP与形成有该导体图案CBP的布线层DL邻接的布线层DL的导体图案CBP电连接。例如，从半导体衬底SS的上表面SSt侧来看，形成在第3层布线层DL上的导体图案CBP分别与形成在第2层布线层DL上的导体图案CBP、及形成在第4层布线层DL上的导体图案CBP电连接。另外，形成在第1层布线层DL上的导体图案CBP与半导体元件Q1的栅电极、源极区域、或漏极区域电连接。另外，形成在最上层(图6中为第7层)布线层DL上的导体图案CBP与焊盘PD电连接。在布线部SDL中，通过使形成在多个布线层DL上的导体图案CBP彼此电连接而形成将半导体元件Q1与焊盘PD电连接的导通路径。
构成布线部SDL的材料并不限于以下材料，但能够如下所述来举例说明。绝缘层IML例如以二氧化硅(SiO2)为主要成分来构成。另外，形成在除最上层以外的布线层DL上的多个导体图案CBP例如以铜(Cu)为主要成分来构成。另外，最上层布线层DL由与焊盘PD相同的金属材料、例如以铝为主成分的金属材料形成。焊盘PD经由绝缘层IML1形成在最上层的导体图案CBP上。换言之，在最上层布线层DL与焊盘PD之间介有绝缘层IML1。绝缘层IML1是覆盖最上层布线层DL的层。如图6所示，绝缘层IML1虽介于焊盘PD与导体图案CBP之间，但其一部分上形成有开口部。焊盘PD与导体图案CBP在该开口部紧贴。这种情况下，在焊盘PD与导体图案CBP之间流动的电流流经焊盘PD与导体图案CBP紧贴的部分。
另外，包含多个焊盘PD的最上层布线层DL由具有半导体芯片CP的表面CPt的绝缘膜PV覆盖。通过以覆盖布线部SDL的方式设置绝缘膜PV，能够保护布线部SDL。绝缘膜PV由于是覆盖布线部SDL的膜，所以具有与半导体衬底SS的上表面SSt相对的下表面(面)PVb及与下表面PVb为相反侧的上表面(面)PVt。
此外，如图6所示，由于绝缘膜PV是覆盖布线部SDL的膜，所以在绝缘膜PV的下表面PVb与半导体衬底SS的上表面SSt之间介设有层叠了多个布线层DL的布线部SDL。而且，绝缘膜PV的下表面PVb与多个布线层DL中的最上层布线层DL紧贴。
绝缘膜PV例如由二氧化硅(SiO2)、氮化硅(SiN)、氮氧化硅(SiON)或它们的层叠膜构成。另外，还有以进一步覆盖二氧化硅、氮化硅、或氮氧化硅的膜的方式形成聚酰亚胺等树脂膜的情况。在图4的示例中，作为最简单的例子示出了由单层的绝缘膜构成的绝缘膜PV，但作为变形例还有由层叠膜构成的绝缘膜PV。在由层叠膜构成的绝缘膜PV的情况下，最下层(最接近布线层DL的层)的绝缘膜的下表面相当于绝缘膜PV的下表面PVb。另外，在由层叠膜构成的绝缘膜PV的情况下，最上层(离布线层DL最远的层)的绝缘膜的上表面相当于绝缘膜PV的上表面PVt。
另外，半导体芯片CP的多个焊盘PD如图6所示形成在绝缘膜PV与半导体衬底SS之间，并在半导体芯片CP的表面CPt上从绝缘膜PV露出。具体地，如图6所示，在绝缘膜PV的与焊盘PD沿厚度方向(图6的Z方向)重叠的位置上形成有开口部PVk。开口部PVk以从绝缘膜PV的上表面PVt及下表面PVb中的一方向另一方贯穿的方式形成。因此，多个焊盘PD在与形成于绝缘膜PV的多个开口部PVk重叠的位置上从绝缘膜PV露出。在图6的示例中，焊盘PD中的一部分从绝缘膜PV露出。由此，能够分别在多个焊盘PD上连接像图2及图3所示的导线BW那样的导电性部件。换言之，能够将多个焊盘PD用作半导体芯片CP的外部端子。焊盘PD中的在开口部PVk从绝缘膜PV露出的面是接合导线BW的接合面PDt。
另外，在半导体器件PKG1(参照图2)的制造工序中或半导体器件PKG1完成之后，对图6所示的半导体芯片CP施加温度循环负荷等各种各样的热应力。这时，由金属材料构成的焊盘PD的线膨胀系数比将焊盘PD与覆盖焊盘PD的一部分(周缘部)的绝缘膜PV和导线BW(参照图2)一起封固的封固体MR(参照图2)的线膨胀系数大。因此，在焊盘PD的周围，因该线膨胀系数的差而沿着焊盘PD的接合面PDt的延伸方向产生剪应力(以沿着与物体内部的某个面平行的方向滑动的方式作用的应力)。由于上述剪应力沿着相对于焊盘PD的表面PDt水平的方向作用，所以根据应力的强度会导致半导体芯片CP的构成部分发生故障。例如，有时因上述剪应力而在绝缘膜PV的一部分上产生龟裂。
另外，有时在沿着配置于焊盘PD下层的最上层的导体图案CBP的延伸方向产生了上述剪应力的情况下，会发生导体图案CBP的位置因应力而移动(滑动)的现象。
上述剪应力的大小除了与金属材料的线膨胀系数的值有关以外，还与金属部件的体积成正比例地变大。因此，通过缩小焊盘PD的厚度(从接合面PDt及其相反侧的背面PDb中的一方到另一方的长度)，能够降低上述剪应力的值。在本实施方式的情况下，焊盘PD的厚度THpd为焊盘PD上的绝缘膜PV的厚度THpv以下。例如，图6所示的绝缘膜PV的厚度THpv为1μm左右。另一方面，焊盘PD的厚度THpd为450nm～1μm左右。另外，在图6的示例中，焊盘PD的厚度THpd比绝缘层IML1的厚度TH1小。此外，绝缘层IML1的厚度TH1还有各种各样的变形例，例如也有与焊盘PD的厚度THpd相同的情况或比厚度THpd薄的情况。这样，通过减小焊盘PD的厚度THpd，能够降低沿着焊盘PD的延伸方向产生的上述剪应力的值。此外，图6所示的焊盘PD的厚度THpd在后述的导线接合工序中是接合导线BW(参照图2)之前的焊盘PD的厚度。
另外，形成在多个布线层DL上的导体图案CBP中的、形成在最上层的导体图案CBP与形成在其他布线层DL上的导体图案CBP相比形成得更厚。因此，为了降低沿着最上层的导体图案CBP的延伸方向产生的剪应力的值，优选为缩小最上层的导体图案CBP的厚度(从上表面CBt及下表面CBb中的一方到另一方的长度)。例如，图6所示的最上层的导体图案CBP的厚度THcb为450nm～1μm左右。这样，通过减小最上层的导体图案CBP的厚度THcb，能够降低沿着最上层的导体图案CBP的延伸方向产生的上述剪应力的值。
<半导体器件的制造方法>
接着，对图1所示的半导体器件PKG1的制造方法进行说明。本实施方式的半导体器件PKG1沿着图7所示的组装流程来制造。图7是示出本实施方式的半导体器件的组装流程的说明图。
<基材准备工序>
在图7所示的基材准备工序中，准备图8所示的引线框架(基材)LF。图8是示出在图7所示的基材准备工序中准备的引线框架的一部分的放大俯视图。
在本工序中准备的引线框架LF在框部LFb的内侧具备多个器件形成部LFa。引线框架LF由金属构成，在本实施方式中例如由以铜(Cu)为主成分的金属构成。
此外，在本实施方式中，如图7所示，在封固工序之后进行电镀工序，列举在外引线部OLD上形成图2所示的金属膜MC的例子来进行说明。但是，作为变形例，也可以在基材准备工序的阶段预先将以铜为主成分的基材的表面用金属膜MC覆盖。这种情况下，引线框架LF的整个露出面都由金属膜MC覆盖。
另外，如图8所示，在各器件形成部LFa的中央部形成有作为芯片搭载部的芯片焊盘DP。在芯片焊盘DP上分别连接有多条悬垂引线HL，多条悬垂引线HL以向着器件形成部LFa的角部延伸的方式配置。芯片焊盘DP经由悬垂引线HL而支承在引线框架LF的框部LFb上。
另外，在芯片焊盘DP的周围、即多条悬垂引线HL之间，分别形成有多条引线LD。多条引线LD分别与框部LFb连接。在本实施方式的示例中，多条引线LD以设置在芯片焊盘DP的周围、并向四方延伸的方式形成。
另外，多条引线LD经由系杆TB而彼此连结。系杆TB除了作为连结多条引线LD的连结部件的功能之外，在图7所示的封固工序中还具有作为抑制树脂泄漏的隔板部件的功能。
<半导体芯片准备工序>
另外，在图7所示的半导体芯片准备工序中，准备由图4～图6所说明的半导体芯片CP。在本工序中，例如在由硅构成的半导体晶片(省略图示)的主面侧(图6所示的半导体衬底SS的上表面SSt侧)，准备由多个半导体元件Q1(参照图6)和与其电连接的布线层DL(参照图6)构成的半导体晶片。另外，在布线层DL的最上层形成多个焊盘PD(参照图4)。
另外，以覆盖形成有多个焊盘PD的最上层布线层DL的方式形成绝缘膜PV(图6参照)。之后，以各焊盘PD至少露出一部分的方式在绝缘膜PV上形成有多个开口部PVk(参照图4)。在形成上述半导体晶片之后，沿着半导体晶片的切割线将半导体晶片切断，从而获得多个图4所示的半导体芯片CP。
此外，在本实施方式中，先说明基材准备工序而后说明半导体芯片准备工序，但基材准备工序与半导体芯片准备工序先实施哪个都可以，也可以同时实施。芯片焊接工序在基材准备工序及半导体芯片准备工序双方都完成之后才实施。
<芯片焊接工序>
接着，在图7所示的芯片焊接工序(半导体芯片搭载工序)中，如图9所示，在芯片焊盘DP上搭载半导体芯片CP。图9是示出在沿着图8的A-A线的剖面中在引线框架的芯片焊盘上搭载有半导体芯片的状态的放大剖视图。
如图9所示，半导体芯片CP具有形成有多个焊盘PD的表面CPt及位于表面CPt的相反侧的背面CPb。在本工序中，经由芯片焊接材料DB将半导体芯片CP与芯片焊盘DP粘结固定。在图9的示例中，在俯视时以芯片焊盘DP的上表面DPt的一部分由半导体芯片CP覆盖的方式搭载半导体芯片CP。芯片焊接材料DB是将半导体芯片CP与芯片焊盘DP粘结固定的粘结材料，例如在固化前具备膏状的特性。若使用膏状的粘结材料来搭载半导体芯片CP，则在搭载半导体芯片CP之前，预先在芯片焊盘DP的芯片搭载面即上表面DPt上配置膏状的粘结材料。然后，通过将半导体芯片CP按压在芯片焊盘DP上而使膏状的粘结材料扩张。之后，例如通过加热来使粘结材料固化，从而固定半导体芯片CP。但是，芯片焊接材料DB并不限于上述情况，例如还能使用被称为DAF(Die Attach Film：芯片粘结膜)的树脂薄膜等。这种情况下，例如将两面具备粘结层的胶带材料(薄膜材料)即芯片焊接材料DB预先粘贴在半导体芯片CP的背面CPb上，经由胶带材料来粘结半导体芯片CP。之后，例如使芯片焊接材料DB中包含的热固化性树脂成分热固化来固定半导体芯片CP。
另外，在本实施方式的示例中，半导体芯片CP以背面CPb与芯片焊盘DP的芯片搭载面即上表面DPt相对的方式、即通过所谓正面朝上安装方式而搭载到芯片焊盘DP上。
<导线接合工序>
接着，在图7所示的导线接合工序中，如图10所示，将形成在半导体芯片CP的表面CPt上的多个焊盘PD与配置在半导体芯片CP周围的多条引线LD经由多条导线(导电性部件)BW而分别电连接。图10是示出将图9所示的半导体芯片与多条引线经由导线而电连接后的状态的放大剖视图。
本工序的详细内容详见后述，在本工序中，将例如由铜(Cu)等金属材料构成的导线BW的一端部(球部)与半导体芯片CP的焊盘PD接合，并将另一端部(拼接部)与引线LD的内引线部ILD接合。由此，半导体芯片CP的焊盘PD与引线LD经由导线BW电连接。在本实施方式中，通过以半导体芯片CP的焊盘PD为第一接合处、以引线框架LF的引线LD的上表面LDt为第二接合侧的所谓正焊接方式来连接导线BW。关于导线接合工序，稍后具体说明。
<封固工序>
接着，在图7所示的封固工序中，通过树脂将图10所示的半导体芯片CP、多条导线BW、及各引线LD的内引线部ILD封固，从而形成图11所示的封固体MR。图11是示出将图10所示的半导体芯片进行树脂封固后的状态的放大剖视图。
在本工序中，如图11所示，以在具备腔MDc的成形模具MD内配置有引线框架LF的状态向由腔MDc形成的空间内供给树脂之后，通过使上述树脂固化而形成封固体(树脂体)MR。这种封固体MR的形成方法称为传递模塑(transfer mold)方式。
成形模具MD的腔MDc在俯视时配置于各器件形成部LFa(参照图8)中的由系杆TB(参照图8)包围而成的区域内。因此，封固体MR的主体部分分别形成在各器件形成部LFa的由系杆TB包围而成的区域内。另外，从腔MDc泄漏的树脂的一部分被系杆TB堵住。因此，各引线LD中的与系杆TB相比位于外侧的外引线部OLD并不被树脂封固，而是从封固体MR中露出。在本工序中，半导体芯片CP的整体、芯片焊盘DP的整体、多条导线BW的整体、以及各引线LD的一部分(内引线部ILD)被封固。
<镀敷工序>
接着，在图7所示的镀敷工序中，通过镀敷法在从图11所示的封固体MR中露出的各引线LD的一部分(外引线部OLD、露出面)上形成金属膜MC(参照图2)。在本工序中，在引线LD的露出面上形成例如由焊锡构成的金属膜MC。另外，作为金属膜MC的形成方法，能够应用使电离后的金属离子析出到引线LD的露出面上的电镀法。在电镀法的情况下，因通过控制在形成金属膜MC时的电流而能够很容易地控制金属膜MC的膜质这一点而优选。另外，电镀法还因金属膜MC的形成时间能够缩短这一点而优选。
<引线切断工序>
接着，在图7所示的引线切断工序中，如图12所示，将各引线LD的外引线部OLD切断，并将各引线LD从引线框架LF切断分离。另外，在本实施方式中，将引线LD切断之后对多条引线LD进行成形，并实施图2所示的弯曲加工。图12是示出在图11所示的多条引线的露出面上形成有金属膜，并且在将其分别切断之后成形后的状态的放大俯视图。
在本工序中，将连结多条引线LD的系杆TB切断。另外，将各引线LD从框部LFb切断分离。由此，多条引线LD分别成为分开的独立部件。另外，在将多条引线LD切断分离之后，封固体MR及多条引线LD变成经由悬垂引线HL支承在框部LFb上的状态。
此外，在本实施方式中，对在上述电镀工序之后切断系杆TB的情况进行了说明，但也可以是先仅切断系杆TB，然后进行镀敷工序，进而再将各引线LD从框部LFb切断分离的顺序。由此，在系杆TB的剖面上也能形成金属膜MC，能够抑制系杆TB的剖面因氧化而变色。另外，由于在将引线LD从框部LFb切断分离之前进行镀敷工序，所以还能抑制因镀敷溶液造成的引线LD变形。
多条引线LD和系杆TB例如使用未图示的切断用模具通过冲压加工来切断。另外，切断后的多条引线LD例如通过使用了未图示的成形用模具的冲压加工来对多条引线LD的外引线部OLD实施弯曲加工，从而例如如图2所示，能够成形。
<单片化工序>
接着，在图7所示的单片化工序中，将图12所示的多条悬垂引线HL分别切断，并在各器件形成部LFa上分离半导体封装。在本工序中，将多条悬垂引线HL及残留在封固体MR的角部的树脂切断，从而获得半导体封装即图1所示的半导体器件PKG1(具体为检查工序之前的检查体)。切断方法例如能够与上述引线成形工序同样地使用未图示的切断模具通过冲压加工来切断。
在本工序之后，进行外观检查、电气试验等必要的检查、试验，若合格的话则成为图1～图3所示的完成品的半导体器件PKG1。然后，将半导体器件PKG1出货、或安装到未图示的安装衬底上。
<导线接合工序的详细内容>
接着，对图7所示的导线接合工序的详细内容进行说明。图13是示出在图4的B部中在焊盘上连接有导线的状态的放大俯视图。图14是沿着图13的A-A线的放大剖视图。
如图10所示，在本实施方式的导线接合工序中，导线BW的一方端部与半导体芯片CP的焊盘PD接合，导线BW的另一方端部与引线LD的内引线部ILD接合。另外，在将导线BW与焊盘PD接合的工序中，通过将形成在导线BW上的球部压接到焊盘PD上的、所谓球焊方式，而将导线BW与焊盘PD接合。
虽详见后述，但如图13及图14所例示的那样，在以球焊方式将导线BW的球部BWb与焊盘PD接合的情况下，通过对球部BWb施加像超声波振动那样的高频振动而能够提高接合强度。“超声波”及“超声波振动”是指，具有比人类的可听范围高的频率的弹性波。在本申请中，将20kHz以上的高频称为“超声波”或“超声波振动”。另一方面，只是“振动”，除了超声波之外还包括不足20kHz的波长的弹性波。在施加了超声波振动的情况下，例如图14所示，在球部BWb与焊盘PD的接合界面上，形成有构成导线BW的金属与构成焊盘PD的金属的合金层PDa(参照图14)。另外，在接合面PDt与球部BWb之间，若介设有焊盘PD的氧化膜，则由于会导致接合强度下降或电气特性下降，所以优选为进行将形成在接合面PDt的露出面上的氧化膜除去的动作(后述的擦除动作)。
然而，根据本申请发明人的研究，若一边进行擦除动作一边对球部BWb施加像超声波振动那样的高频振动，则会变成在接合面PDt与球部BWb的界面的一部分形成有合金层、在另一部分因受到除去前的氧化膜阻碍而未形成合金层的状态。这样，可知当接合界面变成不均匀的状态时，应力容易局部集中。尤其如本实施方式所述可知，当焊盘PD的厚度THpd(参照图6)很薄时，存在通过上述应力使焊盘PD本身受到损伤的情况。
另外，作为焊盘PD本身损伤或焊盘PD下层的部件损伤的原因，有在导线接合工序中对焊盘PD施加的载荷很大这点。但是，根据本申请发明人的研究可知，焊盘PD本身损伤或焊盘PD下层的部件损伤的主要原因是如上所述那样因接合界面变成不均匀的状态而产生的应力。换言之，可知，若能够以焊盘PD的接合面PDt与球部BWb的接触界面被均匀活化后的状态开始接合，则在接触界面上形成有良好的合金层PDa(参照图14)，因此，能够抑制焊盘PD本身或焊盘PD下层的部件受到损伤。
尤其如图6所示在焊盘PD的厚度THpd很薄的情况下，通过上述应力很容易在焊盘PD上发生例如裂缝等损伤。或者，即使焊盘PD上不发生损伤，也有在与焊盘PD的背面PDb紧贴的绝缘层IML1上发生裂缝等损伤的情况。另外，当焊盘PD上产生裂缝时，该裂缝有时向着半导体衬底SS的上表面SSt扩展。
例如，当在焊盘PD本身或介于焊盘PD与导体图案CBP之间的绝缘层IML1上产生裂缝、且该裂缝扩展并与其他信号布线等连接上时，由于该裂缝造成电流的泄漏路径，所以存在导致半导体芯片CP的电气特性下降的情况。另外，在与焊盘PD重叠的位置上形成有与不同于焊盘PD的电极连接的布线的情况下，若焊盘PD等受到损伤，则很容易发生电流泄漏。
尤其如本实施方式所述，在将由铜(Cu)构成的导线BW的球部BWb与由铝(Al)构成的焊盘PD接合的情况下，导线BW的硬度与焊盘PD的硬度相比更硬。例如当以维氏硬度进行比较时，相对于铜的硬度为46Hv，铝的硬度为25Hv。这样，当在相对柔软的部件上接合硬部件时，若柔软部件的被接合部的厚度很薄，则在被接合部周边容易发生损伤。
另一方面，在为了预防被接合部周边的损伤而例如不进行上述擦除动作的情况下，由于接合界面上的氧化膜的除去变得不充分，所以会导致接合强度下降或电气特性下降。还例如，在为了预防被接合部周边的损伤而将与超声波振动一起施加的载荷设为低载荷的情况下，会由于载荷不足而导致接合强度下降。尤其如本实施方式所述，在将由铜(Cu)构成的导线BW的球部BWb与由铝(Al)构成的焊盘PD接合的情况下，当接合面PDt与球部BWb的界面整体变成均匀状态(适于合金层形成的活化状态)之后，通过一边施加足够高的载荷(例如0.15N(牛顿)左右)一边施加超声波，很容易获得良好的接合状态。此外，虽详见后述，但在本实施方式中，用于使接合面PDt与球部BWb的界面整体变成均匀状态的工序包括：进行擦除动作的工序(后述图17所示的擦除工序ST4)、以及在施加了不形成合金层的程度的载荷的状态下施加超声波的工序(图17所示的活化工序ST5)。
如本实施方式所述，在焊盘PD的厚度THpd(参照图6)很薄的情况下，尤其在进行球焊时，需要一种降低对被接合部施加的负荷(应力)、且提高接合强度的技术。以下，利用附图对本实施方式的导线接合工序按顺序进行说明。
图15是示出在图7所示的导线接合工序中使用的导线接合装置与引线框架之间的位置关系的俯视图。图16是示意性地示出沿着图15的A-A线的剖面的剖视图。另外，图17是示出在图7所示的导线接合工序的将导线的球部与焊盘连接的工序中，焊头的高度、对球部施加的载荷、擦除动作的有无、以及超声波振动的有无的关系的时序图。在图17中，对进行后述擦除动作的期间及施加超声波的期间分别标注了剖面线来示出。另外，图18～图25分别是示出在图17的时序图所示的各时间内实施的各工序的动作的放大俯视图或放大剖视图。此外，在上述图14和图25中，在球部BWb与焊盘PD之间明示了合金层PDa，但合金层PDa的厚度和形状还有各种各样的变形例。
在本实施方式的导线接合工序中，例如如图15所示，在固定有引线框架LF的载台STG旁边配置导线接合装置WBD。引线框架LF与导线接合装置WBD例如以图15所示的位置关系配置。即，导线接合装置以在俯视时变幅杆USH沿着X方向延伸的方式配置，隔着变幅杆USH在振荡器USG的相反侧配置引线框架LF。由此，能够对导线BW的球部BWb(参照图16)施加沿着X方向振动的超声波US1。
另外，导线接合装置WBD具有对包含图16所示的焊针CAP、变幅杆USH及振荡器USG的焊接头部进行支承的支承部SUP。支承部SUP能够沿着图15所示的X-Y平面自由移动，通过使焊接头的位置与支承部SUP一起移动，能够在引线框架LF的多个焊盘PD上分别连接导线BW。
另外，在球焊工序中，对导线BW的球部BWb施加的载荷通过将固定有焊针CAP的变幅杆USH的顶端部分向下方压低，而经由焊针CAP传递至球部BWb。
如图16所示，本实施方式的导线接合工序包括在从焊针CAP的下端侧突出的导线BW的端部上形成球部BWb的工序(图17所示的球部形成工序ST1)。球部BWb通过从未图示的焊枪向导线BW的顶端放电而形成。球部形成工序ST1在图17所示的时间(定时)T0时实施。
另外，如图18及图19所示，导线接合工序还包括使导线BW的球部BWb与焊盘PD的接合面PDt接触的工序(图17所示的球部接触工序ST2)。球部接触工序ST2在图17所示的时间(定时)T1时实施。在该工序中，保持在作为焊头的焊针CAP的顶端的、球形的球部BWb的顶端部分与接合面PDt接触。
另外，如图20及图21所示，导线接合工序在球部接触工序ST2之后还包括如下工序：利用载荷M1(参照图17)将导线BW的球部BWb向着接合面PDt按压，从而使球部BWb变形(图17所示的球部变形工序ST3)。球部变形工序ST3在图17所示的时间T1与时间(定时)T2之间实施。在球部变形工序ST3中，经由焊针CAP对球部BWb施加载荷而将球部BWb向焊盘PD的厚度方向按压。此时施加的载荷M1的大小在图17所示的时间T1与时间(定时)T7之间最大，例如为0.8N(牛顿)左右。这时，对球部BWb及焊盘PD进行加热。另外，球部BWb被焊盘PD与焊针CAP夹着，并仿照焊针CAP的形状变形。另外，如图21所示，球部BWb的一部分被按压在焊盘PD上，从而使焊盘PD的一部分变形。这时，由于球部BWb的一部分埋入焊盘PD内，所以所埋入的区域内的构成焊盘PD的金属材料的一部分被排出到球部BWb周围。因此，如图21所示，焊盘PD的接合面PDt变成如下状态：与球部BWb紧贴的区域的周围的高度比与球部BWb紧贴的区域凸起。
另外，在本实施方式中，进行施加高载荷的球部变形工序ST3的时间比图17所示的擦除工序ST4或施加超声波的期间短。进行球部变形工序ST3的期间的长度(时间T2－时间T1)为1msec(毫秒)左右。这样，通过在短期间内施加高载荷，能够提高图21所示的球部BWb中的与接合面PDt紧贴的面的平坦性。
如图17所示，在时间T1与时间T2之间，换言之，在球部变形工序ST3期间，不施加超声波，并且也不实施后述的擦除动作。因此，在球部变形工序ST3中，即使是施加了比较大的载荷的情况下，焊盘PD本身或绝缘层IML1的损伤也不易发生。
另外，如图22及图23所示，导线接合工序在球部变形工序ST3(参照图17)之后还包括如下工序：一边利用比载荷M1(参照图17)小的载荷M2(参照图17)将导线BW的球部BWb向焊盘PD按压，一边使球部BWb在俯视时沿着包括X方向及Y方向在内的多个方向移动(图17所示的擦除工序ST4)。
图15及图16所示的导线接合装置WBD的支承部SUP能够在图15所示的X-Y平面内自由移动。另外，通过调节支承部SUP的移动量，能够进行一边按压图25所示的球部BWb一边使球部BWb与焊盘PD在俯视下的相对位置关系移动的动作(称为擦除动作)。在由该擦除动作对球部BWb施加振动的情况下，能够以比较低的频率(例如1Hz左右)使球部BWb机械振动。
这样，当一边按压球部BWb一边以低频率使球部BWb振动时，在球部BWb与焊盘PD的接合面PDt的界面上除去金属氧化膜。为了在球部BWb与焊盘PD的接合界面上稳定地形成合金层PDa(参照图14)，优选为除去上述金属氧化膜。因此，在擦除工序ST4中，也包括球部BWb与焊盘PD相接触的部分的周边区域，优选为除去金属氧化膜。
在本实施方式的情况下，如上所述，图15及图16所示的导线接合装置WBD的支承部SUP能够在图15所示的X-Y平面内自由移动。因此，在擦除工序ST4(参照图17)中，能够包括球部BWb与焊盘PD相接触的部分(接触界面)的周边区域在内地除去金属氧化膜。具体地，在导线接合装置WBD的支承部SUP于图15所示的X-Y平面内沿X方向及Y方向同时振动了的情况下，通过调节X方向上的振动的周期及振幅和Y方向上的振动的周期及振幅，能够使球部BWb在X-Y平面内沿任意方向动作。例如，如图22中作为方向DR1示意性所示，能够使球部BWb以描画将焊盘PD的中央作为中心的圆的方式动作。换言之，通过使支承部SUP在俯视时沿多个方向同时动作，能够使球部BWb进行圆周运动(或螺旋运动)。还例如，如图22中作为方向DR2示出的那样，能够在X-Y平面内沿彼此交叉的任意方向(例如X方向和Y方向)振动。这样，通过使球部BWb在沿着焊盘PD的接合面PDt的平面内沿多个方向移动，能够在球部BWb与焊盘PD相接触的部分及其周边区域内可靠地除去金属氧化膜。其结果是，在后述的主接合工序ST6中，当形成导线BW的金属(例如铜)与焊盘PD的金属(例如铝)的合金层PDa(参照图14)时，变得不易混入金属氧化物的成分。
此外，在图22中，作为方向DR2而示意性地示出了两端带有箭头的多个双向箭头。“使球部BWb振动”是指使球部BWb沿着由双向箭头表示的直线向着彼此相反的方向进行往复运动(在同一线上往返)。该往复运动是通过对球部施加具有某个频率的超声波而产生的。在后述的图24和图25中也示出了双向箭头的方向DR3，该情况也表示球部BWb沿着由方向DR3表示的直线进行往复运动。
在擦除工序ST4(参照图17)中，对球部BWb施加的载荷M2(参照图17)的值能够适用各种各样的变形例，但在本实施方式的情况下，比在后述的主接合工序ST6(参照图17)中施加的载荷M4(参照图17)低，例如为0.1N(牛顿)左右。若在擦除工序ST4中施加的载荷M2的值很小，则能够降低在擦除工序ST4中对焊盘PD的周边施加的应力。另一方面，从容易除去金属氧化膜的观点来看，优选为载荷M2的值很大。根据本申请发明人的研究，在载荷M2与图17所示的载荷M4相同(例如0.15N(牛顿)左右)的情况下，未能确认擦除工序ST4中的焊盘PD(参照图23)和绝缘层IML1(参照图23)的损伤。另外，在图17所示的载荷M2与后述活化工序ST5中施加的载荷M3相同(例如0.05N(牛顿)左右)的情况下，确认了能够除去金属氧化膜。
另外，如图23所示，在擦除工序ST4(参照图17)中，构成焊盘PD的金属材料的一部分被排出到与球部BWb紧贴的区域周围。因此，焊盘PD的接合面PDt变成如下状态：与球部BWb紧贴的区域的周围的高度比与球部BWb紧贴的区域隆起得更高。与球部BWb紧贴的区域的周围的高度的隆起程度比上述球部变形工序ST3(参照图17)时的更高。
另外，导线接合工序在擦除工序ST4之后还包括如下工序：一边利用比载荷M2(参照图17)小的载荷M3(参照图17)将导线BW的球部BWb向焊盘PD按压，一边经由焊针CAP对球部BWb施加超声波(图17所示的活化工序ST5)。另外，导线接合工序在活化工序ST5之后还包括如下工序：一边利用比载荷M3大且比载荷M1(参照图17)小的载荷M4(参照图17)将导线BW的球部BWb向焊盘PD按压，一边施加超声波，从而将球部BWb与焊盘PD接合(图17所示的主接合工序ST6)。
换言之，在本实施方式的导线接合工序中，先以低载荷(载荷M3)的状态施加了超声波之后，以提高到相对较高的载荷M4后的状态继续施加超声波，由此，将球部BWb与焊盘PD接合。活化工序ST5在图17所示的时间T5与时间(定时)T6之间实施。另外，主接合工序ST6在图17所示的时间T6与时间(定时)T7之间实施。
在本实施方式中，在活化工序ST5及主接合工序ST6中施加的超声波的频率例如为120kHz(千赫)左右。另外，进行活化工序ST5及主接合工序ST6的期间的长度(时间T7－时间T5)为10msec(毫秒)左右。
根据本申请发明人的研究，导线BW与焊盘PD在施加了某种程度的高载荷后的状态下通过施加超声波振动等高频振动而接合。尤其是在由铜构成的导线BW与由铝构成的焊盘PD难以接合的、上述球部接触工序ST2、球部变形工序ST3及擦除工序ST4的各工序中，在球部BWb与焊盘PD紧贴的界面上几乎并不形成合金层PDa(参照图14)。另外，为了形成从接合强度或电气特性的观点来看为良好状态的合金层PDa，如本实施方式所述可知，尤其优选预先以低载荷的状态开始进行超声波的施加，之后在变成高载荷后的状态下施加超声波的方法。
在本实施方式的活化工序ST5(参照图17)中，施加的载荷M3(参照图17)例如为0.05N(牛顿)左右。这样，在施加超声波时的载荷很低的情况下，即使施加超声波也不开始进行球部BWb与焊盘PD的接合，而是使球部BWb与焊盘PD的紧贴界面互相摩擦而实现活化。另外，由于活化工序ST5中的载荷M3的值很低，所以在该阶段中并不开始进行球部BWb与焊盘PD的接合。换言之，根据本实施方式，能够抑制在球部BWb与焊盘PD的紧贴界面的一部分上开始局部地接合(合金层PDa(参照图25)的形成)。然后，当在紧贴界面整体被活化后的状态下施加载荷M4(参照图17)及超声波时，会在整个紧贴界面上形成合金层PDa。因此，即使在载荷M4的值并不那么大的情况下，也能获得良好的合金层PDa。载荷M4的值例如为0.15N(牛顿)左右。
即，根据本实施方式，在以施加了比载荷M4低的载荷M3的状态施加超声波的活化工序ST5之后，通过提高对球部BWb施加的载荷来施加载荷M4及超声波，能够在接合面PDt与球部BWb的接触界面被均匀活化后的状态下开始进行接合。其结果是，在主接合工序ST6中，能够抑制因施加给焊盘PD的应力的影响而致使焊盘PD和绝缘层IML1受到损伤的情况。另外，通过在主接合工序ST6之前进行活化工序ST5，形成在图25所示的球部BWb与焊盘PD之间的合金层PDa的膜质良好。因此，即使在主接合工序ST6中的载荷M4很低的情况下，也能确保足够的接合强度。另外，根据本实施方式，由于合金层PDa的密度和组成不易发生不均匀的情况，所以能够使导线BW与焊盘PD的接合界面中的电气特性稳定化。
另外，在本实施方式的情况下，图17所示的擦除工序ST4和活化工序ST5中施加的载荷M2、M3比载荷M4小。因此，能够降低在进行球焊的期间中(图17所示的时间T7－时间T1)施加的载荷给与焊盘PD(参照图25)的冲量。
另外，从在活化工序ST5中将焊盘PD的接合面PDt活化后立即开始主接合工序ST6的观点来看，如图17所示，优选为在继续持续地施加在活化工序ST5中施加的超声波后的状态下进行主接合工序ST6。但是，在能够很容易地进行超声波的启动-停止(ON-OFF)的切换的情况下，也可以在从活化工序ST5向主接合工序ST6转移之前，暂且停止超声波的施加。
另外，在活化工序ST5及主接合工序ST6中施加的超声波由图15及图16所示的导线接合装置WBD的振荡器USG来生成。具体地，由振荡器USG振荡产生的超声波US1由变幅杆USH放大，并经由焊针CAP传递至导线BW。在本实施方式的情况下，在活化工序ST5及主接合工序ST6中如上所述地施加例如频率为120kHz(千赫)左右的超声波。另外，如上所述，从降低因接合界面为不均匀的状态而产生的应力的观点来看，优选为在擦除工序ST4中设为不开始进行接合。因此，在除了活化工序ST5及主接合工序ST6以外的各工序中，尤其优选将振荡器USG关闭，不施加超声波。但是，也可以施加不会对球部BWb与焊盘PD的接合造成影响的程度的振动。例如，在擦除工序ST4中，也可以对球部BWb施加频率为1Hz(赫兹)左右的振动。还例如，若是对球部BWb与接合面PDt的接合开始无影响的程度的超声波，则也可以在例如图17所示的擦除工序ST4中施加超声波。若在擦除工序ST4中施加超声波，则其频率优选为相对于在后述的活化工序ST5及主接合工序ST6中施加的超声波的频率不足一半(尤其优选为1/4以下)。
另外，对球部BWb施加的超声波的振动方向因以下理由而被限定为一个方向。超声波US1是疏密波(纵波)，因此沿着变幅杆USH的延伸方向(在图15及图16的示例中为X方向)振动。另外，如图16所示，由于焊针CAP固定在变幅杆USH上，所以经由焊针CAP传递至球部BWb的超声波US1在俯视下的振动方向，变成与变幅杆USH的延伸方向相同的方向。
在图24及图25的示例中，超声波的振动方向(沿直线往复运动的方向)即方向DR3与X方向相同。但是，如上所述，超声波的振动方向由图15所示的变幅杆USH的延伸方向来规定。因此，作为本实施方式的变形例，超声波的振动方向即方向DR3也可以是与X方向及Y方向不相同的方向(与X方向及Y方向交叉的方向)。
另外，当对球部BWb施加超声波时，通过伴随着超声波的振动而将构成焊盘PD的金属材料的一部分向周围排出，从而形成溅起部SPP。溅起部SPP沿着超声波的振动方向即方向DR3延伸。因此，在图24的示例中，溅起部SPP以与Y方向相比在X方向上更长的方式延伸。另外，溅起部SPP通过被施加高频振动而生长得更长。因此，即使在上述球部变形工序ST3(参照图17)和擦除工序ST4(参照图17)中在球部BWb的周围也会形成隆起的部分，但溅起部SPP以与这些隆起的部分相比更薄、更长的方式延伸。
另外，将活化工序ST5(参照图17)与主接合工序ST6(参照图17)进行比较，在施加超声波时对球部BWb施加的载荷越小，则溅起部SPP越容易生长。因此，在本实施方式的情况下，溅起部SPP在活化工序ST5中容易生长。但是，从以下观点来看，优选抑制溅起部SPP的扩展。即，若溅起部SPP生长、且分别形成在相邻焊盘PD上的溅起部SPP彼此接触，则会导致电路短路。另外，若溅起部SPP的面积变大，则会变得容易断裂，若焊盘PD与溅起部SPP断裂且分离，则会变成导电性的异物。因此，从提高半导体器件的可靠性的观点来看，优选即使产生了溅起部SPP，也将其面积抑制到很小。
作为抑制溅起部SPP生长的方法，使成为溅起部原料的焊盘PD的体积缩小的方法是有效的。在本实施方式的情况下，如上所述，焊盘PD的厚度THpd(参照图6)很薄，例如为覆盖焊盘PD的绝缘膜PV的厚度THpv(参照图6)以下。这样，根据本实施方式，由于焊盘PD的厚度THpd很薄，所以在活化工序ST5中，即使以施加了低载荷即载荷M3(参照图17)后的状态施加超声波，也能抑制溅起部SPP的生长。
另外，在本实施方式的情况下，图14所示的合金层PDa的大部分都在图17所示的主接合工序ST6中形成。换言之，直到主接合工序ST6开始为止，球部BWb与焊盘PD几乎都不接合。因此，从提高接合强度的观点来看，形成合金层PDa的主接合工序ST6的实施期间最好在某种程度上比较长。在本实施方式的情况下，如图17所示，主接合工序ST6的期间长度(时间T7－时间T6)比活化工序ST5的期间长度(时间T6－时间T5)长。换言之，在主接合工序ST6中施加超声波的时间比在活化工序ST5施加超声波的时间长。另外，主接合工序ST6的期间长度(时间T7－时间T6)比球部变形工序ST3的期间长度(时间T2－时间T1)长。这样，通过增长主接合工序ST6的长度，能够提高球部BWb与焊盘PD的接合强度。
通过以上各工序，导线BW的球部BWb与焊盘PD接合。在导线接合工序中，在球部BWb与焊盘PD接合之后、即主接合工序ST6之后，形成图10所示那样的导线圈。导线圈一边将导线BW从焊针CAP(参照图25)陆续放出，一边使焊针CAP向着引线LD的导线接合区域移动。之后，通过将导线BW的另一方端部与引线LD的上表面LDt接合而形成图10所示的导线BW。
<变形例>
以上，将本申请发明人提出的技术方案基于实施方式进行了具体说明，但本发明并不限于所述实施方式，在不脱离其要旨的范围内当然还能够进行各种各样的改变。
(变形例1)
在上述实施方式中，利用图17所示的时序图说明了球焊工序中的焊头的高度、对球部施加的载荷、擦除动作的有无、以及超声波振动的有无的关系，但对于图17还能应用各种各样的变形例。图26～图28分别是作为图17的变形例的时序图。
首先，通过图17说明了在擦除工序ST4中对球部BWb施加的载荷M2的值比载荷M3大、且比载荷M4小的实施方式。但对于载荷M2的值还有各种各样的变形例。
例如像图26所示的变形例那样，在擦除工序ST4中对球部BWb(参照图23)施加的载荷M2的值也可以与在主接合工序ST6中对球部BWb(参照图25)施加的载荷M4的值相同。在图26所示的变形例的情况下，在结束擦除动作的时间T4之后、且在施加超声波的时间T5之前，将对球部BWb施加的载荷缩小成载荷M3。然后，在施加超声波的时间T5之后，将对球部BWb施加的载荷再次增大成与载荷M2相同的载荷M4。这种情况下，在擦除工序ST4中，由于是利用比图17的示例大的载荷来除去金属氧化膜，所以能够高效率地除去金属氧化膜。在图17及图26的示例中，进行擦除动作的期间的长度(时间T4－时间T3)为5msec(毫秒)左右，但根据金属氧化膜的除去效率的程度不同，也有能够缩短该期间的长度的情况。
但若载荷M2的值很大，则在整个球焊工序中对焊盘PD施加的载荷的冲量变大，会导致焊盘PD(参照图25)或绝缘层IML1(参照图25)受到损伤。因此，载荷M2优选为载荷M4以下。
还例如像图27所示的变形例那样，在擦除工序ST4中对球部BWb(参照图23)施加的载荷M2的值也可以与在活化工序ST5中对球部BWb施加的载荷M3的值相同。在图27所示的变形例的情况下，在球部变形工序ST3结束的时间T2时将传递至球部BWb的载荷的值提高到载荷M2，之后，在到主接合工序ST6开始的时间T6为止的期间内持续地施加固定的载荷。这种情况下，在擦除工序ST4中，降低传递至焊盘PD的应力这点与图17的示例相比能够进一步降低。因此，即使在图6所示的焊盘PD的厚度THpd特别薄的情况下(例如600nm以下)，也能抑制图23所示的焊盘PD和绝缘层IML1的损伤。
另外，图17、图26、及图27分别记载的时间T2～时间T3的期间以及时间T4～时间T5的期间是在一个工序结束之后到过渡到下一个工序为止的过渡期间，这些期间最好比较短。例如，虽省略了图示，但时间T2与时间T3也可以是同时的。
另外，在图17的示例中，在时间T5～时间T7的期间内施加超声波，而在其他期间内不施加超声波。但是，作为图17的变形例，还可以在除了时间T5～时间T7的期间以外也施加超声波。
例如，在图28所示的变形例中，除了时间T5～时间T7的期间之外hai在时间T0～时间T1的期间内施加超声波这一点与图17所示的实施方式不同。时间T0～时间T1的期间是上述导线接合工序中的从球部形成工序ST1到球部接触工序ST2为止的期间。这样，通过在从球部形成工序ST1到球部接触工序ST2之间施加超声波，能够提高图19所示的俯视时的球部BWb与焊盘PD的对位精度。
另外，虽省略了图示，但作为图17的其他变形例，也可以在除了时间T5～时间T7的期间以外的期间中以不会使导线BW与焊盘PD的接合开始的程度的频率施加超声波。
(变形例2)
另外，在上述实施方式中，对图3所示的多条导线BW分别由铜构成、且焊盘PD由铝构成的实施方式进行了说明。但是，如上述实施方式所说明的那样，构成导线BW的金属材料比构成焊盘PD的金属材料硬，在球焊时焊盘PD容易变形的情况下，也能适用其他金属材料。但是，在导线BW由金构成、且焊盘PD由铝构成的情况下，与导线BW为铜的情况相比，导线BW与焊盘PD更容易接合。因此，如上述实施方式所说明的那样，在直到主接合工序ST6为止导线BW与焊盘PD的接合几乎没开始这一点上，应用于导线BW由铜构成的情况尤其有效。
(变形例3)
另外，在上述实施方式中，如用图6所说明的那样，对焊盘PD的厚度THpd很薄(例如1μm以下)的情况进行了说明。但是，例如即使在焊盘PD的厚度THpd比覆盖焊盘PD的绝缘膜PV的厚度THpv厚的情况下，也能应用上述实施方式所说明的导线接合工序。但是，与上述实施方式所说明的实施方式相比，由于溅起部SPP(参照图25)容易生长，所以需要缩短活化工序ST5的期间等用于抑制溅起部SPP的生长的对策。
(变形例4)
另外，例如在上述实施方式中，作为半导体芯片CP的焊盘PD与导线BW的球部BWb接合的半导体器件的示例，对引线框架型半导体器件进行了说明，但在半导体器件的实施方式中还有各种各样的变形例。例如像图29所示的半导体器件PKG2那样，还能适用于半导体芯片CP搭载在布线衬底(基材)WS上的、区域阵列型半导体器件。图29是作为图2的变形例的半导体器件的剖视图。区域阵列型半导体器件是指配置在安装面上的外部端子排列成阵列状(也称为矩阵状)的半导体器件。在区域阵列型半导体器件上，如图29所示的半导体器件PKG2那样，有在布线衬底WS的安装面即下表面WSb上形成有作为外部端子的焊锡球SB的、BGA(Ball Grid Array：球栅阵列)等。
在半导体器件PKG2的情况下，导线BW的一方端部即球部BWb与半导体芯片CP的焊盘PD连接，另一方端部与在布线衬底WS的上表面WSt侧露出的接合引线(端子)BL连接。接合引线BL经由布线衬底WS所具备的布线WSw与外部端子即焊锡球SB连接。
另外，在半导体器件PKG2的制造方法的情况下，在图7所示的基材准备工序中，代替上述实施方式所说明的引线框架LF(参照图8)而准备布线衬底WS。另外，在图7所示的芯片焊接工序中，半导体芯片CP经由芯片焊接材料DB搭载于布线衬底WS的芯片搭载面即上表面(主面)WSt上。另外，在图7所示的导线接合工序中，导线BW的一方端部即球部BWb与半导体芯片CP的焊盘PD连接，另一方端部与在布线衬底WS的上表面WSt侧露出的接合引线BL连接。另外，在图7所示的封固工序中，搭载于布线衬底WS的上表面WSt上的半导体芯片CP、多条导线BW及多条接合引线BL分别由封固体MR封固。另一方面，布线衬底WS的下表面WSb侧并不被封固，而是从封固体MR露出。另外，省略图7所示的电镀工序及引线切断工序，并作为代替而进行将多个焊锡球SB搭载于布线衬底WS的下表面WSb侧的球装载工序。
(变形例5)
另外，在不脱离上述实施方式所说明的技术思想的要旨的范围内，能够将变形例彼此进行组合来应用。
另外，在不脱离在上述实施方式中说明的技术思想的要旨的范围内，能够将上述各实施方式彼此或者各实施方式所说明的各变形例彼此进行组合来应用。

Claims (16)

1.一种半导体器件的制造方法，其特征在于，具有以下的工序：
(a)工序，准备具有第一主面的半导体芯片，所述第一主面上形成有绝缘膜、以及从形成于所述绝缘膜的多个开口部分别露出的多个电极；
(b)工序，准备基材，所述基材具有供所述半导体芯片搭载的第二主面、和多个端子；
(c)工序，在所述(a)工序及所述(b)工序之后，在所述基材的所述第二主面搭载所述半导体芯片；
(d)工序，在所述(c)工序之后，经由多条导线将所述多个电极与所述多个端子分别电连接；以及
(e)工序，在所述(d)工序之后，将所述半导体芯片和所述多条导线进行树脂封固，
在所述(a)工序中，
所述半导体芯片的所述多个电极包括第一电极，该第一电极具有在所述多个开口部中的第一开口部露出的第一接合面，
在俯视时，所述半导体芯片的所述多个开口部分别具有包括沿第一方向延伸的第一边、以及沿与所述第一方向交叉的第二方向延伸的第二边在内的多个边，
所述(d)工序包括以下工序：
(d1)工序，使所述多条导线中包含的第一导线的球部与所述第一电极的所述第一接合面接触；
(d2)工序，在所述(d1)工序之后，利用第一载荷对所述第一导线的所述球部朝向所述第一接合面进行按压；
(d3)工序，在所述(d2)工序之后，一边利用比所述第一载荷小的第二载荷将所述第一导线的所述球部向所述第一电极按压，且一边使所述球部在俯视时沿包括彼此交叉的两个方向在内的多个方向移动；
(d4)工序，在所述(d3)工序之后，一边利用与所述第二载荷相同或比所述第二载荷小的第三载荷将所述第一导线的所述球部向所述第一电极按压，一边对所述球部施加具有第一频率的第一超声波，由此使所述球部在俯视时沿着第三方向进行往复运动；以及
(d5)工序，在所述(d4)工序之后，一边利用比所述第三载荷大、且比所述第一载荷小的第四载荷将所述第一导线的所述球部向所述第一电极按压，一边施加具有所述第一频率的所述第一超声波，由此使所述球部在俯视时沿着所述第三方向进行往复运动，从而将所述球部与所述第一电极接合。
2.根据权利要求1所述的半导体器件的制造方法，其特征在于，所述第三方向与所述第一方向及所述第二方向不同。
3.根据权利要求2所述的半导体器件的制造方法，其特征在于，在所述(d4)工序及所述(d5)工序的每个工序中，一边使所述球部仅沿着所述第三方向进行往复运动，一边对所述球部施加所述第一超声波。
4.根据权利要求1所述的半导体器件的制造方法，其特征在于，在所述(d3)工序中，使所述球部在俯视时分别沿着所述两个方向进行往复动作。
5.根据权利要求1所述的半导体器件的制造方法，其特征在于，在从所述(d4)工序到所述(d5)工序的期间，持续地施加具有所述第一频率的所述第一超声波。
6.根据权利要求1所述的半导体器件的制造方法，其特征在于，在所述(d3)工序中不施加超声波。
7.根据权利要求1所述的半导体器件的制造方法，其特征在于，在所述(d3)工序中，一边利用比所述第一载荷小的所述第二载荷将所述第一导线的所述球部向所述第一电极按压，且一边使所述球部在俯视时沿包括彼此不同的所述两个方向在内的所述多个方向移动，一边施加具有由所述第一频率的1/4以下构成的第二频率的第二超声波。
8.根据权利要求1所述的半导体器件的制造方法，其特征在于，在所述(d5)工序中施加所述第一超声波的时间比在所述(d4)工序中施加所述第一超声波的时间长。
9.根据权利要求1所述的半导体器件的制造方法，其特征在于，在所述(d4)工序中施加的所述第二载荷与所述第四载荷相同。
10.根据权利要求1所述的半导体器件的制造方法，其特征在于，在所述(d4)工序中施加的所述第二载荷与所述第三载荷相同。
11.根据权利要求1所述的半导体器件的制造方法，其特征在于，
所述第一电极具有位于所述第一接合面的相反侧的第一背面，
在从所述第一接合面及所述第一背面中的一方朝向另一方的第四方向上，接合所述球部之前的所述第一电极的厚度比所述绝缘膜中的将所述第一电极的一部分覆盖的部分的厚度薄。
12.根据权利要求1所述的半导体器件的制造方法，其特征在于，所述第一电极由以铝为主成分的金属材料构成，
所述第一导线由以铜为主成分的金属材料构成。
13.根据权利要求1所述的半导体器件的制造方法，其特征在于，所述第一电极具有位于所述第一接合面的相反侧的第一背面，
在所述第一电极的所述第一背面侧，形成有比所述第一电极的厚度厚的第一绝缘层。
14.根据权利要求1所述的半导体器件的制造方法，其特征在于，在所述(d3)工序中，将形成在所述第一电极的所述第一接合面上的金属氧化膜除去。
15.根据权利要求1所述的半导体器件的制造方法，其特征在于，在所述(d5)工序中，在所述球部与所述第一电极的接合界面形成有合金层。
16.根据权利要求1所述的半导体器件的制造方法，其特征在于，在所述(d2)工序中，所述球部变形。
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JP2022082887A (ja) 2020-11-24 2022-06-03 ルネサスエレクトロニクス株式会社 半導体装置およびその製造方法
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US20180182731A1 (en) 2018-06-28
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