JP6688725B2 - 半導体装置の製造方法 - Google Patents
半導体装置の製造方法 Download PDFInfo
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- JP6688725B2 JP6688725B2 JP2016251734A JP2016251734A JP6688725B2 JP 6688725 B2 JP6688725 B2 JP 6688725B2 JP 2016251734 A JP2016251734 A JP 2016251734A JP 2016251734 A JP2016251734 A JP 2016251734A JP 6688725 B2 JP6688725 B2 JP 6688725B2
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- ball portion
- pad
- load
- semiconductor device
- electrode
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Description
本願において、実施の態様の記載は、必要に応じて、便宜上複数のセクション等に分けて記載するが、特にそうでない旨明示した場合を除き、これらは相互に独立別個のものではなく、記載の前後を問わず、単一の例の各部分、一方が他方の一部詳細または一部または全部の変形例等である。また、原則として、同様の部分は繰り返しの説明を省略する。また、実施の態様における各構成要素は、特にそうでない旨明示した場合、理論的にその数に限定される場合および文脈から明らかにそうでない場合を除き、必須のものではない。
まず、本実施の形態の半導体装置PKG1の構成の概要について、図1〜図4を用いて説明する。図1は本実施の形態の半導体装置の上面図である。また、図2は、図1のA−A線に沿った断面図である。また、図3は、図1に示す封止体を透視した状態で半導体装置の内部構造を示す透視平面図である。
次に、図2および図3に示す半導体チップについて説明する。図4は、図3に示す半導体チップの平面図である。また、図5は、図4のA−A線に沿った拡大断面図である。また、図6は、図5のA部をさらに拡大した拡大断面図である。
次に、図1に示す半導体装置PKG1の製造方法について、説明する。本実施の形態の半導体装置PKG1は、図7に示す組立てフローに沿って製造される。図7は、本実施の形態の半導体装置の組み立てフローを示す説明図である。
図7に示す基材準備工程では、図8に示すリードフレーム(基材)LFを準備する。図8は、図7に示す基材準備工程で準備するリードフレームの一部を示す拡大平面図である。
また、図7に示す半導体チップ準備工程では、図4〜図6を用いて説明した半導体チップCPを準備する。本工程では、例えば、シリコンからなる半導体ウエハ(図示は省略)の主面側(図6に示す半導体基板SSの上面SSt側)に、複数の半導体素子Q1(図6参照)やこれに電気的に接続される配線層DL(図6参照)からなる半導体ウエハを準備する。また、配線層DLの最上層には、複数のパッドPD(図4参照)が形成される。
次に、図7に示すダイボンド工程(半導体チップ搭載工程)では、図9に示すように、ダイパッドDPに半導体チップCPを搭載する。図9は、図8のA−A線に沿った断面において、リードフレームのダイパッド上に半導体チップを搭載した状態を示す拡大断面図である。
次に、図7に示すワイヤボンド工程では、図10に示すように、半導体チップCPの表面CPtに形成された複数のパッドPDと、半導体チップCPの周囲に配置された複数のリードLDとを、複数のワイヤ(導電性部材)BWを介して、それぞれ電気的に接続する。図10は、図9に示す半導体チップと複数のリードとを、ワイヤを介して電気的に接続した状態を示す拡大断面図である。
次に、図7に示す封止工程では、図10に示す半導体チップCP、複数のワイヤBW、および複数のリードLDのそれぞれのインナリード部ILDを樹脂により封止し、図11に示す封止体MRを形成する。図11は、図10に示す半導体チップを樹脂封止した状態を示す拡大断面図である。
次に、図7に示すめっき工程では、図11に示す封止体MRから露出する複数のリードLDのそれぞれの一部(アウタリード部OLD、露出面)に金属膜MC(図2参照)をめっき法により形成する。本工程では、リードLDの露出面に、例えば半田から成る金属膜MCが形成される。また、金属膜MCの形成方法としては、電離した金属イオンをリードLDの露出面に析出させる、電気めっき法を適用することができる。電気めっき法の場合、金属膜MC形成時の電流を制御することで金属膜MCの膜質を容易に制御できる点で好ましい。また、電気めっき法は、金属膜MCの形成時間が短くできる点で好ましい。
次に、図7に示すリードカット工程では、図12に示すように、複数のリードLDのそれぞれのアウタリード部OLDを切断し、リードフレームLFから複数のリードLDのそれぞれを切り離す。また、本実施の形態では、リードLDを切断した後、複数のリードLDを成形し、図2に示すような曲げ加工を施す。図12は、図11に示す複数のリードの露出面に金属膜を形成し、それぞれ切断した後、成形した状態を示す拡大平面図である。
次に、図7に示す個片化工程では、図12に示す複数の吊りリードHLをそれぞれ切断して、複数のデバイス形成部LFaのそれぞれにおいて半導体パッケージを分離する。本工程では複数の吊りリードHL、および封止体MRの角部に残った樹脂を切断して、半導体パッケージである図1に示す半導体装置PKG1(詳しくは、検査工程前の検査体)を取得する。切断方法は、例えば、上記リード成形工程と同様に、図示しない切断金型を用いて、プレス加工により切断することができる。
次に、図7に示すワイヤボンド工程の詳細について説明する。図13は、図4のB部において、パッドにワイヤが接続された状態を示す拡大平面図である。図14は、図13のA−A線に沿った拡大断面図である。
以上、本願発明者によってなされた発明を実施の形態に基づき具体的に説明したが、本発明は前記実施の形態に限定されるものではなく、その要旨を逸脱しない範囲で種々変更可能であることはいうまでもない。
上記実施の形態では、ボールボンディング工程におけるボンディングツールの高さ、ボール部に印加される荷重、スクラブ動作の有無、および超音波振動の有無の関係について図17に示すタイミングチャートを用いて説明したが、図17には種々の変形例が適用できる。図26〜図28のそれぞれは、図17に対する変形例であるタイミングチャートである。
また、上記実施の形態では、図3に示す複数のワイヤBWのそれぞれが、銅から成り、パッドPDがアルミニウムから成る実施態様について説明した。しかし、上記実施の形態で説明したように、ワイヤBWを構成する金属材料の方がパッドPDを構成する金属材料よりも硬く、ボールボンディング時にパッドPDが変形し易い場合には、他の金属材料であっても適用できる。ただし、ワイヤBWが金から成り、パッドPDがアルミニウムから成る場合、ワイヤBWが銅である場合と比較して、ワイヤBWとパッドPDとが接合し易い。したがって、上記実施の形態で説明したように、本接合工程ST6までは、ワイヤBWとパッドPDとの接合が殆ど開始されないという点では、ワイヤBWが銅から成る場合に適用して特に有効である。
また、上記実施の形態では、図6を用いて説明したように、パッドPDの厚さTHpdが薄い(例えば1μm以下)である場合について説明した。しかし、例えば、パッドPDの厚さTHpdがパッドPDを覆う絶縁膜PVの厚さTHpvより厚いような場合であっても、上記実施の形態で説明したワイヤボンド工程を適用することはできる。ただし、上記実施の形態で説明した実施態様と比較して、スプラッシュ部SPP(図25参照)が成長し易いので、活性化工程ST5の期間を短くするなど、スプラッシュ部SPPの成長を抑制する対策が必要である。
また、例えば、上記実施の形態では、半導体チップCPのパッドPDとワイヤBWのボール部BWbとが接合される半導体装置の例として、リードフレーム型の半導体装置について説明したが、半導体装置の実施態様には種々の変形例がある。例えば、図29に示す半導体装置PKG2のように、半導体チップCPが配線基板(基材)WSに搭載される、エリアアレイ型の半導体装置に適用することもできる。図29は、図2に対する変形例である半導体装置の断面図である。エリアアレイ型の半導体装置とは、実装面に配置された外部端子が、アレイ状(マトリクス状ともいう)に配列された半導体装置をいう。エリアアレイ型半導体装置には、図29に示す半導体装置PKG2のように、配線基板WSの実装面である下面WSbにおいて、外部端子としての半田ボールSBが形成されている、BGA(Ball Grid Array)などがある。
また、上記実施の形態で説明した技術思想の要旨を逸脱しない範囲内において、変形例同士を組み合わせて適用することができる。
BW ワイヤ(導電性部材)
BWb ボール部
CAP キャピラリ
CBb 下面
CBP 導体パターン(配線)
CBt 上面
CP 半導体チップ
CPb 裏面(下面)
CPs 側面
CPs1,CPs2,CPs3,CPs4,Pks1,Pks2,Pks3,Pks4,S1,S2,S3,S4, 辺(主辺)
CPt 表面(主面、上面)
DB ダイボンド材(接着材)
DL 配線層
DP ダイパッド(チップ搭載部)
DPt 上面(表面、主面、チップ搭載面)
DR1,DR2,DR3 方向
HL 吊りリード
ILD インナリード部
IML,IML1 絶縁層
LD リード(端子、外部端子)
LDt 上面
LF リードフレーム(基材)
LFa デバイス形成部
LFb 枠部
M1,M2,M3,M4 荷重
MC 金属膜(外装めっき膜)
MD 成形金型
MDc キャビティ
MR 封止体(樹脂体、封止部)
MRb 下面(裏面、被実装面)
MRs 側面
MRt 上面
OLD アウタリード部
OSP オフセット部
PD パッド(電極、電極パッド、ボンディングパッド)
PDa 合金層
PDb 裏面
PDt 接合面
PKG1,PKG2 半導体装置
PV 保護膜(パッシベーション膜、絶縁膜)
PVb 下面(面)
PVk 開口部
PVt 上面(面)
Q1 半導体素子
SB 半田ボール
SDL 配線部
SPP スプラッシュ部
SS 半導体基板
SSb 下面(裏面)
SSt 上面(半導体素子形成面)
ST1 ボール部形成工程
ST2 ボール部接触工程
ST3 ボール部変形工程
ST4 スクラブ工程
ST5 活性化工程
ST6 本接合工程
STG ステージ
SUP 支持部
TB タイバー
TH1,THcb,THpd,THpv 厚さ
US1 超音波
USG 発振器
USH ホーン
WBD ワイヤボンディング装置
WS 配線基板(基材)
WSb 下面
WSt 上面(主面)
WSw 配線
Claims (15)
- 以下の工程を有する半導体装置の製造方法:
(a)絶縁膜、および前記絶縁膜に形成された複数の開口部からそれぞれ露出する複数の電極が形成された第1主面を有する半導体チップを準備する工程、
(b)前記半導体チップが搭載される第2主面と、複数の端子とを有する基材を準備する工程、
(c)前記(a)工程および前記(b)工程の後、前記基材の前記第2主面に前記半導体チップを搭載する工程、
(d)前記(c)工程の後、前記複数の電極と前記複数の端子とを、複数のワイヤを介して、それぞれ、電気的に接続する工程、
(e)前記(d)工程の後、前記半導体チップと、前記複数のワイヤと、を樹脂封止する工程、
ここで、
前記(a)工程において、
前記複数の電極には、前記複数の開口部のうちの第1開口部において露出する第1接合面を有する第1電極が含まれ、
平面視において、前記複数の開口部のそれぞれは、第1方向に延びる第1辺と、前記第1方向と交差する第2方向に延びる第2辺と、を含む複数の辺を有し、
前記(d)工程は、以下の工程を含む、
(d1)前記第1電極の前記第1接合面に、前記複数のワイヤに含まれる第1ワイヤのボール部を接触させる工程、
(d2)前記(d1)工程の後、前記第1ワイヤの前記ボール部を前記第1接合面に向かって第1荷重で押圧する工程、
(d3)前記(d2)工程の後、前記第1荷重より小さい第2荷重で、前記第1ワイヤの前記ボール部を前記第1電極に押圧しながら、かつ、平面視において前記ボール部を互いに交差する2つの方向を含む複数の方向に動かす工程、
(d4)前記(d3)工程の後、前記第2荷重と同じ、または前記第2荷重よりも小さい第3荷重で前記第1ワイヤの前記ボール部を前記第1電極に押圧しながら、第1の周波数を有する第1超音波を前記ボール部に印加することで、平面視において第3方向に沿って前記ボール部を往復運動させる工程、
(d5)前記(d4)工程の後、前記第3荷重より大きく、かつ、前記第1荷重より小さい第4荷重で前記第1ワイヤの前記ボール部を前記第1電極に押圧しながら、前記第1の周波数を有する前記第1超音波を印加することで、平面視において前記第3方向に沿って前記ボール部を往復運動させ、これにより前記ボール部と前記第1電極とを接合する工程、
前記(d5)工程において前記第1超音波を印加する時間は、前記(d4)工程において前記第1超音波を印加する時間よりも長い。 - 請求項1において、
前記第3方向は、前記第1方向および前記第2方向とは異なる、半導体装置の製造方法。 - 請求項2において、
前記(d4)工程および前記(d5)工程のそれぞれでは、前記第3方向のみに沿って往復運動をさせながら、前記第1超音波を前記ボール部に印加する、半導体装置の製造方法。 - 請求項1において、
前記(d3)工程では、平面視において、前記2つの方向のそれぞれに沿って往復動作をさせる、半導体装置の製造方法。 - 請求項1において、
前記(d4)工程から前記(d5)工程の間は、前記第1の周波数を有する前記第1超音波が継続的に印加されている、半導体装置の製造方法。 - 請求項1において、
前記(d3)工程では、超音波を印加しない、半導体装置の製造方法。 - 請求項1において、
前記(d3)工程では、前記第1荷重より小さい前記第2荷重で、前記第1ワイヤの前記ボール部を前記第1電極に押圧しながら、かつ、平面視において前記ボール部を互いに異なる前記2つの方向を含む前記複数の方向に動かしながら、前記第1の周波数の1/4以下から成る第2の周波数を有する第2超音波を印加する、半導体装置の製造方法。 - 請求項1において、
前記(d3)工程で印加される前記第2荷重は、前記第4荷重と同じである、半導体装置の製造方法。 - 請求項1において、
前記(d3)工程で印加される前記第2荷重は、前記第3荷重と同じである、半導体装置の製造方法。 - 請求項1において、
前記第1電極は、前記第1接合面の反対側に位置する第1裏面を有し、
前記第1接合面および前記第1裏面のうち、一方から他方に向かう第4方向において、前記ボール部を接合する前の前記第1電極の厚さは、前記絶縁膜のうち、前記第1電極の一部分を覆う部分の厚さより薄い、半導体装置の製造方法。 - 請求項1において、
前記第1電極は、アルミニウムを主成分とする金属材料から成り、
前記第1ワイヤは、銅を主成分とする金属材料から成る、半導体装置の製造方法。 - 請求項1において、
前記第1電極は、前記第1接合面の反対側に位置する第1裏面を有し、
前記第1電極の前記第1裏面側には、前記第1電極の厚さより厚い第1絶縁層が形成されている、半導体装置の製造方法。 - 請求項1において、
前記(d3)工程では、前記第1電極の前記第1接合面に形成された金属酸化膜が除去される、半導体装置の製造方法。 - 請求項1において、
前記(d5)工程では、前記ボール部と前記第1電極との接合界面に、合金層が形成される、半導体装置の製造方法。 - 請求項1において、
前記(d2)工程では、前記ボール部が変形する、半導体装置の製造方法。
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