CN108109982A - 超薄包埋模模块及其制造方法 - Google Patents

超薄包埋模模块及其制造方法 Download PDF

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Publication number
CN108109982A
CN108109982A CN201810053234.0A CN201810053234A CN108109982A CN 108109982 A CN108109982 A CN 108109982A CN 201810053234 A CN201810053234 A CN 201810053234A CN 108109982 A CN108109982 A CN 108109982A
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China
Prior art keywords
flexible
lamination
chip
overlapping
center
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CN201810053234.0A
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P.A.麦康奈李
E.A.伯克
S.史密斯
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General Electric Co
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General Electric Co
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Publication of CN108109982A publication Critical patent/CN108109982A/zh
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Abstract

本公开涉及超薄包埋模模块及其制造方法。一种形成包埋模模块的方法包括提供初始柔性叠层和形成穿过该初始柔性叠层的模开口。借助于粘合剂材料将第一未切柔性叠层固连至初始柔性叠层的第一表面并且将模定位在初始柔性叠层的模开口内和粘合剂材料上。借助粘合剂材料将第二未切柔性叠层固连至初始柔性叠层的第二表面，并且使在第一未切柔性叠层与初始柔性叠层之间以及在第二未切柔性叠层与初始柔性叠层之间的粘合剂材料固化。在第一和第二未切柔性叠层中和其上形成多个通孔和金属互连部，其中金属互连部中的每一个都延伸穿过相应的通孔并被直接金属化至在初始柔性叠层上的金属互连部或模上的模垫。

Description

超薄包埋模模块及其制造方法
技术领域
本发明的实施例总体上涉及集成电路封装件，且更具体地涉及对芯片结合垫或电气构件连接垫直接使用低电阻金属互连部、从而允许更高的器件速度、更低的功耗和更小的尺寸的包埋模装配。包埋模模块可以制造成其中具有一个或多个模或电子构件。借助于被布线(routed)穿过多个柔性叠层的金属互连部来将多个模或电子构件与输入/输出系统电气连接。
背景技术
随着集成电路变得越来越小型并发挥更好的操作性能，用于集成电路(IC)封装的封装技术已相应地从引线封装演变为基于层叠的球栅阵列(BGA)封装、芯片尺寸封装(CSP)、然后是倒装芯片封装、以及目前的包埋模/嵌埋式芯片装配封装。IC芯片封装技术的进步通过日益增长的对实现更好的性能、更大的小型化和更高的可靠性的需求而被推动。新型封装技术必须进一步提供为了大规模制造的批量生产的可能性，从而允许规模经济。
IC芯片封装要求的提高对现有的包埋模装配工艺提出了挑战。也就是说，在许多当前的包埋模模块中希望具有数量增多的重分布层，其中8个或更多的重分布层较普遍。标准包埋模装配工艺，其中将一个或多个模最初安置在IC基底上且随后以逐层方式施加重分布层，会引起重新布线和互连系统中的翘曲，从而要求使用成型环氧树脂应力平衡层或金属加固件。
对现有的包埋模装配工艺的另一个挑战是制造/装配周期的时间。装配时间的一个主要因素是为了使包埋模模块中所包括的多个粘合剂层固化而执行的多个固化工序，诸如多个烘烤工序。
因此，需要一种用于包埋模制作的方法，该方法提供较短的制造周期时间并允许施加多个叠层，同时在不使用加固件的情况下最小化模块的翘曲。
发明内容
本发明的实施例通过提供一种包埋模模块装配工艺来克服前述缺点，在该工艺中，以提供完全平衡的模块构建的双面方式在模周围施加多个柔性叠层。执行单个固化工序以使模块中的多个粘合剂层固化，从而减少装配时间。
根据本发明的一方面，一种形成包埋模模块的方法包括提供初始柔性叠层并在初始柔性叠层中和其上形成多个通孔(via)和多个金属互连部，该多个金属互连部延伸穿过相应的通孔以便在初始柔性叠层的相对的第一表面和第二表面中的每一个上形成互连部，从而形成穿过初始柔性叠层的模开口。该方法还包括：借助于粘合剂材料将第一未切柔性叠层固连至初始柔性叠层的第一表面；将模定位在初始柔性叠层的模开口内和粘合剂材料上；借助于粘合剂材料将第二未切柔性叠层固连至初始柔性叠层的第二表面；使在第一未切柔性叠层与初始柔性叠层之间以及在第二未切柔性叠层与初始柔性叠层之间的粘合剂材料固化；以及在第一和第二未切柔性叠层中和其上形成多个通孔和多个金属互连部，多个金属互连部中的每一个都延伸穿过相应的通孔并被直接金属化(metalized)至初始柔性叠层上的金属互连部和模上的模垫中的一个。
根据本发明的另一方面，一种形成嵌埋式芯片封装件的方法包括：在中心叠层中形成多个通孔；形成延伸穿过多个通孔的多个金属互连部，以便在中心叠层的相对的第一表面和第二表面中的每一个上形成互连部；形成穿过中心叠层的芯片开口；借助于粘合剂材料向中心叠层的第一表面施加第一未切叠层；以及将芯片定位在中心叠层的芯片开口内和粘合剂材料上，该芯片具有与中心叠层的厚度相等的厚度。该方法还包括：借助于粘合剂材料向中心叠层的第二表面施加第二未切叠层；使在第一未切叠层与中心叠层之间以及在第二未切叠层与中心叠层之间的粘合剂材料固化；以及图案化(patterning)第一和第二未切叠层以形成多个通孔和多个金属互连部，使得多个金属互连部中的每一个都延伸穿过相应的通孔并被直接金属化至中心叠层上的金属互连部和芯片上的芯片垫中的一个。
根据本发明的又一方面，一种嵌埋式芯片封装件通过包括以下工序的工艺制造：预先图案化中心叠层以形成多个通孔和延伸穿过该多个通孔的多个金属互连部，其中多个金属互连部在中心叠层的相对的第一表面和第二表面中的每一个上形成互连部。该工艺还包括：形成穿过中心叠层的模开口；借助于粘合剂材料向中心叠层的第一表面施加第一未切叠层；将模定位在中心叠层的模开口内和粘合剂材料上，该模具有与中心叠层的厚度相等的厚度；借助于粘合剂材料向中心叠层的第二表面施加第二未切叠层；使在第一未切柔性叠层与基础柔性叠层之间以及在第二未切柔性叠层与基础柔性叠层之间的粘合剂材料一起同时固化；以及执行对第一和第二未切柔性叠层的双面图案化以形成多个通孔和多个金属互连部，其中，第一未切柔性叠层的多个通孔和多个金属互连部从第一方向形成且第二未切柔性叠层的多个通孔和多个金属互连部从与第一方向相反的第二方向形成。
根据以下结合附图提供的对本发明的优选实施例的详细描述，这些和其它优点和特征将变得更加容易理解。
附图说明
附图示出在此为实施本发明而构想的实施例。
在附图中：
图1是根据本发明的一实施例的多个包埋模模块的顶视图。
图2-10是根据本发明的一实施例的包埋模模块在制造和/或装配工艺的各个阶段期间的示意性剖视图。
图11是根据本发明的一实施例的联接到球栅阵列(BGA)封装件上的包埋模模块的示意性截面侧视图。
图12是根据本发明的一实施例的包埋模模块的堆叠布置结构的示意性截面侧视图。
图13是根据本发明的一实施例的包埋模模块的示意性截面侧视图。
具体实施方式
本发明提供一种形成包埋模模块(即嵌埋式芯片封装件)的方法。该包埋模模块利用柔性叠层以及相对于叠层安置芯片和电气构件而制造。包埋模模块中的模/(多个)电气构件借助于由形成在图案化叠层中的金属互连部提供的直接金属连接而连接到输入/输出(I/O)系统上。
本发明的实施例针对于包括嵌埋在多个图案化柔性叠层(即重分布层)内的一个或多个模(即芯片)的包埋模模块的装配。尽管以下在图1-12的实施例中将嵌埋在包埋模模块中的芯片具体描述为模或芯片，但应理解的是，在用于该模的包埋模模块中可代之以其它电气构件，且因此本发明的实施例并不仅限于芯片/模在包埋模模块中的包埋。亦即，模/芯片在下述包埋模模块实施例中的使用还应理解为涵盖可设置在该包埋模模块中的其它电气构件，例如电阻器、电容器、电感器或其它相似的器件。
参照图1，示出了根据本发明的一示例性实施例的多个制成的包埋模模块10或嵌埋式芯片封装件。每个包埋模模块10都包括与多个柔性叠层14(即重分布层)连接并嵌埋在其中的一个或多个芯片12(即模)。每个芯片12都由诸如硅或GaAs的半导体材料形成并以使得在其表面上形成集成电路(IC)布局的方式制备。多个叠层14中的每一个都采用可以相对于(多个)芯片12安置的预先形成的层叠板或膜的形式。叠层14可由Kapton®、Ultem®、聚四氟乙烯(PTFE)或另一种聚合物膜，例如液晶聚合物(LCP)或聚酰亚胺材料形成。如在图1中所示，各包埋模模块10通过在相邻的包埋模模块10之间的区域内切穿叠层14而形成，其中在框架16上执行包埋模模块装配工艺。
参照图2-10，阐述根据本发明的一实施例的用于制造多个包埋模模块10中的每一个的技术。为了易于使装配工艺形象化，在各图2-10中示出了单个包埋模模块装配工艺的截面。
根据本发明的一实施例，包埋模模块装配工艺通过未切初始或“中心”柔性叠层18的提供和图案化而开始。根据一个实施例，初始柔性叠层18采用Kapton®层叠柔性材料的形式，不过如上所述，也可采用其它合适的材料，例如Ultem®、聚四氟乙烯(PTFE)，或另一种聚合物膜，例如液晶聚合物(LCP)或聚酰亚胺材料。初始柔性叠层18具有约50微米的厚度以便适应超薄模在其中所形成的开口中的定位，如以下详细介绍的。
在图案化图2中的初始柔性叠层18时，形成穿过叠层的多个通孔20。根据一个示例性实施例，借助于激光消融或激光钻削工艺来形成通孔20。备选地，还认识到可借助于其它方法来形成通孔20，包括：等离子蚀刻、光勾勒或机械钻削工艺。在形成通孔20后，然后借助于例如溅镀、电镀和/或无电涂敷工艺将金属层/材料(例如种金属和/或铜)施加到柔性叠层18上，且然后形成为金属互连部22。根据本发明一个实施例，金属层/材料被图案化和蚀刻成使得形成金属互连部22，其延伸穿过通孔20并在初始柔性叠层18的第一表面24和初始柔性叠层18的第二表面26中的每一个上形成互连部22。根据另一实施例，认识到初始柔性叠层18可作为具有多个通孔20和已经形成在其上/其中的多个金属互连部22的“预图案化”层提供。
在包埋模模块装配工艺的下一个工序中，且如图3中所示，模开口28形成在初始柔性叠层18中。模开口28的尺寸和形状与待安置在其中的模(即图6中的模30)的尺寸和形状基本匹配，其中将开口28稍微加大尺寸以适应将模接纳在其中。如在图3中所示，初始柔性叠层18的最终形状是“窗框”结构的形状。根据本发明的实施例，开口28可通过激光切削和模冲压操作中的一种形成。
现参照图4-5，包埋模模块装配工艺通过提供未切柔性叠层32而继续，该未切柔性叠层32在待与初始柔性叠层18接合的一面具有涂覆或施加于其上的粘合剂材料/层34。未切柔性叠层32是坯料或未图案化的柔性叠层。未切柔性叠层32定位在(即层叠在)初始柔性叠层18的第一表面24上并借助于粘合剂34固连于其上，如图5中所示，其中未切柔性层32覆盖形成在初始柔性叠层18中的模开口28的一面。根据一个实施例，未切柔性叠层32借助于真空层叠施加至初始柔性叠层18，其中在防止粘合剂材料34固化的温度下执行真空层叠。
在将未切柔性叠层32安置到初始柔性叠层18上后，模30定位在形成在初始柔性叠层18中的模开口28内，如图6中所示。借助于施加至未切柔性叠层32的粘合剂层材料34将模30固连在开口28内。根据本发明的示例性实施例，且如图6中所示，模30采用具有与初始柔性叠层18的厚度相等或匹配的厚度的“超薄模”的形式。因此，例如，初始柔性叠层18和模30中的每一个都可以构造成具有约50微米的匹配厚度。
如在图6中所示，在将模30安置到开口28中后，开口/空隙渠状区域36保持存在于模30与初始柔性叠层18之间。为了将未切柔性叠层32固连至初始柔性叠层18而执行的真空层叠工序还用于(至少部分地)消除渠状区域36内存在的空隙。亦即，在执行真空层叠时，将粘合剂材料34吸入渠状区域36内以至少部分地消除/充填渠状区域。
包埋模模块装配工艺通过提供另一未切柔性叠层38而继续，该未切柔性叠层38被施加到初始柔性叠层18的第二表面26和模30仍露出的表面上，如在图7中所示。未切柔性叠层38是坯料或未图案化的层叠柔性材料并定位在(即层叠到)初始柔性叠层18上并借助于粘合剂材料/层34固连于其上。在将未切柔性叠层38安置到初始柔性叠层18上时，执行真空层叠(即真空烘烤)工序以将未切柔性叠层38固连至初始柔性叠层18。该真空层叠还用于通过将粘合剂材料34吸入渠状区域36内以至少部分地消除其中的空隙并充填渠状区域来(至少部分地)消除/充填在模30与初始柔性叠层18之间的渠状区域36中存在的空隙。如上所述，在防止粘合剂材料34固化的温度下执行该真空层叠。
在将模30安置在初始柔性叠层18中的开口28内并且将未切柔性叠层38、38层叠至初始柔性叠层18和模30后，执行粘合剂层34的固化。根据一个实施例，借助于压力烘烤操作来完成固化，不过应认识到可采用其它合适的固化工艺。有利地，根据本发明的实施例，仅执行单个烘烤/固化工序以固化两个粘合剂层34，因此减少与包埋模模块的装配相关的处理时间和成本。
现参照图8，在该装配技术的下一个工序中，图案化未切柔性叠层32、38以形成多个通孔20，其中这些通孔是穿过柔性叠层32、38钻削的。通孔20形成在对应于形成在初始重分布层18上的金属互连部22的位置，以便露出金属互连部22。另外的通孔20被向下钻削至模30上的垫40，以便露出这些垫。根据示例性实施例，借助于激光消融或激光钻削工艺来形成通孔20。备选地，还设想可借助于其它方法来形成通孔20，包括：等离子蚀刻、光勾勒或机械钻削工艺。然后借助于例如溅镀或电镀工艺将金属层/材料(例如种金属和/或铜)施加到未切柔性叠层32、38上，且然后形成为金属互连部22。金属层/材料被图案化和蚀刻成使得形成从柔性叠层32、38的面朝外的表面42并向下穿过通孔20延伸的金属互连部22。柔性叠层32、38上的金属互连部22因此与在初始柔性叠层18上的互连部22形成电气连接并与模垫40形成直接金属和电气连接。
如图8中所示，对施加至初始柔性叠层18的第一表面24的未切柔性叠层32从第一方向44形成(即钻削、激光消融)通孔20。亦即，自顶至下形成未切柔性叠层32中的通孔20。相反地，对施加至初始柔性叠层18的第二表面26的未切柔性叠层38从与第一方向44相反的第二方向46钻削通孔20。亦即，从底至上钻削未切柔性叠层38中的通孔20。
现参照图9，在该制造技术的下一个工序中，将另外的未切柔性叠层48、50层叠到未切柔性叠层32、38上并随后进行图案化。另外的柔性叠层48、50采用借助于粘合剂材料51施加至包埋模模块的相对表面的未切柔性叠层的形式，以便形成具有相等数量的从初始柔性叠层18伸出的柔性叠层的平衡包埋模模块。亦即，初始柔性叠层18形成“中央”柔性叠层，并且另外的柔性叠层48、50施加在初始柔性叠层18的相对侧(即，在初始柔性叠层18的第一表面24和第二表面26两者上)。这种双面层叠工艺用于减小分配给初始柔性叠层18的应力并防止其翘曲。
如图9中所示，多个通孔20形成在另外的柔性叠层48、50中的每一个上。金属互连部22也形成/图案化为向下延伸穿过通孔20并穿过另外的柔性叠层48、50，以便使另外的柔性叠层48、50中的每一个与相邻的未切柔性叠层32、38电气连接。与柔性叠层32、38的图案化相似，根据双面图案化工艺来执行另外的柔性叠层48、50的图案化。亦即，从第一方向44(即从顶至下)钻削/激光消融形成在柔性叠层48中的通孔20，而从第二方向46(即从底至上)钻削/激光消融形成在柔性叠层50中的通孔20。
根据本发明的实施例，认识到可以在包埋模模块的进一步装配期间施加在层48、50之外的又一些柔性叠层，其中所施加的另一些柔性叠层的数量取决于该包埋模模块的设计考虑。
现参照图10，在施加所有另外的柔性叠层48、50之后，将焊接掩模层52施加至在包埋模模块的相对表面上的最外部柔性叠层48、50。焊接掩模52提供单独的封装件/模块至包埋模模块的连接。例如，根据一个实施例，且如图11中所示，将球栅阵列(BGA)封装件54装配至或堆叠在包埋模模块10上。根据另一实例，且如在图12中所示，将单独的包埋模模块56堆叠在包埋模模块10上。根据一个实施例，借助于球栅阵列58将堆叠的包埋模模块10、56联接在一起，不过认识到也可使用例如面积格栅阵列或传导环氧树脂来将模块联接在一起。虽然图12示出了两个包埋模模块10以竖直布置堆叠，但认识到可以将更大数量的包埋模模块上下堆叠。
现参照图13，根据本发明的另一实施例，示出了包括布置/施加在共同的水平面中的第一模62和第二模64的包埋模模块60。根据图13的实施例，第一模62和第二模64中的每一个都具有与初始柔性叠层66的厚度匹配的厚度。第一模62和第二模64中的每一个都被安置在形成在初始柔性叠层66中的单独的模开口68、70内，以便布置在同一个水平面中。多个通孔20和向下延伸穿过通孔20的多个金属互连部22被图案化在相邻的未切柔性叠层72、74中，使得金属互连部延伸到第一模62和第二膜64中的每一个上的垫76上。亦即，金属互连部22向下延伸到垫76以形成到第一模62和第二模64的模垫76的直接金属和电气连接。同一平面(即柔性叠层66)上的第一模62和第二模64的并排嵌埋允许在包埋膜模块60中的柔性叠层的数量的减少，从而有助于减小包埋模模块60的总厚度并减少相关的生产成本。
有益地，本发明的实施例因此提供了一种包埋模模块装配工艺，其具有更短的制造周期时间并允许施加多个叠层，同时在不使用加固件的情况下最大限度地减少模块的翘曲。该装配工艺将多个粘合剂层的固化(经由多个固化工序)合并为单个固化工序，以便减少与之相关的处理时间和成本，并采用真空层叠工序来完全去除模周围的所有空隙，其中模周围的渠状区域被完全充填。另外，该装配工艺提供了基于双面层叠并经由其中所包括的成型工艺以及基于在包埋模的双面上使用等同的粘合剂而完全平衡的模块。从装配工艺得到的最终包埋模模块非常薄并与另外的包埋模模块兼容，以便可供形成堆叠模模块。基于本发明的包埋模模块装配技术，因此可构建与其它现有的包埋模模块装配技术相比具有减小的厚度、受控的平坦度、提高的设计密度、增加的分辨率和改善的电气性能的包埋模模块。
因此，根据本发明的一个实施例，一种形成包埋模模块的方法包括提供初始柔性叠层并在初始柔性叠层中和其上形成多个通孔和多个金属互连部，该多个金属互连部延伸穿过相应的通孔以便在初始柔性叠层的相对的第一表面和第二表面中的每一个上形成互连部，形成穿过初始柔性叠层的模开口。该方法还包括：借助于粘合剂材料将第一未切柔性叠层固连至初始柔性叠层的第一表面；将模定位在初始柔性叠层的模开口内和粘合剂材料上；借助于粘合剂材料将第二未切柔性叠层固连至初始柔性叠层的第二表面；使在第一未切柔性叠层与初始柔性叠层之间以及在第二未切柔性叠层与初始柔性叠层之间的粘合剂材料固化；以及在第一和第二未切柔性叠层中和其上形成多个通孔和多个金属互连部，多个金属互连部中的每一个都延伸穿过相应的通孔并被直接金属化至在初始柔性叠层上的金属互连部和在模上的模垫中的一个上。
根据本发明的另一实施例，一种形成嵌埋式芯片封装件的方法包括：在中心叠层中形成多个通孔；形成多个金属互连部，其延伸穿过多个通孔以便在中心叠层的相对的第一表面和第二表面中的每一个上形成互连部；形成穿过中心叠层的芯片开口；借助于粘合剂材料向中心叠层的第一表面施加第一未切叠层；以及将芯片定位在中心叠层的芯片开口内和粘合剂材料上，该芯片具有与中心叠层的厚度相等的厚度。该方法还包括：借助于粘合剂材料向中心叠层的第二表面施加第二未切叠层；使在第一未切叠层与中心叠层之间以及在第二未切叠层与中心叠层之间的粘合剂材料固化；以及图案化第一和第二未切叠层以形成多个通孔和多个金属互连部，使得多个金属互连部中的每一个都延伸穿过相应的通孔并被直接金属化至在中心叠层上的金属互连部和芯片上的芯片垫中的一个。
根据本发明的又一实施例，一种嵌埋式芯片封装件通过包括以下工序的工艺制造：预先图案化中心叠层以形成多个通孔和延伸穿过该多个通孔的多个金属互连部，其中多个金属互连部在中心叠层的相对的第一表面和第二表面中的每一个上形成互连部。该工艺还包括：形成穿过中心叠层的模开口；借助于粘合剂材料向中心叠层的第一表面施加第一未切叠层；将模定位在中心叠层的模开口内和粘合剂材料上，该模具有与中心叠层的厚度相等的厚度；借助于粘合剂材料向中心叠层的第二表面施加第二未切叠层；使在第一未切柔性叠层与基础柔性叠层之间以及在第二未切柔性叠层与基础柔性叠层之间的粘合剂材料一起同时固化；以及执行对第一和第二未切柔性叠层的双面图案化以形成多个通孔和多个金属互连部，其中第一未切柔性叠层的多个通孔和多个金属互连部从第一方向形成且第二未切柔性叠层的多个通孔和多个金属互连部从与第一方向相反的第二方向形成。
虽然已结合仅有限数量的实施例详细地描述了本发明，但应当容易理解的是，本发明并不局限于这些公开的实施例。相反，可对本发明进行修改以合并此前未描述但与本发明的精神和范围相称的任何数量的变型、改型、替换或等同布置。此外，虽然已经描述了本发明的各种实施例，但应理解，本发明的方面可仅包括所述实施例中的一些。因此，本发明不应被视为受限于前面的描述，而仅通过所附权利要求的范围来限制。

Claims (10)

1.一种包埋模模块，其包括：
中心柔性叠层，其具有多个通孔和延伸穿过所述多个通孔的多个金属互连部，以便在所述中心柔性叠层的相对的第一表面和第二表面中的每一个上形成互连部，所述中心柔性叠层具有形成在其中的芯片开口；
芯片，其定位在所述中心柔性叠层的芯片开口中，所述芯片具有形成在其上的多个芯片垫；
多个另外的柔性叠层，其以堆叠布置定位在所述中心柔性叠层的第一表面和第二表面中的每一个上，其中，每个所述另外的柔性叠层包括多个通孔和延伸穿过所述多个通孔的多个金属互连部，以将相应的另外的柔性叠层电连接至相邻的柔性叠层或者至所述芯片。
2.根据权利要求1所述的包埋模模块，其特征在于，相等数量的另外的柔性叠层定位在所述中心柔性叠层的第一表面和第二表面中的每一个上，以便从所述中心柔性叠层向外延伸。
3.根据权利要求1所述的包埋模模块，其特征在于，所述多个另外的柔性叠层中的每一个包括未切柔性叠层。
4.根据权利要求1所述的包埋模模块，其特征在于，还包括粘合剂，其定位在每对相邻的柔性叠层之间以将相应的柔性叠层固定在一起。
5.根据权利要求1所述的包埋模模块，其特征在于，定位在所述中心柔性叠层的第一表面上的所述另外的柔性叠层包括从第一方向形成的通孔和和金属互连部，并且定位在所述中心柔性叠层的第二表面上的所述另外的柔性叠层包括从与所述第一方向相反的第二方向形成的通孔和和金属互连部。
6.根据权利要求1所述的包埋模模块，其特征在于，在所述中心柔性叠层中的芯片开口具有比所述芯片的面积更大的面积，使得当所述芯片定位在所述开口内时在所述芯片周围存在渠状区域。
7.根据权利要求6所述的包埋模模块，其特征在于，还包括粘合剂材料，其定位所述渠状区域中以便完全充填所述渠状区域，使得在所述芯片周围不存在空隙。
8.根据权利要求1所述的包埋模模块，其特征在于，所述芯片具有与所述中心柔性叠层的厚度相等的厚度。
9.一种包埋模模块，其包括：
中心柔性叠层，其具有多个通孔和延伸穿过所述多个通孔的多个金属互连部，以便在所述中心柔性叠层的相对的第一表面和第二表面中的每一个上形成互连部，所述中心柔性叠层具有形成在其中的芯片开口；
芯片，其定位在所述中心柔性叠层的芯片开口中，所述芯片具有形成在其上的多个芯片垫；
第一多个柔性叠层，其附连至所述中心柔性叠层的第一表面，其中所述第一多个柔性叠层中的每个柔性叠层包括多个通孔和多个金属互连部，其构造成将相应的柔性叠层电连接至相邻的柔性叠层；以及
第二多个柔性叠层，其附连至所述中心柔性叠层的第二表面，其中所述第二多个柔性叠层中的每个柔性叠层包括多个通孔和多个金属互连部，其构造成将相应的柔性叠层电连接至相邻的柔性叠层。
10.一种包埋模模块，其包括：
中心柔性叠层，其具有多个通孔和延伸穿过所述多个通孔的多个金属互连部，以便在所述中心柔性叠层的相对的第一表面和第二表面中的每一个上形成互连部，所述中心柔性叠层具有形成在其中的芯片开口；
芯片，其定位在所述中心柔性叠层的芯片开口中，所述芯片具有形成在其上的多个芯片垫；
多个另外的柔性叠层，其以堆叠布置定位在所述中心柔性叠层的第一表面和第二表面上，其中，每个所述另外的柔性叠层具有多个通孔和延伸穿过所述多个通孔的多个金属互连部，以将相应的另外的柔性叠层电连接至相邻的柔性叠层或者至所述芯片。
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