CN107430983B - 半导体器件及其封装方法 - Google Patents

半导体器件及其封装方法 Download PDF

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CN107430983B
CN107430983B CN201680017633.0A CN201680017633A CN107430983B CN 107430983 B CN107430983 B CN 107430983B CN 201680017633 A CN201680017633 A CN 201680017633A CN 107430983 B CN107430983 B CN 107430983B
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semiconductor wafer
lead frame
paste layer
chip
paste
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CN107430983A (zh
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赖玉清
帕哈特·普豪哈鲁汗
冯银利
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Cypress Semiconductor Corp
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Cypress Semiconductor Corp
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Abstract

根据多种实施例，提供了用于封装半导体器件的系统和方法。本公开讨论了设置在引线框架上的具有顶侧和底侧的半导体晶片。然后施加粘合剂糊剂以将半导体晶片附接到引线框架，使得粘合剂糊剂将晶片固定到引线框架的一部分。粘合剂糊剂可直接施加在晶片和引线框架之间，或者可与框架带结合来施加。

Description

半导体器件及其封装方法
技术领域
本申请涉及用于封装半导体器件的系统和方法。
背景
优先权
本申请是于2015年12月16日提交的美国申请号为14/970,872的国际申请，该国际申请要求于2015年8月13日提交的美国临时申请号为 62/204,857的优先权和利益，所有申请通过引用并入本文。
背景
在半导体封装领域，晶片附接薄膜(die attach film)(DAF)有时用于将完成的半导体晶片附接到基板或引线框架。虽然DAF易于使用和施加，但它们可能具有某些缺陷。例如，DAF无法经受高的导线结合温度，并且还容易受到DAF和引线框架界面层之间的分层异常的影响，这可能会引起最终产品和/或额外生产成本方面的问题。另外，DAF本身是昂贵的，并且它们的使用增加了半导体生产的成本。因此，需要不存在相同的生产质量和异常或成本问题的改进。
发明内容
本申请提供了以下内容：
1)一种半导体封装，包括：
半导体晶片，所述半导体晶片具有顶侧和底侧；
引线框架，所述引线框架被设置在所述半导体晶片下方；
糊剂层，所述糊剂层被设置在所述半导体晶片的所述底侧的一部分上，使得所述糊剂层将所述半导体晶片固定到所述引线框架的一部分；以及
封闭料，所述封闭料包围所述半导体晶片、所述引线框架和所述糊剂层。
2)如1)所述的半导体封装，其中，所述糊剂层是不连续的，使得所述糊剂层留下所述半导体晶片的未被所述糊剂层覆盖的部分。
3)如1)所述的半导体封装，还包括：
晶片附接底座，所述晶片附接底座包括被设置在所述半导体晶片和所述引线框架之间的带层。
4)如3)所述的半导体封装，其中，所述带层包括被设置在所述半导体晶片和所述引线框架之间的多个带条。
5)如3)所述的半导体封装，其中，所述糊剂层被设置在所述半导体晶片和所述带层之间。
6)如5)所述的半导体封装，其中，所述糊剂层仅被设置在所述带层的一部分上。
7)如1)所述的半导体封装，其中，所述糊剂层包括非导电糊剂。
8)如1)所述的半导体封装，还包括被设置在所述半导体晶片和所述引线框架之间的垫。
9)如8)所述的半导体封装，其中，所述糊剂层的至少一部分被设置在所述半导体晶片和所述垫之间。
10)如1)所述的半导体封装，其中，所述糊剂层被配置为经受导线结合温度而不分层。
11)一种封装半导体器件的方法，包括：
提供具有顶侧和底侧的半导体晶片；
提供被设置在所述半导体晶片下方的引线框架；
将糊剂层施加到所述半导体晶片的所述底侧的一部分；
使用所述糊剂层将所述半导体晶片定位在所述引线框架上；以及
使所述糊剂层凝固，以将所述半导体晶片结合到所述引线框架。
12)如11)所述的方法，其中，施加所述糊剂层包括将所述糊剂层设置成使得所述糊剂层是不连续的并留下所述半导体晶片的未被所述糊剂层覆盖的部分。
13)如11)所述的方法，还包括：
通过在所述半导体晶片和所述引线框架之间设置带层来形成晶片附接底座。
14)如13)所述的方法，其中，所述带层包括被设置在所述半导体晶片和所述引线框架之间的多个带条。
15)如13)所述的方法，其中，所述糊剂层被设置在所述半导体晶片和所述带层之间。
16)如15)所述的方法，其中，所述糊剂层仅被设置在所述带层的一部分上。
17)如11)所述的方法，其中，所述糊剂层包括非导电糊剂。
18)如11)所述的方法，还包括：
将垫设置在所述半导体晶片和所述引线框架之间。
19)如18)所述的方法，其中，所述糊剂层的至少一部分被设置在所述半导体晶片和所述垫之间。
20)如11)所述的方法，其中，所述糊剂层被配置为经受导线结合温度而不分层。
附图简述
附图并入本文，并构成本公开的说明书的一部分。
图1是根据本公开的多种实施例的半导体封装的示例性布局。
图2是根据本公开的多种实施例的半导体封装的示例性横截面视图。
图3是根据本公开的多种实施例的半导体封装的示例性布局。
图4是根据本公开的多种实施例的半导体封装的示例性横截面视图。
图5是根据本公开的多种实施例的半导体封装的示例性布局。
图6是说明生产根据本公开的多种实施例的半导体封装的方法的流程图。
在附图中，类似的参考数字一般表示相同的或类似的元素。另外，通常情况下，参考数字的最左边的数字表示参考数字首先出现所在的附图。
详细描述
本文提供了用于使用粘合剂糊剂将半导体晶片结合到引线框架来生产半导体封装的系统、方法和/或它们的组合和子组合。
图1是描绘了根据本公开的多种实施例的半导体封装100的示意图。半导体封装100包括半导体晶片102，半导体晶片102借助于晶片附接薄膜(DAF)106和框架带(frametape)108附接到引线框架104。引线框架104可用于将封装引线110连接到半导体晶片102的适当导体。根据多种实施例，DAF 106可在例如上游晶圆级层压工艺期间被预先施加。图1描绘了比晶片102小的DAF 106。这有助于解释附图。在实践中，DAF 106 可覆盖整个晶片102；DAF 106的边缘可与晶片102共同延伸。虽然图1 被描绘为总共具有48个引脚110，但应理解，这仅仅是出于解释的目的，并且可使用任意数量或图案或形状的引脚，并且仍落在本公开的范围和精神内。
图1中示出的DAF 106可由粘合剂层组成，该粘合剂层在预层压工艺期间被设置到晶圆底部(即，背侧)上。根据一些实施例，预层压工艺可在晶圆切割工艺之前发生。DAF可包括设置在诸如聚乙烯薄膜、聚烯烃薄膜或聚对苯二甲酸乙二醇酯(PET)薄膜的薄膜上的树脂粘合剂。在图1 中，DAF用于将晶片102附接到引线框架104的垫(pad)。通过这种方式，DAF 106可用于形成引线上芯片(COL)封装100。
图2是半导体封装200的多个方面的横截面视图。例如，图2可描绘根据多种实施例的沿着带108的长度段之一的轴线的图1的半导体封装 100的横截面视图。如图2中所示，半导体封装200包括晶片202和引线框架208。晶片202可以是包含多个逻辑门和/或模拟半导体器件的半导体晶片。
如图2中所示，晶片202借助于DAF 204附接到引线框架208，该 DAF204附接到晶片202的底侧和带层(tape layer)206。根据多种实施例，带层206可类似于以上参照图1所描述的框架带108。DAF 204可包括树脂粘合剂并被设置在诸如聚乙烯薄膜、聚烯烃薄膜或聚对苯二甲酸乙二醇酯(PET)薄膜的薄膜上。
虽然在某些方面有效，但在半导体封装工艺期间使用诸如DAF 204的晶片附接薄膜可能是有问题的。例如，在一些制造工艺中，可能需要使用高温导线结合温度。然而，许多DAF具有小于所需的导线结合温度的最大温度。另外，即使在不使用高温方法的情况下，DAF也可能在制造工艺期间遭受分层(delamination)。在制造工艺期间发生脱气(outgassing)时，会发生分层，引起例如DAF 204和带206之间的分离。这对于晶片202和引线框架208之间的结合部的完整性是有问题的。另外，在晶圆切割期间可能会出现问题。在晶圆切割期间，是脆且硬的材料(诸如硅)的层压晶片(例如，晶片202)的层和柔软弹性的DAF层这两者必须被切割穿过。这可能会导致DAF(例如，DAF 204)有毛刺。DAF毛刺是在切割的晶片边缘的底部和侧面处的DAF粘合剂的残留物或须状物。这些粘合剂DAF 毛刺导致各种工艺和多个质量的问题和挑战。例如，毛刺可能使相邻的晶片“粘结”在一起，这可能导致在生产工艺期间相邻的晶片连同目标晶片被一起拾取。当处理在切割的晶圆中的晶片的行和列之间具有小(例如， 60μm以及更小)的窄切割道的非常小(例如，小于2mm)的晶片时，这个问题可能是特别普遍的。这个问题也可能导致晶片裂缝、破碎晶片或崩边晶片——特别是对于薄且大(例如，大于8mm)的晶片。所有这些问题导致生产成本增加。更好的方法是用不具有DAF 204材料所具有的相同缺点的材料来代替DAF 204。
图3是描绘了根据本公开的多种实施例的半导体封装300的示意图。半导体封装300包括半导体晶片302，半导体晶片302借助于粘合剂糊剂 306和框架带308附接到引线框架304。根据多种实施例，引线框架304 可包括用于晶片302或者诸如双扁平无引线(DFN)封装或四方扁平无引线(QFN)封装的无引线封装的任何合适的引线框架。
在一些实施例中，用于连接晶片302与带308的粘合剂糊剂306的量被控制，使得其提供对框架带308的最大覆盖范围，而不会溢出框架带308 的边缘。在其它实施例中，所使用的粘合剂糊剂306的量被简单地确定成使得其不会溢出框架带308。在一些实施例中，框架带308也可用于创建用于将晶片302结合到引线框架304的晶片附接底座。
虽然图3描绘了具有三个长度段的框架带308的封装300，这仅仅是为了说明可使用多个长度段或形状的框架带308。根据其他实施例，可使用更多或更少的长度段或形状的框架带308。例如，在一些实施例中，仅采用了单个长度段和形状的框架带308。这将参照图5在以下更详细地进行讨论。
引线框架304可用于将封装引线310连接到半导体晶片302的适当导体。虽然图3描绘了总共48个引脚310，但应理解，这仅仅是出于解释的目的，并且可使用任意数量或图案或形状的引脚，并且仍落在本公开的范围和精神内。
图3中所示的粘合剂糊剂306可包括任何适当的粘合剂糊剂或液体粘合剂材料。例如，根据一些实施例，粘合剂糊剂306根据具体应用包括电绝缘或者导电或导热的糊剂粘合剂。例如，如果需要电绝缘粘合剂306，则可使用完全基于聚合物的粘合剂糊剂。类似地，当需要导热或导电的粘合剂糊剂306时，可使用导热或导电的粘合剂糊剂。在图3中，粘合剂糊剂306用于将晶片302附接到引线框架304的垫。通过这种方式，粘合剂糊剂可用于形成引线上芯片(COL)封装300。
图4是半导体封装400的多个方面的横截面视图。例如，图4可以以沿着带308的长度的横截面描绘图3的半导体封装300。如图4中所示，半导体封装400包括晶片402和引线框架408。晶片402可以是包含多个逻辑门和/或模拟半导体器件的半导体晶片。引线框架408可包括诸如引线框架垫等的任何合适的半导体封装基板。
如图4中所示，晶片402借助于粘合剂糊剂404附接到引线框架408，该粘合剂糊剂附接到晶片402的一侧和带层406。根据多种实施例，带层 406可类似于以上参照图3所描述的框架带308。粘合剂糊剂404可包括树脂粘合剂并被设置在诸如聚乙烯薄膜、聚烯烃薄膜或聚对苯二甲酸乙二醇酯(PET)薄膜的薄膜上。可施加封闭料(encapsulation)或密封料410，以对包括晶片402、糊剂层404、带406和引线框架408的半导体封装进行密封。
虽然图3描述了具有三个长度段的框架带308的封装300，这仅仅是为了说明可使用多个长度段的框架带308。根据其他实施例，可使用更多或更少的长度段或形状的框架带308。实际上，完全不同的引线框架的形状和尺寸可与所公开的主题结合使用。图5描绘了一个这样的可替代方案。
图5是描绘了根据本公开的多种实施例的半导体封装500的示意图。半导体封装500包括半导体晶片502，半导体晶片502借助于粘合剂糊剂 506和框架带508附接到引线框架504。在一些实施例中，用于连接晶片 502与带508的粘合剂糊剂506的量被控制，使得粘合剂糊剂506提供对框架带508的最大覆盖范围，而不会溢出框架带508的边缘。在其它实施例中，所使用的粘合剂糊剂506的量被简单地确定成使得其不会溢出框架带308。
与图3相比，图5描绘了仅具有单个长度段的框架带508的封装500。引线框架504可用于将封装引线510连接到半导体晶片502的适当导体。虽然图5描绘了总共48个引脚510，但应理解，这仅仅是出于解释的目的，并且可使用任意数量或任意图案或任意形状的引脚，并且仍落在本公开的范围和精神内。
图5中所示的粘合剂糊剂506可包括任何适当的粘合剂糊剂材料。例如，根据一些实施例，粘合剂糊剂506根据具体应用包括电绝缘或者导电或导热的糊剂粘合剂。例如，如果需要电绝缘粘合剂506，则可使用完全基于聚合物的粘合剂糊剂。类似地，当需要导热或导电的粘合剂糊剂506 时，可使用导热或导电的粘合剂糊剂。在图5中，粘合剂糊剂506用于将晶片502附接到引线框架504的垫。通过这种方式，粘合剂糊剂可用于形成COL封装500。
图6是描绘根据本公开的多种实施例的封装晶片(例如，晶片302) 的方法600的流程图。为了辅助解释，还将参照图3对方法600进行描述，但应理解，方法600不限于图3中所描绘的具体实施例。根据方法600，在阶段602，晶片302被适当地定位，以使粘合剂糊剂306能够被施加到晶片302。
在阶段604，确定待被施加到晶片302的粘合剂糊剂306的适当的量。根据一些实施例，根据各种因素改变粘合剂糊剂306的量可能是期望的。例如，粘合剂糊剂306的种类(例如，基于聚合物的或填充银的粘合剂糊剂)可能影响需要施加到晶片302的粘合剂糊剂306的量和图案(形状)。类似地，晶片302的特定几何形状也可能影响所需的粘合剂糊剂306的量。在一些实施例中，待被施加到晶片302的粘合剂糊剂306的量可被确定为将提供最大覆盖范围而不溢出(例如，不溢出框架带308的边缘)的量。
在阶段606，将所确定的量的粘合剂糊剂306施加到晶片302。根据一些实施例，粘合剂糊剂306可施加在晶片302上的多个位置处。例如，粘合剂糊剂306可施加在晶片302上的待设置框架带308的位置处。在这样的实施例中，粘合剂糊剂306可以被施加成使得其不会溢出带308的边缘。在一些实施例中，仅将粘合剂糊剂306施加在单个位置中也是可能的。
在阶段608，使用粘合剂糊剂306将晶片302附加到引线框架304。例如，晶片302可附接到引线框架垫。在一些实施例中，将晶片302附接到引线框架304可包括将框架带308设置在粘合剂糊剂306和引线框架304 之间。在阶段610，根据所采用的粘合剂糊剂的特定种类的要求，将粘合剂糊剂306适当地固化(例如，通过将特定波长的光施加到粘合剂糊剂)。在阶段612，可根据合适的方法完成封装晶片302的工艺。
应当理解详细描述部分而不是概述和摘要部分(如果有的话)，旨在用来解释权利要求。概述和摘要部分(如果有的话)可以提出发明人考虑的本发明的一个或更多个但不是全部的实施例，因此，并不旨在以任何方式限制本发明或所附的权利要求。
虽然在这里对于示例领域和应用已经参考实施例描述了本发明，但是应当理解本发明并不限于此。其他实施例及对其进行的变型是可能的，并在本发明的范围和精神内。例如，在不限制此段的一般性的情况下，实施例不限于图中示出和/或本文中描述的软件、硬件、固件，和/或实体。此外，实施例(无论在本文中是否被明确描述)对超过本文中描述的示例的领域和应用具有重要的实用性。
本文中已经借助于示出实现其具体功能及其关系的功能构建模块描述了实施例。为了便于描述，已经在这里随意地定义了这些功能构建模块的边界。只要适当地执行具体功能和关系(或其等价物)，就可以定义可选择的边界。并且，可选择实施例可以使用与本文中描述的那些不同的顺序来执行功能块、步骤、操作、方法等。
本文中对“一个实施例”、“实施例”、“示例性实施例”等的引用指示所描述的实施例可包括特定的特征、结构或特性，但是每个实施例可不必包括该特定的特征、结构或特性。而且，这样的词组并不必然地指相同的实施例。此外，当特定的特征、结构、或特性结合实施例进行描述时，不管本文中是否明确提到或描述，在相关领域的技术人员的知识范围内都应将这样的特征、结构或特性纳入到其他实施例中。
本发明的宽度和范围不应当由任何上述实施例限制，而是仅仅根据以下权利要求及其等价物来定义。

Claims (8)

1.一种封装半导体器件的方法，包括：
提供具有顶侧和底侧的半导体晶片；
提供被设置在所述半导体晶片下方的引线框架；
在所述半导体晶片和所述引线框架之间设置带层，其中，所述带层包括多个不连续带条；
将非导电的糊剂层施加到所述半导体晶片的所述底侧的一部分，其中，所述糊剂层被施加成使得所述糊剂层覆盖所述带层的一部分，而不会从所述带层溢出；
使用所述糊剂层将所述半导体晶片定位在所述引线框架上；以及
使所述糊剂层固化，以将所述半导体晶片结合到所述引线框架。
2.如权利要求1所述的方法，其中，施加所述糊剂层包括将所述糊剂层设置成使得所述糊剂层是不连续的并留下所述半导体晶片的未被所述糊剂层覆盖的部分。
3.如权利要求1所述的方法，还包括：
使用设置在所述半导体晶片和所述引线框架之间的所述带层来形成晶片附接底座。
4.如权利要求3所述的方法，其中，所述糊剂层被设置在所述半导体晶片和所述带层之间。
5.如权利要求4所述的方法，其中，所述糊剂层留下所述带层的至少一部分未被覆盖。
6.如权利要求1所述的方法，还包括：
将垫设置在所述半导体晶片和所述引线框架之间。
7.如权利要求6所述的方法，其中，所述糊剂层的至少一部分被设置在所述半导体晶片和所述垫之间。
8.如权利要求1所述的方法，其中，所述糊剂层被配置为经受导线结合温度而不分层。
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