TWI280653B - Package - Google Patents

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Publication number
TWI280653B
TWI280653B TW93137095A TW93137095A TWI280653B TW I280653 B TWI280653 B TW I280653B TW 93137095 A TW93137095 A TW 93137095A TW 93137095 A TW93137095 A TW 93137095A TW I280653 B TWI280653 B TW I280653B
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TW
Taiwan
Prior art keywords
opening
package
extension
closed
wafer
Prior art date
Application number
TW93137095A
Other languages
Chinese (zh)
Other versions
TW200620608A (en
Inventor
Jui-Chung Lee
Ji-Gang Lee
Jing-Ming Chiu
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Macronix Int Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Publication date
Application filed by Macronix Int Co Ltd filed Critical Macronix Int Co Ltd
Priority to TW93137095A priority Critical patent/TWI280653B/en
Publication of TW200620608A publication Critical patent/TW200620608A/en
Application granted granted Critical
Publication of TWI280653B publication Critical patent/TWI280653B/en

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors

Landscapes

  • Wire Bonding (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)

Abstract

A package is provided. The package includes a leadframe, a die, a number of bond wire and an encapsulant. The leadframe includes a die pad and a number of inner leads. The die pad includes a body portion, a first extended portion and a second extended portion. The body portion has a first surface, a second surface, a first closed opening with a first wall and a second closed opening with a second wall. The first extended portion and the second extended portion is connected to the first wall and a second wall, respectively. The first extended portion and the second extended portion are extended out of the first surface or the second surface. The first extended portion has a third opening. The second extended portion has a fourth opening. The die has an active surface and an inactive surface. The active surface has a number bond pad. The inactive surface is attached to part of the first surface by avoiding the chip to cover the first closed opening and the second closed opening. The bond wires are for electrically connecting with the bond pads and the inner leads. The encapsulant is for covering the die pad, the die, the bond wires and part of the inner leads.

Description

• 1280653 九、發明說明: 【發明所屬之技術領域】 關 本發明是㈣於-種具有導線架之封裝件,且 於一種具有延伸部之晶片座的封裝件。 疋 【先前技術】 …在對晶iWchip)進行封裝(packaging)㈣程時,業者 =使用到一導線架(leadframe)來提供一用以固定晶片的晶 上(die pad)。此外,導線架上係包括有多個内引腳(_r ⑶)’以作為晶片與外部電路之間電性連接的橋標。 請參照第1A圖,其繪示乃傳統之具有導線架之封裝件的 剖面圖°在第1A圖,封裝件1()包括—導線架u、—晶片Η、 數條輝線13及一封膠體14,導線架11具有-晶片座15及數 個内引腳16’晶片座15具有相對之一第一表面…及一第二 表面15b。晶片12具有—主動表面12a及—非主動表面⑽, 主動表面i2a具有數個銲塾12c,非主動表面⑶係透過一黏 ^層19與部分之第一表面15a相黏著。銲線13用以電性連接 =墊12c及内引腳16,封膠體14用以包覆晶片座15、晶片12、 銲線13及部分之内引腳16。 ,由於導線架、晶片及封膠體之材質分別為金屬、矽及膠體 、科導致封裝件1 〇内部材料的熱膨脹係數相當不匹配。在形 成上述之封膠體10的過程中,熱熔融態之膠體材料係在灌膠室 =,以流動之方式逐漸包覆晶片座15、晶片12、銲線13和部 刀之内引腳16。待膠體材料冷卻固化後便形成上述之封膠體 W二此時,由於封裝件1〇内部材料的熱膨脹係數不匹配,以及 目則的封裝件都趨向輕薄短小的設計,導致封裝件1〇於封膠步 1280653 【圖式簡單說明】 第1A圖繪示乃傳統之具有導線架之封裝件的剖面圖。 第1B圖繪不乃第1A圖之封裝件產生翹曲現象及晶片產 生斷裂現象時之狀態的剖面圖。 第2A圖繪示乃依照本發明之實施例一之封裝件的剖面 圖。 第2B圖繪示乃第2A圖之封裝件的俯視圖。 第2C圖繪示乃沿著第2B圖之剖面線2C-2C,所視之導線 架、晶片及辉線的剖面圖。 第2D圖繪示乃第2 A圖之導線架、晶片及銲線被封膠體 包覆時之狀態的剖面圖。 第2E圖繪示乃第2C圖之導線架、晶片及銲線被封膠體包 覆時之狀態的剖面圖。 第3A圖繪示乃依照本發明之實施例二之封裝件的俯視 圖。 第3B圖繪示乃沿著第3A圖之剖面線3B_3B,所視之導線 架、晶片及銲線被封膠體包覆時之狀態的剖面圖。 第4A圖繪示乃依照本發明之實施例三之封裝件的剖面 圖。 第4B圖繪示乃第4A圖之封裝件的俯視圖。 第4C圖繪示乃第4A圖之導線架、晶片及銲線被封膠體 包覆時之狀態的剖面圖。 第5A圖繪示乃依照本發明之實施例四之封裝件的剖面 圖。 第5B圖繪示乃第5A圖之導線架、晶片及銲線未被封膠 15 1280653 體包覆前之狀態的俯視圖。• 1280653 IX. DESCRIPTION OF THE INVENTION: TECHNICAL FIELD OF THE INVENTION The present invention is (iv) a package having a lead frame and a package having a wafer holder having an extension.疋 [Prior Art] ... When applying the (i) process to the crystal iWchip, the manufacturer = uses a leadframe to provide a die pad for fixing the wafer. In addition, the lead frame includes a plurality of inner leads (_r (3))' as a bridge for electrical connection between the wafer and an external circuit. Please refer to FIG. 1A, which is a cross-sectional view of a conventional package having a lead frame. In FIG. 1A, the package 1() includes a lead frame u, a wafer cassette, a plurality of bright lines 13 and a colloid. 14. The lead frame 11 has a wafer holder 15 and a plurality of inner leads 16'. The wafer holder 15 has a first surface ... and a second surface 15b. The wafer 12 has an active surface 12a and an inactive surface (10). The active surface i2a has a plurality of solder pads 12c. The inactive surface (3) is adhered to a portion of the first surface 15a through a layer 19. The bonding wire 13 is electrically connected to the pad 12c and the inner lead 16. The sealing body 14 is used to cover the wafer holder 15, the wafer 12, the bonding wire 13 and a portion of the inner lead 16. Since the materials of the lead frame, the wafer and the sealant are metal, tantalum and colloid, respectively, the thermal expansion coefficient of the inner material of the package 1 is quite mismatched. In the formation of the above-mentioned encapsulant 10, the colloidal material in the hot melt state is in the potting chamber =, and the wafer holder 15, the wafer 12, the bonding wire 13, and the inner lead 16 of the blade are gradually covered in a flowing manner. After the colloidal material is cooled and solidified, the above-mentioned encapsulant W is formed. At this time, since the thermal expansion coefficient of the inner material of the package 1〇 is not matched, and the package of the package tends to be light, thin and short, the package 1 is sealed. Rubber Step 1280653 [Simple Description of the Drawing] FIG. 1A is a cross-sectional view showing a conventional package having a lead frame. Fig. 1B is a cross-sectional view showing a state in which the package of Fig. 1A is warped and the wafer is broken. Fig. 2A is a cross-sectional view showing a package in accordance with a first embodiment of the present invention. FIG. 2B is a plan view showing the package of FIG. 2A. Fig. 2C is a cross-sectional view of the lead frame, the wafer, and the glow line as viewed along section line 2C-2C of Fig. 2B. Fig. 2D is a cross-sectional view showing a state in which the lead frame, the wafer, and the bonding wire of Fig. 2A are covered with a sealant. Fig. 2E is a cross-sectional view showing the state in which the lead frame, the wafer, and the bonding wire of Fig. 2C are covered by the encapsulant. Figure 3A is a top plan view of a package in accordance with a second embodiment of the present invention. Fig. 3B is a cross-sectional view showing the state in which the lead frame, the wafer, and the bonding wire are covered by the sealing body along the section line 3B_3B of Fig. 3A. Fig. 4A is a cross-sectional view showing a package in accordance with a third embodiment of the present invention. Figure 4B is a top plan view of the package of Figure 4A. Fig. 4C is a cross-sectional view showing a state in which the lead frame, the wafer, and the bonding wire of Fig. 4A are covered with a sealant. Fig. 5A is a cross-sectional view showing a package in accordance with a fourth embodiment of the present invention. FIG. 5B is a plan view showing a state in which the lead frame, the wafer, and the bonding wire of FIG. 5A are not covered by the sealing body 15 1280653.

麗X 【主要元件符號說明】 10、 30、60、80、110 :封裝件 11、 31、61、81、111 :導線架 12、 22、72 :晶片 12a、22a、72a :主動表面 12b、22b、72b :非主動表面 12c ' 22c λ 72c z 鲜塾 13、 23、73 :銲線 14、24、74 :封膠體 15 、 35 、 65 、 75 、 85 、 115 : 16、26、76 ··内引腳 19、29c、79c :黏著層 21a、31a: 口壁 晶片座 27 ' 67、77 ··本體部 27a、77a :第一表面 27b、77b :第二表面 27c、27d、77c ' 77d :長邊 27e、27f、77e、77f :短邊 27g、37g :條狀封閉開口 27h、37h、57h、67h、77h、87h、107h ··開口 28、38、58、68、78、88、108、118 ··延伸部 29a、29b、79a、79b ··支撐結構丽X [Main component symbol description] 10, 30, 60, 80, 110: package 11, 31, 61, 81, 111: lead frame 12, 22, 72: wafer 12a, 22a, 72a: active surface 12b, 22b 72b: inactive surface 12c ' 22c λ 72c z fresh 塾 13, 23, 73: bonding wires 14, 24, 74: sealant 15, 35, 65, 75, 85, 115: 16, 26, 76 · · Pins 19, 29c, 79c: Adhesive layers 21a, 31a: Port wafer holder 27' 67, 77 · Main body portions 27a, 77a: First surface 27b, 77b: Second surface 27c, 27d, 77c ' 77d: Long Sides 27e, 27f, 77e, 77f: short sides 27g, 37g: strip-shaped closing openings 27h, 37h, 57h, 67h, 77h, 87h, 107h · openings 28, 38, 58, 68, 78, 88, 108, 118 ··Extensions 29a, 29b, 79a, 79b ··Support structure

TW1791(061116)CRF 16TW1791(061116)CRF 16

Claims (1)

1280653 、申請專利範圍·· I 一種封裝件,包括: 一導線架,具有一晶片座及複數個内引腳,該晶片座包括·· 一本體部,具有相對之一第一表面及一第二表面、 第-封閉開口和一第二封閉開口,該第一封閉開口及該第二 、閉開口係貫穿該第一表面及該第二表面;及 閉 一第一延伸部及一第二延伸部,係分別與該第一封 1汗口之一第一口壁及該第二封閉開口之一第二口壁連接,並 2伸出該第二表面或該第一表面之外,該第一延伸部具有一 —開口,該第二延伸部具有一第四開口; 表 9日片’具有相對之—主動表面及-非主動表面,該主動 -有複數個銲塾,該非主動表面係以至少避開 開口及該第二封閉開口之方式與部分之該第-表面相黏著 硬數條銲線,用以電性連接該些銲墊及該些内引腳;以及 之該㈣^體包覆該晶該W、該些料及部分 2. 如申請專利範圍第ι項所述之封裝件, 表面係以避開該第一封閉開口、 ^動 -表面之外的兮第… 5亥弟-封閉開口和延伸出該第 第-表面相:著伸部及該第二延伸部之方式與部分之該 3. 如W專利範圍第丨項所述之封裝件,其中 弟一延伸部及該第二延伸部為-體成型之結構。 壁係鄰近於該第二口壁。 牛八中该弟一口 5.如申請專利範圍第】 更具有相對之一第一長邊?:,其中該本體部 久弟一長邊和相對之二短邊,該二 TW1791(061U6)CRF 17 :1ϊ:τβ’ 1280653 短邊係連接该第一且^ L/' ^ _'修 二封閉開口之狂:弟二長邊,該第—封閉開以 行,該第—2:方向係分別與該第-長邊及該第二長邊平 邊及該第二長口及該第二㈣開口係分別鄰近於該第一長 J局苐一條狀開口。 閉開6項™ 該第* 構及一第二支撐結構,該第一支撐結構及 邊遠桩,#、 I、邛刀之3亥第-長邊及部分之該第二長 ”之該第—支撐結構及部分之該 該封膠體包覆。 不又枒、、、口構係被 9· 一種封裝件,包括·· -導線架’具有―晶片錢複數個内引腳,該晶片座包括: 相對之-第It體/,具有相對之―第―表面及―第二表面、 邊 及—第-短邊和相對之-第—長邊及一第二 =邊及㈣-長邊及該第二長邊係連接該第—短邊及該第二短 -帛延伸部及一第二延伸部,係分別與該第一長 二弟二長邊連接,並皆延伸出該第二表面或該第 ’该弟-延伸部具有一第一開口,該第二延伸 開口; 布一 -晶片,具有相對之—主動表面及—非线表面該 =具有複數個薛墊,該非主動表面係與部分之該第—表面相 TW1791(061116)CRF 18 1280653 複數條銲線,一封膠體,用1280653, the scope of patent application·· I A package comprising: a lead frame having a wafer holder and a plurality of inner leads, the wafer holder including a body portion having a first surface and a second a first closed opening and the second closed opening extending through the first surface and the second surface; and a first extension and a second extension are closed, the second closed opening and the second closed opening Connected to the first port wall of one of the first 1 sweat ports and the second port wall of the second closed port, and 2 protrudes beyond the second surface or the first surface, the first The extension has an opening, the second extension has a fourth opening; the table 9 has a relative-active surface and an inactive surface, the active-having a plurality of soldering tips, the inactive surface being at least a plurality of bonding wires are adhered to the first surface of the portion to avoid the opening and the second closing opening for electrically connecting the pads and the inner leads; and the (four) body coating The crystal, the material, and the portion 2. The package of the item (1), the surface is arranged to avoid the first closed opening, the outer surface of the movable surface, and the outer surface of the opening and extending the first surface-surface phase: The package of the second aspect of the invention, wherein the extension and the second extension are a body-formed structure. The wall system is adjacent to the second port wall. Niu Bazhong, the younger one. 5. If the patent application scope is the first one? :, wherein the body portion is a long side and the opposite short side, the two TW1791 (061U6) CRF 17 : 1 ϊ: τβ ' 1280653 short side is connected to the first and ^ L / ' ^ _ ' repair two closed opening Madness: the second long side of the brother, the first-closed line, the second -2: direction and the first long side and the second long side flat side and the second long mouth and the second (four) opening The system is adjacent to the first long J. Closing 6 items of the TM structure and a second supporting structure, the first supporting structure and the side of the remote pile, #1, I, the 3th-long side of the file and the second length of the part-" The support structure and a portion of the sealant are covered. The package is not included in the package, and the package comprises: a lead frame having a plurality of inner pins, the wafer holder comprising: The opposite - the first body /, has a relative "first surface" and "second surface, side and - first short side and opposite - first long side and a second = side and (four) - long side and the first The two long sides are connected to the first short side and the second short-twist extension and a second extension, respectively connected to the first long second brother and the long side, and both extend out of the second surface or The 'the younger-extension portion has a first opening, the second extended opening; the cloth-wafer having an opposite-active surface and a non-linear surface; the plurality of Xue mats having the plurality of Xue mats, the inactive surface system and the portion The first surface phase TW1791 (061116) CRF 18 1280653 a plurality of bonding wires, a colloid, used 該些銲線及部分 之該些内引腳。 ’用以電性連接該些銲^ 用以包覆該晶片座、該晶片、該4b錯 邱、2 μ請專利範圍第9項所述之封裝件,其中該本體 σ以一延伸部及該第二延伸部為一體成型之結構。 U•如申請專利範圍第9項所述之封裝件,其中該導線架 更包括一第一支撐結構及一第二支撐結構,該第一支撐結構及 該第二支撐結構係分別與部分之該第一短邊及部分之該第二短 邊連接,部分之該第一支撐結構及部分之該第二支撐結構係被 該封膠體包覆。 TW1791(061116)CRF 19The bonding wires and portions of the inner leads. a package for electrically connecting the solder pads to cover the wafer holder, the wafer, the 4b, and the package of the second aspect of the invention, wherein the body σ is an extension portion and the The second extension is an integrally formed structure. The package of claim 9, wherein the lead frame further comprises a first support structure and a second support structure, and the first support structure and the second support structure are respectively The first short side and a portion of the second short side are connected, and part of the first supporting structure and a portion of the second supporting structure are covered by the sealing body. TW1791(061116)CRF 19 1280653 七、指定代表圖: (一) 本案指定代表圖為:第2B圖 (二) 本代表圖之元件符號簡單說明: 21a、31a : 口壁 22 :晶片 22a :主動表面 22c :銲墊 23 :銲線 24 :封膠體 26 :内引腳 27a :第一表面 27c、27d :長邊 27e、27f :短邊 27g、37g :條狀封閉開口 27h、37h ··開口 28、38 :延伸部 29a、29b :支撐結構 30 : 封裝件 31 : 導線架 35 ·· 晶片座 37 : 本體部 八、本案若有化學式時,請揭示最能顯示發明特徵 的化學式:無 TW1791(061116)CRF 51280653 VII. Designated representative map: (1) The representative representative figure of this case is: 2B (2) The symbol of the representative figure is simple: 21a, 31a: wall 22: wafer 22a: active surface 22c: pad 23: Bonding wire 24: Sealant 26: Inner lead 27a: First surface 27c, 27d: Long side 27e, 27f: Short side 27g, 37g: Strip-shaped closing opening 27h, 37h · Opening 28, 38: Extension 29a, 29b: Support structure 30: Package 31: Lead frame 35 ·· Wafer holder 37: Main body part 8. If there is a chemical formula in this case, please disclose the chemical formula that best shows the characteristics of the invention: no TW1791 (061116) CRF 5
TW93137095A 2004-12-01 2004-12-01 Package TWI280653B (en)

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TWI280653B true TWI280653B (en) 2007-05-01

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JP4489094B2 (en) * 2007-04-27 2010-06-23 株式会社東芝 Semiconductor package
US9679831B2 (en) * 2015-08-13 2017-06-13 Cypress Semiconductor Corporation Tape chip on lead using paste die attach material

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