• 1280653 九、發明說明： 【發明所屬之技術領域】 關 本發明是㈣於-種具有導線架之封裝件，且 於一種具有延伸部之晶片座的封裝件。 疋 【先前技術】 …在對晶iWchip)進行封裝（packaging)㈣程時，業者 =使用到一導線架（leadframe)來提供一用以固定晶片的晶 上（die pad)。此外，導線架上係包括有多個内引腳（_r ⑶）’以作為晶片與外部電路之間電性連接的橋標。 請參照第1A圖，其繪示乃傳統之具有導線架之封裝件的 剖面圖°在第1A圖，封裝件1()包括—導線架u、—晶片Η、 數條輝線13及一封膠體14，導線架11具有-晶片座15及數 個内引腳16’晶片座15具有相對之一第一表面…及一第二 表面15b。晶片12具有—主動表面12a及—非主動表面⑽， 主動表面i2a具有數個銲塾12c，非主動表面⑶係透過一黏 ^層19與部分之第一表面15a相黏著。銲線13用以電性連接 =墊12c及内引腳16，封膠體14用以包覆晶片座15、晶片12、 銲線13及部分之内引腳16。 ，由於導線架、晶片及封膠體之材質分別為金屬、矽及膠體 、科導致封裝件1 〇内部材料的熱膨脹係數相當不匹配。在形 成上述之封膠體10的過程中，熱熔融態之膠體材料係在灌膠室 =，以流動之方式逐漸包覆晶片座15、晶片12、銲線13和部 刀之内引腳16。待膠體材料冷卻固化後便形成上述之封膠體 W二此時，由於封裝件1〇内部材料的熱膨脹係數不匹配，以及 目則的封裝件都趨向輕薄短小的設計，導致封裝件1〇於封膠步 1280653 【圖式簡單說明】 第1A圖繪示乃傳統之具有導線架之封裝件的剖面圖。 第1B圖繪不乃第1A圖之封裝件產生翹曲現象及晶片產 生斷裂現象時之狀態的剖面圖。 第2A圖繪示乃依照本發明之實施例一之封裝件的剖面 圖。 第2B圖繪示乃第2A圖之封裝件的俯視圖。 第2C圖繪示乃沿著第2B圖之剖面線2C-2C，所視之導線 架、晶片及辉線的剖面圖。 第2D圖繪示乃第2 A圖之導線架、晶片及銲線被封膠體 包覆時之狀態的剖面圖。 第2E圖繪示乃第2C圖之導線架、晶片及銲線被封膠體包 覆時之狀態的剖面圖。 第3A圖繪示乃依照本發明之實施例二之封裝件的俯視 圖。 第3B圖繪示乃沿著第3A圖之剖面線3B_3B，所視之導線 架、晶片及銲線被封膠體包覆時之狀態的剖面圖。 第4A圖繪示乃依照本發明之實施例三之封裝件的剖面 圖。 第4B圖繪示乃第4A圖之封裝件的俯視圖。 第4C圖繪示乃第4A圖之導線架、晶片及銲線被封膠體 包覆時之狀態的剖面圖。 第5A圖繪示乃依照本發明之實施例四之封裝件的剖面 圖。 第5B圖繪示乃第5A圖之導線架、晶片及銲線未被封膠 15 1280653 體包覆前之狀態的俯視圖。• 1280653 IX. DESCRIPTION OF THE INVENTION: TECHNICAL FIELD OF THE INVENTION The present invention is (iv) a package having a lead frame and a package having a wafer holder having an extension.疋 [Prior Art] ... When applying the (i) process to the crystal iWchip, the manufacturer = uses a leadframe to provide a die pad for fixing the wafer. In addition, the lead frame includes a plurality of inner leads (_r (3))' as a bridge for electrical connection between the wafer and an external circuit. Please refer to FIG. 1A, which is a cross-sectional view of a conventional package having a lead frame. In FIG. 1A, the package 1() includes a lead frame u, a wafer cassette, a plurality of bright lines 13 and a colloid. 14. The lead frame 11 has a wafer holder 15 and a plurality of inner leads 16'. The wafer holder 15 has a first surface ... and a second surface 15b. The wafer 12 has an active surface 12a and an inactive surface (10). The active surface i2a has a plurality of solder pads 12c. The inactive surface (3) is adhered to a portion of the first surface 15a through a layer 19. The bonding wire 13 is electrically connected to the pad 12c and the inner lead 16. The sealing body 14 is used to cover the wafer holder 15, the wafer 12, the bonding wire 13 and a portion of the inner lead 16. Since the materials of the lead frame, the wafer and the sealant are metal, tantalum and colloid, respectively, the thermal expansion coefficient of the inner material of the package 1 is quite mismatched. In the formation of the above-mentioned encapsulant 10, the colloidal material in the hot melt state is in the potting chamber =, and the wafer holder 15, the wafer 12, the bonding wire 13, and the inner lead 16 of the blade are gradually covered in a flowing manner. After the colloidal material is cooled and solidified, the above-mentioned encapsulant W is formed. At this time, since the thermal expansion coefficient of the inner material of the package 1〇 is not matched, and the package of the package tends to be light, thin and short, the package 1 is sealed. Rubber Step 1280653 [Simple Description of the Drawing] FIG. 1A is a cross-sectional view showing a conventional package having a lead frame. Fig. 1B is a cross-sectional view showing a state in which the package of Fig. 1A is warped and the wafer is broken. Fig. 2A is a cross-sectional view showing a package in accordance with a first embodiment of the present invention. FIG. 2B is a plan view showing the package of FIG. 2A. Fig. 2C is a cross-sectional view of the lead frame, the wafer, and the glow line as viewed along section line 2C-2C of Fig. 2B. Fig. 2D is a cross-sectional view showing a state in which the lead frame, the wafer, and the bonding wire of Fig. 2A are covered with a sealant. Fig. 2E is a cross-sectional view showing the state in which the lead frame, the wafer, and the bonding wire of Fig. 2C are covered by the encapsulant. Figure 3A is a top plan view of a package in accordance with a second embodiment of the present invention. Fig. 3B is a cross-sectional view showing the state in which the lead frame, the wafer, and the bonding wire are covered by the sealing body along the section line 3B_3B of Fig. 3A. Fig. 4A is a cross-sectional view showing a package in accordance with a third embodiment of the present invention. Figure 4B is a top plan view of the package of Figure 4A. Fig. 4C is a cross-sectional view showing a state in which the lead frame, the wafer, and the bonding wire of Fig. 4A are covered with a sealant. Fig. 5A is a cross-sectional view showing a package in accordance with a fourth embodiment of the present invention. FIG. 5B is a plan view showing a state in which the lead frame, the wafer, and the bonding wire of FIG. 5A are not covered by the sealing body 15 1280653.
麗X 【主要元件符號說明】 10、 30、60、80、110 :封裝件 11、 31、61、81、111 :導線架 12、 22、72 :晶片 12a、22a、72a :主動表面 12b、22b、72b :非主動表面 12c ' 22c λ 72c z 鲜塾 13、 23、73 :銲線 14、24、74 :封膠體 15 、 35 、 65 、 75 、 85 、 115 : 16、26、76 ··内引腳 19、29c、79c :黏著層 21a、31a: 口壁 晶片座 27 ' 67、77 ··本體部 27a、77a :第一表面 27b、77b :第二表面 27c、27d、77c ' 77d :長邊 27e、27f、77e、77f :短邊 27g、37g :條狀封閉開口 27h、37h、57h、67h、77h、87h、107h ··開口 28、38、58、68、78、88、108、118 ··延伸部 29a、29b、79a、79b ··支撐結構丽X [Main component symbol description] 10, 30, 60, 80, 110: package 11, 31, 61, 81, 111: lead frame 12, 22, 72: wafer 12a, 22a, 72a: active surface 12b, 22b 72b: inactive surface 12c ' 22c λ 72c z fresh 塾 13, 23, 73: bonding wires 14, 24, 74: sealant 15, 35, 65, 75, 85, 115: 16, 26, 76 · · Pins 19, 29c, 79c: Adhesive layers 21a, 31a: Port wafer holder 27' 67, 77 · Main body portions 27a, 77a: First surface 27b, 77b: Second surface 27c, 27d, 77c ' 77d: Long Sides 27e, 27f, 77e, 77f: short sides 27g, 37g: strip-shaped closing openings 27h, 37h, 57h, 67h, 77h, 87h, 107h · openings 28, 38, 58, 68, 78, 88, 108, 118 ··Extensions 29a, 29b, 79a, 79b ··Support structure
TW1791(061116)CRF 16TW1791(061116)CRF 16